From: marek.vasut@gmail.com (Marek Vasut)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH] ARM: clock-mx28: Fix end of loop condition
Date: Mon, 16 Jan 2012 21:52:49 +0100 [thread overview]
Message-ID: <201201162152.49642.marek.vasut@gmail.com> (raw)
In-Reply-To: <1326740477-21576-1-git-send-email-fabio.estevam@freescale.com>
> From: Fabio Estevam <festevam@gmail.com>
>
> Selecting audio on a mx28evk the saif driver was failing:
>
> [ 0.660000] saif0_clk_set_rate: divider writing timeout
> [ 0.670000] mxs-sgtl5000: probe of mxs-sgtl5000.0 failed with error -110
> [ 0.670000] ALSA device list:
> [ 0.680000] No soundcards found.
>
> The timeout on saif0_clk_set_rate was due to the wrong condition for the
> end of loop.
>
> After fixing it, the audio driver can be correctly probed and becomes
> functional.
>
> While at it, fix the other locations where the similar issue occurs.
What? The patch doesn't make sense.
>
> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
> ---
> arch/arm/mach-mxs/clock-mx28.c | 8 ++++----
> 1 files changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/arch/arm/mach-mxs/clock-mx28.c
> b/arch/arm/mach-mxs/clock-mx28.c index 5d68e41..ee9e04b 100644
> --- a/arch/arm/mach-mxs/clock-mx28.c
> +++ b/arch/arm/mach-mxs/clock-mx28.c
> @@ -396,7 +396,7 @@ static int name##_set_rate(struct clk *clk, unsigned
> long rate) \ }
\
> __raw_writel(reg, CLKCTRL_BASE_ADDR + HW_CLKCTRL_##dr); \
> \
> - for (i = 10000; i; i--) \
> + for (i = 10000; i < 0; i--) \
> if (!(__raw_readl(CLKCTRL_BASE_ADDR + \
> HW_CLKCTRL_##dr) & bm_busy)) \
> break; \
> @@ -439,7 +439,7 @@ static int name##_set_rate(struct clk *clk, unsigned
> long rate) \ }
\
> __raw_writel(reg, CLKCTRL_BASE_ADDR + HW_CLKCTRL_##dr); \
> \
> - for (i = 10000; i; i--) \
> + for (i = 10000; i < 0; i--) \
> if (!(__raw_readl(CLKCTRL_BASE_ADDR + \
> HW_CLKCTRL_##dr) & BM_CLKCTRL_##dr##_BUSY)) \
> break; \
> @@ -479,7 +479,7 @@ static int name##_set_rate(struct clk *clk, unsigned
> long rate) \ reg |= div << BP_CLKCTRL_##rs##_DIV;
\
> __raw_writel(reg, CLKCTRL_BASE_ADDR + HW_CLKCTRL_##rs); \
> \
> - for (i = 10000; i; i--) \
> + for (i = 10000; i < 0; i--) \
> if (!(__raw_readl(CLKCTRL_BASE_ADDR + \
> HW_CLKCTRL_##rs) & BM_CLKCTRL_##rs##_BUSY)) \
> break; \
> @@ -756,7 +756,7 @@ static int clk_misc_init(void)
> reg |= 3 << BP_CLKCTRL_HBUS_DIV;
> __raw_writel(reg, CLKCTRL_BASE_ADDR + HW_CLKCTRL_HBUS);
>
> - for (i = 10000; i; i--)
> + for (i = 10000; i < 0; i--)
> if (!(__raw_readl(CLKCTRL_BASE_ADDR +
> HW_CLKCTRL_HBUS) & BM_CLKCTRL_HBUS_ASM_BUSY))
> break;
prev parent reply other threads:[~2012-01-16 20:52 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-01-16 19:01 [PATCH] ARM: clock-mx28: Fix end of loop condition Fabio Estevam
2012-01-16 20:32 ` Fabio Estevam
2012-01-16 20:52 ` Marek Vasut
2012-01-16 20:55 ` Fabio Estevam
2012-01-16 21:07 ` Wolfram Sang
2012-01-16 21:19 ` Marek Vasut
2012-01-17 15:24 ` Fabio Estevam
2012-01-17 17:17 ` Fabio Estevam
2012-01-16 20:52 ` Marek Vasut [this message]
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