From: linux@arm.linux.org.uk (Russell King - ARM Linux)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH] ARM: kexec: EOI active and mask all interrupts in kexec crash path
Date: Wed, 18 Jan 2012 15:07:24 +0000 [thread overview]
Message-ID: <20120118150724.GH1068@n2100.arm.linux.org.uk> (raw)
In-Reply-To: <1326898885-28105-1-git-send-email-will.deacon@arm.com>
On Wed, Jan 18, 2012 at 03:01:25PM +0000, Will Deacon wrote:
> The kexec machine crash code can be called in interrupt context via a
> sysrq trigger made using the magic key combination. If the irq chip
> dealing with the serial interrupt is using the fasteoi flow handler,
> then we will never EOI the interrupt because the interrupt handler will
> be fatal. In the case of a GIC, this results in the crash kernel not
> receiving interrupts on that CPU interface.
>
> This patch adds code (based on the PowerPC implementation) to EOI any
> pending interrupts on the crash CPU before masking and disabling all
> interrupts. Secondary cores are not a problem since they are placed into
> a cpu_relax() loop via an IPI.
So, what happens if we fault in an interrupt handler, we have
panic_on_oops set, and we have panic configured to automatically
reboot after a period?
I think we actually want this to happen at boot to make sure that the
CPU interfaces are properly initialized each time the kernel is brought
up.
> @@ -53,6 +54,28 @@ void machine_crash_nonpanic_core(void *unused)
> cpu_relax();
> }
>
> +static void machine_kexec_mask_interrupts(void) {
Coding style error.
next prev parent reply other threads:[~2012-01-18 15:07 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-01-18 15:01 [PATCH] ARM: kexec: EOI active and mask all interrupts in kexec crash path Will Deacon
2012-01-18 15:07 ` Russell King - ARM Linux [this message]
2012-01-18 15:31 ` Will Deacon
2012-01-18 15:40 ` Russell King - ARM Linux
2012-01-18 15:48 ` Will Deacon
2012-01-19 13:33 ` Will Deacon
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