* [PATCH] ARM: gic: refactor irq_start assignment
@ 2012-01-17 12:09 Will Deacon
2012-01-17 16:02 ` Rob Herring
0 siblings, 1 reply; 5+ messages in thread
From: Will Deacon @ 2012-01-17 12:09 UTC (permalink / raw)
To: linux-arm-kernel
The irq_start and hwirq_base assignment code is fairly hairy and ended
up being difficult to read following a conflict resolution for 3.2.
This patch rearranges the code slightly to make it easier to read.
Cc: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
---
arch/arm/common/gic.c | 13 ++++++-------
1 files changed, 6 insertions(+), 7 deletions(-)
diff --git a/arch/arm/common/gic.c b/arch/arm/common/gic.c
index c47d619..ca6b5dd 100644
--- a/arch/arm/common/gic.c
+++ b/arch/arm/common/gic.c
@@ -694,13 +694,12 @@ void __init gic_init_bases(unsigned int gic_nr, int irq_start,
* For primary GICs, skip over SGIs.
* For secondary GICs, skip over PPIs, too.
*/
- domain->hwirq_base = 32;
- if (gic_nr == 0) {
- if ((irq_start & 31) > 0) {
- domain->hwirq_base = 16;
- if (irq_start != -1)
- irq_start = (irq_start & ~31) + 16;
- }
+ if (gic_nr == 0 && (irq_start & 31) > 0) {
+ domain->hwirq_base = 16;
+ if (irq_start != -1)
+ irq_start = (irq_start & ~31) + 16;
+ } else {
+ domain->hwirq_base = 32;
}
/*
--
1.7.4.1
^ permalink raw reply related [flat|nested] 5+ messages in thread* [PATCH] ARM: gic: refactor irq_start assignment
2012-01-17 12:09 [PATCH] ARM: gic: refactor irq_start assignment Will Deacon
@ 2012-01-17 16:02 ` Rob Herring
2012-01-17 16:03 ` Will Deacon
0 siblings, 1 reply; 5+ messages in thread
From: Rob Herring @ 2012-01-17 16:02 UTC (permalink / raw)
To: linux-arm-kernel
On 01/17/2012 06:09 AM, Will Deacon wrote:
> The irq_start and hwirq_base assignment code is fairly hairy and ended
> up being difficult to read following a conflict resolution for 3.2.
>
> This patch rearranges the code slightly to make it easier to read.
>
> Cc: Marc Zyngier <marc.zyngier@arm.com>
> Signed-off-by: Will Deacon <will.deacon@arm.com>
> ---
> arch/arm/common/gic.c | 13 ++++++-------
> 1 files changed, 6 insertions(+), 7 deletions(-)
>
> diff --git a/arch/arm/common/gic.c b/arch/arm/common/gic.c
> index c47d619..ca6b5dd 100644
> --- a/arch/arm/common/gic.c
> +++ b/arch/arm/common/gic.c
> @@ -694,13 +694,12 @@ void __init gic_init_bases(unsigned int gic_nr, int irq_start,
> * For primary GICs, skip over SGIs.
> * For secondary GICs, skip over PPIs, too.
> */
> - domain->hwirq_base = 32;
> - if (gic_nr == 0) {
> - if ((irq_start & 31) > 0) {
> - domain->hwirq_base = 16;
> - if (irq_start != -1)
> - irq_start = (irq_start & ~31) + 16;
> - }
> + if (gic_nr == 0 && (irq_start & 31) > 0) {
> + domain->hwirq_base = 16;
> + if (irq_start != -1)
> + irq_start = (irq_start & ~31) + 16;
> + } else {
> + domain->hwirq_base = 32;
> }
This should probably just be rolled into Grant's irqdomain work. In any
case, it's going to conflict with it.
Rob
^ permalink raw reply [flat|nested] 5+ messages in thread* [PATCH] ARM: gic: refactor irq_start assignment
2012-01-17 16:02 ` Rob Herring
@ 2012-01-17 16:03 ` Will Deacon
2012-01-18 21:32 ` Grant Likely
0 siblings, 1 reply; 5+ messages in thread
From: Will Deacon @ 2012-01-17 16:03 UTC (permalink / raw)
To: linux-arm-kernel
On Tue, Jan 17, 2012 at 04:02:09PM +0000, Rob Herring wrote:
> On 01/17/2012 06:09 AM, Will Deacon wrote:
> > The irq_start and hwirq_base assignment code is fairly hairy and ended
> > up being difficult to read following a conflict resolution for 3.2.
> >
> > This patch rearranges the code slightly to make it easier to read.
> >
> > Cc: Marc Zyngier <marc.zyngier@arm.com>
> > Signed-off-by: Will Deacon <will.deacon@arm.com>
> > ---
> > arch/arm/common/gic.c | 13 ++++++-------
> > 1 files changed, 6 insertions(+), 7 deletions(-)
> >
> > diff --git a/arch/arm/common/gic.c b/arch/arm/common/gic.c
> > index c47d619..ca6b5dd 100644
> > --- a/arch/arm/common/gic.c
> > +++ b/arch/arm/common/gic.c
> > @@ -694,13 +694,12 @@ void __init gic_init_bases(unsigned int gic_nr, int irq_start,
> > * For primary GICs, skip over SGIs.
> > * For secondary GICs, skip over PPIs, too.
> > */
> > - domain->hwirq_base = 32;
> > - if (gic_nr == 0) {
> > - if ((irq_start & 31) > 0) {
> > - domain->hwirq_base = 16;
> > - if (irq_start != -1)
> > - irq_start = (irq_start & ~31) + 16;
> > - }
> > + if (gic_nr == 0 && (irq_start & 31) > 0) {
> > + domain->hwirq_base = 16;
> > + if (irq_start != -1)
> > + irq_start = (irq_start & ~31) + 16;
> > + } else {
> > + domain->hwirq_base = 32;
> > }
>
> This should probably just be rolled into Grant's irqdomain work. In any
> case, it's going to conflict with it.
Ok, it's purely cosmetic so I'm fine with that. Grant - would you be able to
pick this up please?
Thanks,
Will
^ permalink raw reply [flat|nested] 5+ messages in thread* [PATCH] ARM: gic: refactor irq_start assignment
2012-01-17 16:03 ` Will Deacon
@ 2012-01-18 21:32 ` Grant Likely
2012-01-19 9:52 ` Will Deacon
0 siblings, 1 reply; 5+ messages in thread
From: Grant Likely @ 2012-01-18 21:32 UTC (permalink / raw)
To: linux-arm-kernel
On Tue, Jan 17, 2012 at 04:03:34PM +0000, Will Deacon wrote:
> On Tue, Jan 17, 2012 at 04:02:09PM +0000, Rob Herring wrote:
> > On 01/17/2012 06:09 AM, Will Deacon wrote:
> > > The irq_start and hwirq_base assignment code is fairly hairy and ended
> > > up being difficult to read following a conflict resolution for 3.2.
> > >
> > > This patch rearranges the code slightly to make it easier to read.
> > >
> > > Cc: Marc Zyngier <marc.zyngier@arm.com>
> > > Signed-off-by: Will Deacon <will.deacon@arm.com>
> > > ---
> > > arch/arm/common/gic.c | 13 ++++++-------
> > > 1 files changed, 6 insertions(+), 7 deletions(-)
> > >
> > > diff --git a/arch/arm/common/gic.c b/arch/arm/common/gic.c
> > > index c47d619..ca6b5dd 100644
> > > --- a/arch/arm/common/gic.c
> > > +++ b/arch/arm/common/gic.c
> > > @@ -694,13 +694,12 @@ void __init gic_init_bases(unsigned int gic_nr, int irq_start,
> > > * For primary GICs, skip over SGIs.
> > > * For secondary GICs, skip over PPIs, too.
> > > */
> > > - domain->hwirq_base = 32;
> > > - if (gic_nr == 0) {
> > > - if ((irq_start & 31) > 0) {
> > > - domain->hwirq_base = 16;
> > > - if (irq_start != -1)
> > > - irq_start = (irq_start & ~31) + 16;
> > > - }
> > > + if (gic_nr == 0 && (irq_start & 31) > 0) {
> > > + domain->hwirq_base = 16;
> > > + if (irq_start != -1)
> > > + irq_start = (irq_start & ~31) + 16;
> > > + } else {
> > > + domain->hwirq_base = 32;
> > > }
> >
> > This should probably just be rolled into Grant's irqdomain work. In any
> > case, it's going to conflict with it.
>
> Ok, it's purely cosmetic so I'm fine with that. Grant - would you be able to
> pick this up please?
The conflict is pretty trivial and I'll handle any fixups if a
conflict occurs. I'd rather not have changes unrelated to the
conversion in my series.
g.
^ permalink raw reply [flat|nested] 5+ messages in thread* [PATCH] ARM: gic: refactor irq_start assignment
2012-01-18 21:32 ` Grant Likely
@ 2012-01-19 9:52 ` Will Deacon
0 siblings, 0 replies; 5+ messages in thread
From: Will Deacon @ 2012-01-19 9:52 UTC (permalink / raw)
To: linux-arm-kernel
On Wed, Jan 18, 2012 at 09:32:23PM +0000, Grant Likely wrote:
> On Tue, Jan 17, 2012 at 04:03:34PM +0000, Will Deacon wrote:
> > On Tue, Jan 17, 2012 at 04:02:09PM +0000, Rob Herring wrote:
> > >
> > > This should probably just be rolled into Grant's irqdomain work. In any
> > > case, it's going to conflict with it.
> >
> > Ok, it's purely cosmetic so I'm fine with that. Grant - would you be able to
> > pick this up please?
>
> The conflict is pretty trivial and I'll handle any fixups if a
> conflict occurs. I'd rather not have changes unrelated to the
> conversion in my series.
Okey doke then, I'll stick to the original plan (via Russell's patch system) :)
Thanks,
Will
^ permalink raw reply [flat|nested] 5+ messages in thread
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2012-01-17 12:09 [PATCH] ARM: gic: refactor irq_start assignment Will Deacon
2012-01-17 16:02 ` Rob Herring
2012-01-17 16:03 ` Will Deacon
2012-01-18 21:32 ` Grant Likely
2012-01-19 9:52 ` Will Deacon
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