From mboxrd@z Thu Jan 1 00:00:00 1970 From: catalin.marinas@arm.com (Catalin Marinas) Date: Fri, 27 Jan 2012 17:30:29 +0000 Subject: OMAP3 L2/outer cache enabled in kernel (after being disabled by uBoot)? In-Reply-To: References: <20120116131329.GA928@n2100.arm.linux.org.uk> <20120117121138.GC11475@arm.com> <4F15692D.4070100@ti.com> <20120117133918.GE11475@arm.com> Message-ID: <20120127173029.GA3281@arm.com> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org On Fri, Jan 20, 2012 at 08:57:11AM +0000, Joe Woodward wrote: > > So I re-iterate that we need to have solution to this problem. > > ... I don't want to be a pain, but it seems to me that this dicussion > didn't reach a full conclussion? Probably not, because it depends on many variables. See below my take on this. > I think it was left with the open options being: > 1) Leave the L2/outer cache enabled in the bootloader (not ideal and > may cause problems with future devices) This depends on whether the L2 is inner or outer: L2 inner - leave it enabled in the boot loader L2 outer - leave it disabled in the boot loader > 2) Turn the L2/outer cache on for OMAP3 later in the kernel boot when > the device is known Same as above: L2 inner - don't do anything, it gets used when SCTLR.M is enabled L2 outer - enabled at boot time via the platform code (later, after MMU was enabled). -- Catalin