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From: catalin.marinas@arm.com (Catalin Marinas)
To: linux-arm-kernel@lists.infradead.org
Subject: Oops in guest after ioremap() on ARMv7
Date: Thu, 16 Feb 2012 17:18:22 +0000	[thread overview]
Message-ID: <20120216171822.GB9151@arm.com> (raw)
In-Reply-To: <1329411702.3133.4.camel@zakaz.uk.xensource.com>

On Thu, Feb 16, 2012 at 05:01:42PM +0000, Ian Campbell wrote:
> On Tue, 2012-01-31 at 14:40 +0000, Catalin Marinas wrote:
> > On 19 January 2012 17:35, Ian Campbell <Ian.Campbell@citrix.com> wrote:
> > > On Tue, 2012-01-03 at 16:50 +0000, Catalin Marinas wrote:
> > >> On Fri, Dec 23, 2011 at 12:00:25PM +0000, Ian Campbell wrote:
> > >> > At the moment we build the entire p2m before we ever load the VTTBR or
> > >> > enable stage-2 translations in the HCR. Is that sufficient or do we also
> > >> > need to flush something?
> > >>
> > >> If the model does not correctly implement cacheable page table walks for
> > >> either stage 1 or stage 2 translation (though ID_MMFR3[23:20] indicate
> > >> that it should), the hypervisor would need to clean the D-cache to the
> > >> point of unification (not necessary to go to the point of coherency)
> > >> before any of the state 2 translation tables are used.
> > >
> > > I added a copy of Linux's v7_flush_dcache_all after building the p2m but
> > > just before loading the VTTBR and it didn't help.
> > >
> > > I turned off cacheability in VTCR and that didn't help either.
> > >
> > > Then I turned off cacheability in the Linux TTBR{0,1} (by frobbing both
> > > TTB_FLAGS_UP and TTB_FLAGS_SMP to use FOO_NC everywhere) and this _did_
> > > make a difference -- the kernel now boots.
> > >
> > > I then tested just that change by itself and it seems to have done the
> > > trick.
> > >
> > > Does that indicate a model bug?
> > 
> > It is possible. The scenario I'm thinking of is that with cacheable
> > PTWs enabled in TTBR, the model wrongly decides to use the
> > intermediate physical address (IPA) to look up the caches and gets the
> > wrong information.
> > 
> > I'll take this to the model guys but most likely they'll ask for an
> > image to load and just run. Could you provide such simple image
> > (minimal filesystem)? I'm not familiar with Xen and building it.
> > 
> > (I'll first ask the model guys, maybe they can spot the error easily
> > without additional debugging).
> 
> Did they conclude anything? Can I provide any more info?

No, they didn't :(. They would like to run some image showing the
problem so they can trace the internal state of the model. Unfortunately
I didn't have time to look into this.

Is it possible for you to create an ELF image that can be loaded onto
the model with some instructions to show the failure?

Thanks.

-- 
Catalin

  reply	other threads:[~2012-02-16 17:18 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2011-12-22 12:08 Oops in guest after ioremap() on ARMv7 David Vrabel
2011-12-22 14:49 ` Catalin Marinas
2011-12-22 16:38   ` David Vrabel
2011-12-22 18:13     ` Catalin Marinas
2011-12-22 18:33       ` David Vrabel
2011-12-23 12:00         ` Ian Campbell
2012-01-03 16:50           ` Catalin Marinas
2012-01-19 17:35             ` Ian Campbell
2012-01-31 14:40               ` Catalin Marinas
2012-01-31 14:44                 ` Ian Campbell
2012-02-16 17:01                 ` Ian Campbell
2012-02-16 17:18                   ` Catalin Marinas [this message]
2012-02-16 17:21                     ` Ian Campbell
2011-12-22 19:29       ` Russell King - ARM Linux
2011-12-22 22:41         ` Catalin Marinas

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