* [PATCH 1/2] GPIO: LPC32xx: Fix missing bit selection mask @ 2012-02-20 21:39 Roland Stigge 2012-02-20 21:39 ` [PATCH 2/2] GPIO: LPC32xx: Add output reading to GPO P3 Roland Stigge 2012-02-21 14:02 ` [PATCH 1/2] GPIO: LPC32xx: Fix missing bit selection mask Wolfram Sang 0 siblings, 2 replies; 5+ messages in thread From: Roland Stigge @ 2012-02-20 21:39 UTC (permalink / raw) To: linux-arm-kernel Add missing mask to pin bit selection in gpio-lpc32xx.c (#define GPIO3_PIN_IN_SEL) A table indentation change was necessary due to line length restrictions, but the only relevant change is the definition of GPIO3_PIN_IN_SEL. Signed-off-by: Roland Stigge <stigge@antcom.de> --- drivers/gpio/gpio-lpc32xx.c | 70 ++++++++++++++++++++++---------------------- 1 file changed, 35 insertions(+), 35 deletions(-) --- linux-2.6.orig/drivers/gpio/gpio-lpc32xx.c +++ linux-2.6/drivers/gpio/gpio-lpc32xx.c @@ -26,42 +26,42 @@ #include <mach/platform.h> #include <mach/gpio-lpc32xx.h> -#define LPC32XX_GPIO_P3_INP_STATE _GPREG(0x000) -#define LPC32XX_GPIO_P3_OUTP_SET _GPREG(0x004) -#define LPC32XX_GPIO_P3_OUTP_CLR _GPREG(0x008) -#define LPC32XX_GPIO_P3_OUTP_STATE _GPREG(0x00C) -#define LPC32XX_GPIO_P2_DIR_SET _GPREG(0x010) -#define LPC32XX_GPIO_P2_DIR_CLR _GPREG(0x014) -#define LPC32XX_GPIO_P2_DIR_STATE _GPREG(0x018) -#define LPC32XX_GPIO_P2_INP_STATE _GPREG(0x01C) -#define LPC32XX_GPIO_P2_OUTP_SET _GPREG(0x020) -#define LPC32XX_GPIO_P2_OUTP_CLR _GPREG(0x024) -#define LPC32XX_GPIO_P2_MUX_SET _GPREG(0x028) -#define LPC32XX_GPIO_P2_MUX_CLR _GPREG(0x02C) -#define LPC32XX_GPIO_P2_MUX_STATE _GPREG(0x030) -#define LPC32XX_GPIO_P0_INP_STATE _GPREG(0x040) -#define LPC32XX_GPIO_P0_OUTP_SET _GPREG(0x044) -#define LPC32XX_GPIO_P0_OUTP_CLR _GPREG(0x048) -#define LPC32XX_GPIO_P0_OUTP_STATE _GPREG(0x04C) -#define LPC32XX_GPIO_P0_DIR_SET _GPREG(0x050) -#define LPC32XX_GPIO_P0_DIR_CLR _GPREG(0x054) -#define LPC32XX_GPIO_P0_DIR_STATE _GPREG(0x058) -#define LPC32XX_GPIO_P1_INP_STATE _GPREG(0x060) -#define LPC32XX_GPIO_P1_OUTP_SET _GPREG(0x064) -#define LPC32XX_GPIO_P1_OUTP_CLR _GPREG(0x068) -#define LPC32XX_GPIO_P1_OUTP_STATE _GPREG(0x06C) -#define LPC32XX_GPIO_P1_DIR_SET _GPREG(0x070) -#define LPC32XX_GPIO_P1_DIR_CLR _GPREG(0x074) -#define LPC32XX_GPIO_P1_DIR_STATE _GPREG(0x078) +#define LPC32XX_GPIO_P3_INP_STATE _GPREG(0x000) +#define LPC32XX_GPIO_P3_OUTP_SET _GPREG(0x004) +#define LPC32XX_GPIO_P3_OUTP_CLR _GPREG(0x008) +#define LPC32XX_GPIO_P3_OUTP_STATE _GPREG(0x00C) +#define LPC32XX_GPIO_P2_DIR_SET _GPREG(0x010) +#define LPC32XX_GPIO_P2_DIR_CLR _GPREG(0x014) +#define LPC32XX_GPIO_P2_DIR_STATE _GPREG(0x018) +#define LPC32XX_GPIO_P2_INP_STATE _GPREG(0x01C) +#define LPC32XX_GPIO_P2_OUTP_SET _GPREG(0x020) +#define LPC32XX_GPIO_P2_OUTP_CLR _GPREG(0x024) +#define LPC32XX_GPIO_P2_MUX_SET _GPREG(0x028) +#define LPC32XX_GPIO_P2_MUX_CLR _GPREG(0x02C) +#define LPC32XX_GPIO_P2_MUX_STATE _GPREG(0x030) +#define LPC32XX_GPIO_P0_INP_STATE _GPREG(0x040) +#define LPC32XX_GPIO_P0_OUTP_SET _GPREG(0x044) +#define LPC32XX_GPIO_P0_OUTP_CLR _GPREG(0x048) +#define LPC32XX_GPIO_P0_OUTP_STATE _GPREG(0x04C) +#define LPC32XX_GPIO_P0_DIR_SET _GPREG(0x050) +#define LPC32XX_GPIO_P0_DIR_CLR _GPREG(0x054) +#define LPC32XX_GPIO_P0_DIR_STATE _GPREG(0x058) +#define LPC32XX_GPIO_P1_INP_STATE _GPREG(0x060) +#define LPC32XX_GPIO_P1_OUTP_SET _GPREG(0x064) +#define LPC32XX_GPIO_P1_OUTP_CLR _GPREG(0x068) +#define LPC32XX_GPIO_P1_OUTP_STATE _GPREG(0x06C) +#define LPC32XX_GPIO_P1_DIR_SET _GPREG(0x070) +#define LPC32XX_GPIO_P1_DIR_CLR _GPREG(0x074) +#define LPC32XX_GPIO_P1_DIR_STATE _GPREG(0x078) -#define GPIO012_PIN_TO_BIT(x) (1 << (x)) -#define GPIO3_PIN_TO_BIT(x) (1 << ((x) + 25)) -#define GPO3_PIN_TO_BIT(x) (1 << (x)) -#define GPIO012_PIN_IN_SEL(x, y) (((x) >> (y)) & 1) -#define GPIO3_PIN_IN_SHIFT(x) ((x) == 5 ? 24 : 10 + (x)) -#define GPIO3_PIN_IN_SEL(x, y) ((x) >> GPIO3_PIN_IN_SHIFT(y)) -#define GPIO3_PIN5_IN_SEL(x) (((x) >> 24) & 1) -#define GPI3_PIN_IN_SEL(x, y) (((x) >> (y)) & 1) +#define GPIO012_PIN_TO_BIT(x) (1 << (x)) +#define GPIO3_PIN_TO_BIT(x) (1 << ((x) + 25)) +#define GPO3_PIN_TO_BIT(x) (1 << (x)) +#define GPIO012_PIN_IN_SEL(x, y) (((x) >> (y)) & 1) +#define GPIO3_PIN_IN_SHIFT(x) ((x) == 5 ? 24 : 10 + (x)) +#define GPIO3_PIN_IN_SEL(x, y) (((x) >> GPIO3_PIN_IN_SHIFT(y)) & 1) +#define GPIO3_PIN5_IN_SEL(x) (((x) >> 24) & 1) +#define GPI3_PIN_IN_SEL(x, y) (((x) >> (y)) & 1) struct gpio_regs { void __iomem *inp_state; ^ permalink raw reply [flat|nested] 5+ messages in thread
* [PATCH 2/2] GPIO: LPC32xx: Add output reading to GPO P3 2012-02-20 21:39 [PATCH 1/2] GPIO: LPC32xx: Fix missing bit selection mask Roland Stigge @ 2012-02-20 21:39 ` Roland Stigge 2012-02-23 13:40 ` Arnd Bergmann 2012-02-21 14:02 ` [PATCH 1/2] GPIO: LPC32xx: Fix missing bit selection mask Wolfram Sang 1 sibling, 1 reply; 5+ messages in thread From: Roland Stigge @ 2012-02-20 21:39 UTC (permalink / raw) To: linux-arm-kernel The chip offers the function to detect the current state of output of the GPO P3 pins. Useful for reading GPIO output state in Linux' GPIO API, e.g. via sysfs Signed-off-by: Roland Stigge <stigge@antcom.de> --- drivers/gpio/gpio-lpc32xx.c | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) --- linux-2.6.orig/drivers/gpio/gpio-lpc32xx.c +++ linux-2.6/drivers/gpio/gpio-lpc32xx.c @@ -62,9 +62,11 @@ #define GPIO3_PIN_IN_SEL(x, y) (((x) >> GPIO3_PIN_IN_SHIFT(y)) & 1) #define GPIO3_PIN5_IN_SEL(x) (((x) >> 24) & 1) #define GPI3_PIN_IN_SEL(x, y) (((x) >> (y)) & 1) +#define GPO3_PIN_IN_SEL(x, y) (((x) >> (y)) & 1) struct gpio_regs { void __iomem *inp_state; + void __iomem *outp_state; void __iomem *outp_set; void __iomem *outp_clr; void __iomem *dir_set; @@ -145,6 +147,7 @@ static struct gpio_regs gpio_grp_regs_p2 static struct gpio_regs gpio_grp_regs_p3 = { .inp_state = LPC32XX_GPIO_P3_INP_STATE, + .outp_state = LPC32XX_GPIO_P3_OUTP_STATE, .outp_set = LPC32XX_GPIO_P3_OUTP_SET, .outp_clr = LPC32XX_GPIO_P3_OUTP_CLR, .dir_set = LPC32XX_GPIO_P2_DIR_SET, @@ -240,6 +243,12 @@ static int __get_gpi_state_p3(struct lpc return GPI3_PIN_IN_SEL(__raw_readl(group->gpio_grp->inp_state), pin); } +static int __get_gpo_state_p3(struct lpc32xx_gpio_chip *group, + unsigned pin) +{ + return GPO3_PIN_IN_SEL(__raw_readl(group->gpio_grp->outp_state), pin); +} + /* * GENERIC_GPIO primitives. */ @@ -340,6 +349,13 @@ static void lpc32xx_gpo_set_value(struct __set_gpo_level_p3(group, pin, value); } +static int lpc32xx_gpo_get_value(struct gpio_chip *chip, unsigned pin) +{ + struct lpc32xx_gpio_chip *group = to_lpc32xx_gpio(chip); + + return __get_gpo_state_p3(group, pin); +} + static int lpc32xx_gpio_request(struct gpio_chip *chip, unsigned pin) { if (pin < chip->ngpio) @@ -427,6 +443,7 @@ static struct lpc32xx_gpio_chip lpc32xx_ .label = "gpo_p3", .direction_output = lpc32xx_gpio_dir_out_always, .set = lpc32xx_gpo_set_value, + .get = lpc32xx_gpo_get_value, .request = lpc32xx_gpio_request, .base = LPC32XX_GPO_P3_GRP, .ngpio = LPC32XX_GPO_P3_MAX, ^ permalink raw reply [flat|nested] 5+ messages in thread
* [PATCH 2/2] GPIO: LPC32xx: Add output reading to GPO P3 2012-02-20 21:39 ` [PATCH 2/2] GPIO: LPC32xx: Add output reading to GPO P3 Roland Stigge @ 2012-02-23 13:40 ` Arnd Bergmann 0 siblings, 0 replies; 5+ messages in thread From: Arnd Bergmann @ 2012-02-23 13:40 UTC (permalink / raw) To: linux-arm-kernel On Monday 20 February 2012, Roland Stigge wrote: > The chip offers the function to detect the current state of output of the GPO > P3 pins. Useful for reading GPIO output state in Linux' GPIO API, e.g. via > sysfs > > Signed-off-by: Roland Stigge <stigge@antcom.de> > Acked-by: Arnd Bergmann <arnd@arndb.de> > +static int __get_gpo_state_p3(struct lpc32xx_gpio_chip *group, > + unsigned pin) > +{ > + return GPO3_PIN_IN_SEL(__raw_readl(group->gpio_grp->outp_state), pin); > +} > + It would be nice to convert this to use readl_relaxed() everywhere instead of __raw_readl(), but that is probably better done separately. Arnd ^ permalink raw reply [flat|nested] 5+ messages in thread
* [PATCH 1/2] GPIO: LPC32xx: Fix missing bit selection mask 2012-02-20 21:39 [PATCH 1/2] GPIO: LPC32xx: Fix missing bit selection mask Roland Stigge 2012-02-20 21:39 ` [PATCH 2/2] GPIO: LPC32xx: Add output reading to GPO P3 Roland Stigge @ 2012-02-21 14:02 ` Wolfram Sang 2012-02-23 9:58 ` Arnd Bergmann 1 sibling, 1 reply; 5+ messages in thread From: Wolfram Sang @ 2012-02-21 14:02 UTC (permalink / raw) To: linux-arm-kernel On Mon, Feb 20, 2012 at 10:39:07PM +0100, Roland Stigge wrote: > Add missing mask to pin bit selection in gpio-lpc32xx.c > (#define GPIO3_PIN_IN_SEL) > > A table indentation change was necessary due to line length restrictions, but > the only relevant change is the definition of GPIO3_PIN_IN_SEL. I'd vote for violating the 80 char limit and keep the change minimal here, i.e. change only the relevant define. -- Pengutronix e.K. | Wolfram Sang | Industrial Linux Solutions | http://www.pengutronix.de/ | -------------- next part -------------- A non-text attachment was scrubbed... Name: signature.asc Type: application/pgp-signature Size: 198 bytes Desc: Digital signature URL: <http://lists.infradead.org/pipermail/linux-arm-kernel/attachments/20120221/6690580a/attachment-0001.sig> ^ permalink raw reply [flat|nested] 5+ messages in thread
* [PATCH 1/2] GPIO: LPC32xx: Fix missing bit selection mask 2012-02-21 14:02 ` [PATCH 1/2] GPIO: LPC32xx: Fix missing bit selection mask Wolfram Sang @ 2012-02-23 9:58 ` Arnd Bergmann 0 siblings, 0 replies; 5+ messages in thread From: Arnd Bergmann @ 2012-02-23 9:58 UTC (permalink / raw) To: linux-arm-kernel On Tuesday 21 February 2012, Wolfram Sang wrote: > Show Details > On Mon, Feb 20, 2012 at 10:39:07PM +0100, Roland Stigge wrote: > > Add missing mask to pin bit selection in gpio-lpc32xx.c > > (#define GPIO3_PIN_IN_SEL) > > > > A table indentation change was necessary due to line length restrictions, but > > the only relevant change is the definition of GPIO3_PIN_IN_SEL. > > I'd vote for violating the 80 char limit and keep the change minimal > here, i.e. change only the relevant define. Yes, that would be better. Another option would be to send two patches, but I would not bother with that. Arnd ^ permalink raw reply [flat|nested] 5+ messages in thread
end of thread, other threads:[~2012-02-23 13:40 UTC | newest] Thread overview: 5+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2012-02-20 21:39 [PATCH 1/2] GPIO: LPC32xx: Fix missing bit selection mask Roland Stigge 2012-02-20 21:39 ` [PATCH 2/2] GPIO: LPC32xx: Add output reading to GPO P3 Roland Stigge 2012-02-23 13:40 ` Arnd Bergmann 2012-02-21 14:02 ` [PATCH 1/2] GPIO: LPC32xx: Fix missing bit selection mask Wolfram Sang 2012-02-23 9:58 ` Arnd Bergmann
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