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From: grant.likely@secretlab.ca (Grant Likely)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH RESEND v3 2/2] GPIO: LPC32xx: Add output reading to GPO P3
Date: Mon, 12 Mar 2012 10:38:24 -0600	[thread overview]
Message-ID: <20120312163824.96F933E07B0@localhost> (raw)
In-Reply-To: <1330984871-411-2-git-send-email-stigge@antcom.de>

On Mon,  5 Mar 2012 23:01:11 +0100, Roland Stigge <stigge@antcom.de> wrote:
> The chip offers the function to detect the current state of output of the GPO
> P3 pins. Useful for reading GPIO output state in Linux' GPIO API, e.g. via
> sysfs.
> 
> Please note that this only reads back the currently programmed output state,
> not the actual electrical level in terms of a GPI function. Finally, GPO3 is
> still just an output.
> 
> Signed-off-by: Roland Stigge <stigge@antcom.de>
> Acked-by: Arnd Bergmann <arnd@arndb.de>

Applied, thanks

g.

> 
> ---
>  drivers/gpio/gpio-lpc32xx.c |   17 +++++++++++++++++
>  1 file changed, 17 insertions(+)
> 
> --- linux-2.6.orig/drivers/gpio/gpio-lpc32xx.c
> +++ linux-2.6/drivers/gpio/gpio-lpc32xx.c
> @@ -62,9 +62,11 @@
>  #define GPIO3_PIN_IN_SEL(x, y)			(((x) >> GPIO3_PIN_IN_SHIFT(y)) & 1)
>  #define GPIO3_PIN5_IN_SEL(x)			(((x) >> 24) & 1)
>  #define GPI3_PIN_IN_SEL(x, y)			(((x) >> (y)) & 1)
> +#define GPO3_PIN_IN_SEL(x, y)			(((x) >> (y)) & 1)
>  
>  struct gpio_regs {
>  	void __iomem *inp_state;
> +	void __iomem *outp_state;
>  	void __iomem *outp_set;
>  	void __iomem *outp_clr;
>  	void __iomem *dir_set;
> @@ -145,6 +147,7 @@ static struct gpio_regs gpio_grp_regs_p2
>  
>  static struct gpio_regs gpio_grp_regs_p3 = {
>  	.inp_state	= LPC32XX_GPIO_P3_INP_STATE,
> +	.outp_state	= LPC32XX_GPIO_P3_OUTP_STATE,
>  	.outp_set	= LPC32XX_GPIO_P3_OUTP_SET,
>  	.outp_clr	= LPC32XX_GPIO_P3_OUTP_CLR,
>  	.dir_set	= LPC32XX_GPIO_P2_DIR_SET,
> @@ -240,6 +243,12 @@ static int __get_gpi_state_p3(struct lpc
>  	return GPI3_PIN_IN_SEL(__raw_readl(group->gpio_grp->inp_state), pin);
>  }
>  
> +static int __get_gpo_state_p3(struct lpc32xx_gpio_chip *group,
> +	unsigned pin)
> +{
> +	return GPO3_PIN_IN_SEL(__raw_readl(group->gpio_grp->outp_state), pin);
> +}
> +
>  /*
>   * GENERIC_GPIO primitives.
>   */
> @@ -340,6 +349,13 @@ static void lpc32xx_gpo_set_value(struct
>  	__set_gpo_level_p3(group, pin, value);
>  }
>  
> +static int lpc32xx_gpo_get_value(struct gpio_chip *chip, unsigned pin)
> +{
> +	struct lpc32xx_gpio_chip *group = to_lpc32xx_gpio(chip);
> +
> +	return __get_gpo_state_p3(group, pin);
> +}
> +
>  static int lpc32xx_gpio_request(struct gpio_chip *chip, unsigned pin)
>  {
>  	if (pin < chip->ngpio)
> @@ -427,6 +443,7 @@ static struct lpc32xx_gpio_chip lpc32xx_
>  			.label			= "gpo_p3",
>  			.direction_output	= lpc32xx_gpio_dir_out_always,
>  			.set			= lpc32xx_gpo_set_value,
> +			.get			= lpc32xx_gpo_get_value,
>  			.request		= lpc32xx_gpio_request,
>  			.base			= LPC32XX_GPO_P3_GRP,
>  			.ngpio			= LPC32XX_GPO_P3_MAX,
> 
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

-- 
Grant Likely, B.Sc, P.Eng.
Secret Lab Technologies,Ltd.

  reply	other threads:[~2012-03-12 16:38 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2012-03-05 22:01 [PATCH RESEND v3 1/2] GPIO: LPC32xx: Fix missing bit selection mask Roland Stigge
2012-03-05 22:01 ` [PATCH RESEND v3 2/2] GPIO: LPC32xx: Add output reading to GPO P3 Roland Stigge
2012-03-12 16:38   ` Grant Likely [this message]
2012-03-12 16:38 ` [PATCH RESEND v3 1/2] GPIO: LPC32xx: Fix missing bit selection mask Grant Likely

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