[PATCH 0/5] Enable audio support for imx51-babbage and imx53-qsb

[PATCH 0/5] Enable audio support for imx51-babbage and imx53-qsb

[Shawn Guo]

The series enables audio support for imx51-babbage and imx53-qsb
booting from device tree.

Shawn Guo (5):
      ARM: imx: add more imx5 ssi clocks
      ARM: imx: add audmux pad setting for imx51-babbage
      ARM: imx: add audio codec clk lookup for imx53-qsb
      ARM: dts: imx51-babbage: enable audio support
      ARM: dts: imx53-qsb: enable audio support

 arch/arm/boot/dts/imx51-babbage.dts   |   28 ++++++++++++++++++++++-
 arch/arm/boot/dts/imx51.dtsi          |   33 +++++++++++++++++++++++++++
 arch/arm/boot/dts/imx53-qsb.dts       |   39 +++++++++++++++++++++++++++++++-
 arch/arm/boot/dts/imx53.dtsi          |   33 +++++++++++++++++++++++++++
 arch/arm/mach-imx/clk-imx51-imx53.c   |   40 +++++++++++++++++++++++++++++++++
 arch/arm/mach-imx/imx53-dt.c          |   19 +++++++++++++++
 arch/arm/mach-imx/mach-mx51_babbage.c |    6 +++++
 7 files changed, 196 insertions(+), 2 deletions(-)

[PATCH 1/5] ARM: imx: add more imx5 ssi clocks

[Shawn Guo]

Add more imx5 ssi clocks and lookup for device tree probe.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
---
 arch/arm/mach-imx/clk-imx51-imx53.c |   40 +++++++++++++++++++++++++++++++++++
 1 files changed, 40 insertions(+), 0 deletions(-)

diff --git a/arch/arm/mach-imx/clk-imx51-imx53.c b/arch/arm/mach-imx/clk-imx51-imx53.c
index b8a382d..26ba1c5 100644
--- a/arch/arm/mach-imx/clk-imx51-imx53.c
+++ b/arch/arm/mach-imx/clk-imx51-imx53.c
@@ -31,6 +31,11 @@ static const char *per_lp_apm_sel[] = { "main_bus", "lp_apm", };
 static const char *per_root_sel[] = { "per_podf", "ipg", };
 static const char *esdhc_c_sel[] = { "esdhc_a_podf", "esdhc_b_podf", };
 static const char *esdhc_d_sel[] = { "esdhc_a_podf", "esdhc_b_podf", };
+static const char *ssi_apm_sels[] = { "ckih1", "lp_amp", "ckih2", };
+static const char *ssi_clk_sels[] = { "pll1_sw", "pll2_sw", "pll3_sw", "ssi_apm", };
+static const char *ssi3_clk_sels[] = { "ssi1_root_gate", "ssi2_root_gate", };
+static const char *ssi_ext1_com_sels[] = { "ssi_ext1_podf", "ssi1_root_gate", };
+static const char *ssi_ext2_com_sels[] = { "ssi_ext2_podf", "ssi2_root_gate", };
 static const char *emi_slow_sel[] = { "main_bus", "ahb", };
 static const char *usb_phy_sel_str[] = { "osc", "usb_phy_podf", };
 static const char *mx51_ipu_di0_sel[] = { "di_pred", "osc", "ckih1", "tve_di", };
@@ -71,6 +76,11 @@ enum imx5_clks {
 	pll3_sw, ipu_di0_sel, ipu_di1_sel, tve_ext_sel, mx51_mipi, pll4_sw,
 	ldb_di1_sel, di_pll4_podf, ldb_di0_sel, ldb_di0_gate, usb_phy1_gate,
 	usb_phy2_gate, per_lp_apm, per_pred1, per_pred2, per_podf, per_root,
+	ssi_apm, ssi1_root_sel, ssi2_root_sel, ssi3_root_sel, ssi_ext1_sel,
+	ssi_ext2_sel, ssi_ext1_com_sel, ssi_ext2_com_sel, ssi1_root_pred,
+	ssi1_root_podf, ssi2_root_pred, ssi2_root_podf, ssi_ext1_pred,
+	ssi_ext1_podf, ssi_ext2_pred, ssi_ext2_podf, ssi1_root_gate,
+	ssi2_root_gate, ssi3_root_gate, ssi_ext1_gate, ssi_ext2_gate,
 	clk_max
 };
 
@@ -195,6 +205,28 @@ static void __init mx5_clocks_common_init(unsigned long rate_ckil,
 	clk[uart5_per_gate] = imx_clk_gate2("uart5_per_gate", "uart_root", MXC_CCM_CCGR7, 14);
 	clk[gpc_dvfs] = imx_clk_gate2("gpc_dvfs", "dummy", MXC_CCM_CCGR5, 24);
 
+	clk[ssi_apm] = imx_clk_mux("ssi_apm", MXC_CCM_CSCMR1, 8, 2, ssi_apm_sels, ARRAY_SIZE(ssi_apm_sels));
+	clk[ssi1_root_sel] = imx_clk_mux("ssi1_root_sel", MXC_CCM_CSCMR1, 14, 2, ssi_clk_sels, ARRAY_SIZE(ssi_clk_sels));
+	clk[ssi2_root_sel] = imx_clk_mux("ssi2_root_sel", MXC_CCM_CSCMR1, 12, 2, ssi_clk_sels, ARRAY_SIZE(ssi_clk_sels));
+	clk[ssi3_root_sel] = imx_clk_mux("ssi3_root_sel", MXC_CCM_CSCMR1, 11, 1, ssi3_clk_sels, ARRAY_SIZE(ssi3_clk_sels));
+	clk[ssi_ext1_sel] = imx_clk_mux("ssi_ext1_sel", MXC_CCM_CSCMR1, 28, 2, ssi_clk_sels, ARRAY_SIZE(ssi_clk_sels));
+	clk[ssi_ext2_sel] = imx_clk_mux("ssi_ext2_sel", MXC_CCM_CSCMR1, 30, 2, ssi_clk_sels, ARRAY_SIZE(ssi_clk_sels));
+	clk[ssi_ext1_com_sel] = imx_clk_mux("ssi_ext1_com_sel", MXC_CCM_CSCMR1, 0, 1, ssi_ext1_com_sels, ARRAY_SIZE(ssi_ext1_com_sels));
+	clk[ssi_ext2_com_sel] = imx_clk_mux("ssi_ext2_com_sel", MXC_CCM_CSCMR1, 1, 1, ssi_ext2_com_sels, ARRAY_SIZE(ssi_ext2_com_sels));
+	clk[ssi1_root_pred] = imx_clk_divider("ssi1_root_pred", "ssi1_root_sel", MXC_CCM_CS1CDR, 6, 3);
+	clk[ssi1_root_podf] = imx_clk_divider("ssi1_root_podf", "ssi1_root_pred", MXC_CCM_CS1CDR, 0, 6);
+	clk[ssi2_root_pred] = imx_clk_divider("ssi2_root_pred", "ssi2_root_sel", MXC_CCM_CS2CDR, 6, 3);
+	clk[ssi2_root_podf] = imx_clk_divider("ssi2_root_podf", "ssi2_root_pred", MXC_CCM_CS2CDR, 0, 6);
+	clk[ssi_ext1_pred] = imx_clk_divider("ssi_ext1_pred", "ssi_ext1_sel", MXC_CCM_CS1CDR, 22, 3);
+	clk[ssi_ext1_podf] = imx_clk_divider("ssi_ext1_podf", "ssi_ext1_pred", MXC_CCM_CS1CDR, 16, 6);
+	clk[ssi_ext2_pred] = imx_clk_divider("ssi_ext2_pred", "ssi_ext2_sel", MXC_CCM_CS2CDR, 22, 3);
+	clk[ssi_ext2_podf] = imx_clk_divider("ssi_ext2_podf", "ssi_ext2_pred", MXC_CCM_CS2CDR, 16, 6);
+	clk[ssi1_root_gate] = imx_clk_gate2("ssi1_root_gate", "ssi1_root_podf", MXC_CCM_CCGR3, 18);
+	clk[ssi2_root_gate] = imx_clk_gate2("ssi2_root_gate", "ssi2_root_podf", MXC_CCM_CCGR3, 22);
+	clk[ssi3_root_gate] = imx_clk_gate2("ssi3_root_gate", "ssi3_root_sel", MXC_CCM_CCGR3, 26);
+	clk[ssi_ext1_gate] = imx_clk_gate2("ssi_ext1_gate", "ssi_ext1_com_sel", MXC_CCM_CCGR3, 28);
+	clk[ssi_ext2_gate] = imx_clk_gate2("ssi_ext2_gate", "ssi_ext2_com_sel", MXC_CCM_CCGR3, 30);
+
 	for (i = 0; i < ARRAY_SIZE(clk); i++)
 		if (IS_ERR(clk[i]))
 			pr_err("i.MX5 clk %d: register failed with %ld\n",
@@ -237,6 +269,8 @@ static void __init mx5_clocks_common_init(unsigned long rate_ckil,
 	clk_register_clkdev(clk[ssi1_ipg_gate], NULL, "imx-ssi.0");
 	clk_register_clkdev(clk[ssi2_ipg_gate], NULL, "imx-ssi.1");
 	clk_register_clkdev(clk[ssi3_ipg_gate], NULL, "imx-ssi.2");
+	clk_register_clkdev(clk[ssi_ext1_gate], NULL, "ssi_ext.0");
+	clk_register_clkdev(clk[ssi_ext2_gate], NULL, "ssi_ext.1");
 	clk_register_clkdev(clk[sdma_gate], NULL, "imx35-sdma");
 	clk_register_clkdev(clk[cpu_podf], "cpu", NULL);
 	clk_register_clkdev(clk[iim_gate], "iim", NULL);
@@ -320,6 +354,9 @@ int __init mx51_clocks_init(unsigned long rate_ckil, unsigned long rate_osc,
 	clk_register_clkdev(clk[esdhc4_ipg_gate], "ipg", "sdhci-esdhc-imx51.3");
 	clk_register_clkdev(clk[dummy], "ahb", "sdhci-esdhc-imx51.3");
 	clk_register_clkdev(clk[esdhc4_per_gate], "per", "sdhci-esdhc-imx51.3");
+	clk_register_clkdev(clk[ssi1_ipg_gate], NULL, "83fcc000.ssi");
+	clk_register_clkdev(clk[ssi2_ipg_gate], NULL, "70014000.ssi");
+	clk_register_clkdev(clk[ssi3_ipg_gate], NULL, "83fe8000.ssi");
 
 	/* set the usboh3 parent to pll2_sw */
 	clk_set_parent(clk[usboh3_sel], clk[pll2_sw]);
@@ -406,6 +443,9 @@ int __init mx53_clocks_init(unsigned long rate_ckil, unsigned long rate_osc,
 	clk_register_clkdev(clk[esdhc4_ipg_gate], "ipg", "sdhci-esdhc-imx53.3");
 	clk_register_clkdev(clk[dummy], "ahb", "sdhci-esdhc-imx53.3");
 	clk_register_clkdev(clk[esdhc4_per_gate], "per", "sdhci-esdhc-imx53.3");
+	clk_register_clkdev(clk[ssi1_ipg_gate], NULL, "63fcc000.ssi");
+	clk_register_clkdev(clk[ssi2_ipg_gate], NULL, "50014000.ssi");
+	clk_register_clkdev(clk[ssi3_ipg_gate], NULL, "63fd0000.ssi");
 
 	/* set SDHC root clock to 200MHZ*/
 	clk_set_rate(clk[esdhc_a_podf], 200000000);
-- 
1.7.5.4

[PATCH 1/5] ARM: imx: add more imx5 ssi clocks

[Sascha Hauer]

On Fri, May 11, 2012 at 02:42:44PM +0800, Shawn Guo wrote:
> Add more imx5 ssi clocks and lookup for device tree probe.
> 
> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
> ---
>  arch/arm/mach-imx/clk-imx51-imx53.c |   40 +++++++++++++++++++++++++++++++++++
>  1 files changed, 40 insertions(+), 0 deletions(-)
> 
> diff --git a/arch/arm/mach-imx/clk-imx51-imx53.c b/arch/arm/mach-imx/clk-imx51-imx53.c
> index b8a382d..26ba1c5 100644
> --- a/arch/arm/mach-imx/clk-imx51-imx53.c
> +++ b/arch/arm/mach-imx/clk-imx51-imx53.c
> @@ -31,6 +31,11 @@ static const char *per_lp_apm_sel[] = { "main_bus", "lp_apm", };
>  static const char *per_root_sel[] = { "per_podf", "ipg", };
>  static const char *esdhc_c_sel[] = { "esdhc_a_podf", "esdhc_b_podf", };
>  static const char *esdhc_d_sel[] = { "esdhc_a_podf", "esdhc_b_podf", };
> +static const char *ssi_apm_sels[] = { "ckih1", "lp_amp", "ckih2", };
> +static const char *ssi_clk_sels[] = { "pll1_sw", "pll2_sw", "pll3_sw", "ssi_apm", };
> +static const char *ssi3_clk_sels[] = { "ssi1_root_gate", "ssi2_root_gate", };
> +static const char *ssi_ext1_com_sels[] = { "ssi_ext1_podf", "ssi1_root_gate", };
> +static const char *ssi_ext2_com_sels[] = { "ssi_ext2_podf", "ssi2_root_gate", };
>  static const char *emi_slow_sel[] = { "main_bus", "ahb", };
>  static const char *usb_phy_sel_str[] = { "osc", "usb_phy_podf", };
>  static const char *mx51_ipu_di0_sel[] = { "di_pred", "osc", "ckih1", "tve_di", };
> @@ -71,6 +76,11 @@ enum imx5_clks {
>  	pll3_sw, ipu_di0_sel, ipu_di1_sel, tve_ext_sel, mx51_mipi, pll4_sw,
>  	ldb_di1_sel, di_pll4_podf, ldb_di0_sel, ldb_di0_gate, usb_phy1_gate,
>  	usb_phy2_gate, per_lp_apm, per_pred1, per_pred2, per_podf, per_root,
> +	ssi_apm, ssi1_root_sel, ssi2_root_sel, ssi3_root_sel, ssi_ext1_sel,
> +	ssi_ext2_sel, ssi_ext1_com_sel, ssi_ext2_com_sel, ssi1_root_pred,
> +	ssi1_root_podf, ssi2_root_pred, ssi2_root_podf, ssi_ext1_pred,
> +	ssi_ext1_podf, ssi_ext2_pred, ssi_ext2_podf, ssi1_root_gate,
> +	ssi2_root_gate, ssi3_root_gate, ssi_ext1_gate, ssi_ext2_gate,
>  	clk_max
>  };
>  
> @@ -195,6 +205,28 @@ static void __init mx5_clocks_common_init(unsigned long rate_ckil,
>  	clk[uart5_per_gate] = imx_clk_gate2("uart5_per_gate", "uart_root", MXC_CCM_CCGR7, 14);
>  	clk[gpc_dvfs] = imx_clk_gate2("gpc_dvfs", "dummy", MXC_CCM_CCGR5, 24);
>  
> +	clk[ssi_apm] = imx_clk_mux("ssi_apm", MXC_CCM_CSCMR1, 8, 2, ssi_apm_sels, ARRAY_SIZE(ssi_apm_sels));
> +	clk[ssi1_root_sel] = imx_clk_mux("ssi1_root_sel", MXC_CCM_CSCMR1, 14, 2, ssi_clk_sels, ARRAY_SIZE(ssi_clk_sels));
> +	clk[ssi2_root_sel] = imx_clk_mux("ssi2_root_sel", MXC_CCM_CSCMR1, 12, 2, ssi_clk_sels, ARRAY_SIZE(ssi_clk_sels));
> +	clk[ssi3_root_sel] = imx_clk_mux("ssi3_root_sel", MXC_CCM_CSCMR1, 11, 1, ssi3_clk_sels, ARRAY_SIZE(ssi3_clk_sels));
> +	clk[ssi_ext1_sel] = imx_clk_mux("ssi_ext1_sel", MXC_CCM_CSCMR1, 28, 2, ssi_clk_sels, ARRAY_SIZE(ssi_clk_sels));
> +	clk[ssi_ext2_sel] = imx_clk_mux("ssi_ext2_sel", MXC_CCM_CSCMR1, 30, 2, ssi_clk_sels, ARRAY_SIZE(ssi_clk_sels));
> +	clk[ssi_ext1_com_sel] = imx_clk_mux("ssi_ext1_com_sel", MXC_CCM_CSCMR1, 0, 1, ssi_ext1_com_sels, ARRAY_SIZE(ssi_ext1_com_sels));
> +	clk[ssi_ext2_com_sel] = imx_clk_mux("ssi_ext2_com_sel", MXC_CCM_CSCMR1, 1, 1, ssi_ext2_com_sels, ARRAY_SIZE(ssi_ext2_com_sels));
> +	clk[ssi1_root_pred] = imx_clk_divider("ssi1_root_pred", "ssi1_root_sel", MXC_CCM_CS1CDR, 6, 3);
> +	clk[ssi1_root_podf] = imx_clk_divider("ssi1_root_podf", "ssi1_root_pred", MXC_CCM_CS1CDR, 0, 6);
> +	clk[ssi2_root_pred] = imx_clk_divider("ssi2_root_pred", "ssi2_root_sel", MXC_CCM_CS2CDR, 6, 3);
> +	clk[ssi2_root_podf] = imx_clk_divider("ssi2_root_podf", "ssi2_root_pred", MXC_CCM_CS2CDR, 0, 6);
> +	clk[ssi_ext1_pred] = imx_clk_divider("ssi_ext1_pred", "ssi_ext1_sel", MXC_CCM_CS1CDR, 22, 3);
> +	clk[ssi_ext1_podf] = imx_clk_divider("ssi_ext1_podf", "ssi_ext1_pred", MXC_CCM_CS1CDR, 16, 6);
> +	clk[ssi_ext2_pred] = imx_clk_divider("ssi_ext2_pred", "ssi_ext2_sel", MXC_CCM_CS2CDR, 22, 3);
> +	clk[ssi_ext2_podf] = imx_clk_divider("ssi_ext2_podf", "ssi_ext2_pred", MXC_CCM_CS2CDR, 16, 6);
> +	clk[ssi1_root_gate] = imx_clk_gate2("ssi1_root_gate", "ssi1_root_podf", MXC_CCM_CCGR3, 18);
> +	clk[ssi2_root_gate] = imx_clk_gate2("ssi2_root_gate", "ssi2_root_podf", MXC_CCM_CCGR3, 22);
> +	clk[ssi3_root_gate] = imx_clk_gate2("ssi3_root_gate", "ssi3_root_sel", MXC_CCM_CCGR3, 26);
> +	clk[ssi_ext1_gate] = imx_clk_gate2("ssi_ext1_gate", "ssi_ext1_com_sel", MXC_CCM_CCGR3, 28);
> +	clk[ssi_ext2_gate] = imx_clk_gate2("ssi_ext2_gate", "ssi_ext2_com_sel", MXC_CCM_CCGR3, 30);
> +
>  	for (i = 0; i < ARRAY_SIZE(clk); i++)
>  		if (IS_ERR(clk[i]))
>  			pr_err("i.MX5 clk %d: register failed with %ld\n",
> @@ -237,6 +269,8 @@ static void __init mx5_clocks_common_init(unsigned long rate_ckil,
>  	clk_register_clkdev(clk[ssi1_ipg_gate], NULL, "imx-ssi.0");
>  	clk_register_clkdev(clk[ssi2_ipg_gate], NULL, "imx-ssi.1");
>  	clk_register_clkdev(clk[ssi3_ipg_gate], NULL, "imx-ssi.2");
> +	clk_register_clkdev(clk[ssi_ext1_gate], NULL, "ssi_ext.0");
> +	clk_register_clkdev(clk[ssi_ext2_gate], NULL, "ssi_ext.1");

At some point I'd like to be able to lookup a clk based on its clkname,
given that they have a unique name anyway. The clkdev mechanism does a
good job in associating devices with clocks, but it's not very suitable
to manipulate the clock tree like you want to do here.

We could simply do a

	for_each_clk() {
		clk_register_clkdev(clk, NULL, clk->name);
	}

This at least would prevent us from adding a new clkdev each time
somebody wants to do some fixups to the clock tree. I don't know if any
plans are existing to do something like this directly in the clock
framework instead.

Sascha


-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |

[PATCH 1/5] ARM: imx: add more imx5 ssi clocks

[Shawn Guo]

On Fri, May 11, 2012 at 09:42:22AM +0200, Sascha Hauer wrote:
> > +	clk_register_clkdev(clk[ssi_ext1_gate], NULL, "ssi_ext.0");
> > +	clk_register_clkdev(clk[ssi_ext2_gate], NULL, "ssi_ext.1");
> 
> At some point I'd like to be able to lookup a clk based on its clkname,
> given that they have a unique name anyway. The clkdev mechanism does a
> good job in associating devices with clocks, but it's not very suitable
> to manipulate the clock tree like you want to do here.
> 
I'm fine with that.  But last time, you add clkname into struct
clk_lookup, I have seen some comments against that.  But let's see.

> We could simply do a
> 
> 	for_each_clk() {
> 		clk_register_clkdev(clk, NULL, clk->name);
> 	}
> 
> This at least would prevent us from adding a new clkdev each time
> somebody wants to do some fixups to the clock tree. I don't know if any
> plans are existing to do something like this directly in the clock
> framework instead.
> 
I think this has to be get done at framework level, as clk->name is not
accessible in clock provider, unless we include clk-private.h.

-- 
Regards,
Shawn

[PATCH 1/5] ARM: imx: add more imx5 ssi clocks

[Sascha Hauer]

On Fri, May 11, 2012 at 02:42:44PM +0800, Shawn Guo wrote:
> Add more imx5 ssi clocks and lookup for device tree probe.
> 
> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
> ---
>  arch/arm/mach-imx/clk-imx51-imx53.c |   40 +++++++++++++++++++++++++++++++++++
>  1 files changed, 40 insertions(+), 0 deletions(-)
> 
> diff --git a/arch/arm/mach-imx/clk-imx51-imx53.c b/arch/arm/mach-imx/clk-imx51-imx53.c
>  	for (i = 0; i < ARRAY_SIZE(clk); i++)
>  		if (IS_ERR(clk[i]))
>  			pr_err("i.MX5 clk %d: register failed with %ld\n",
> @@ -237,6 +269,8 @@ static void __init mx5_clocks_common_init(unsigned long rate_ckil,
>  	clk_register_clkdev(clk[ssi1_ipg_gate], NULL, "imx-ssi.0");
>  	clk_register_clkdev(clk[ssi2_ipg_gate], NULL, "imx-ssi.1");
>  	clk_register_clkdev(clk[ssi3_ipg_gate], NULL, "imx-ssi.2");
> +	clk_register_clkdev(clk[ssi_ext1_gate], NULL, "ssi_ext.0");
> +	clk_register_clkdev(clk[ssi_ext2_gate], NULL, "ssi_ext.1");

Another thing I just noticed is that you use ssi_ext.0|1 as the device id,
is that what you want? I think the device id should either match a real
device present in the system or be NULL.

Sascha


-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |

[PATCH 1/5] ARM: imx: add more imx5 ssi clocks

[Shawn Guo]

On Fri, May 11, 2012 at 09:47:01AM +0200, Sascha Hauer wrote:
> > +	clk_register_clkdev(clk[ssi_ext1_gate], NULL, "ssi_ext.0");
> > +	clk_register_clkdev(clk[ssi_ext2_gate], NULL, "ssi_ext.1");
> 
> Another thing I just noticed is that you use ssi_ext.0|1 as the device id,
> is that what you want? I think the device id should either match a real
> device present in the system or be NULL.
> 
Good catch.  Thanks, Sascha.  Fixed as below.

Regards,
Shawn

diff --git a/arch/arm/mach-imx/clk-imx51-imx53.c b/arch/arm/mach-imx/clk-imx51-imx53.c
index 26ba1c5..fcd94f3 100644
--- a/arch/arm/mach-imx/clk-imx51-imx53.c
+++ b/arch/arm/mach-imx/clk-imx51-imx53.c
@@ -269,8 +269,8 @@ static void __init mx5_clocks_common_init(unsigned long rate_ckil,
        clk_register_clkdev(clk[ssi1_ipg_gate], NULL, "imx-ssi.0");
        clk_register_clkdev(clk[ssi2_ipg_gate], NULL, "imx-ssi.1");
        clk_register_clkdev(clk[ssi3_ipg_gate], NULL, "imx-ssi.2");
-       clk_register_clkdev(clk[ssi_ext1_gate], NULL, "ssi_ext.0");
-       clk_register_clkdev(clk[ssi_ext2_gate], NULL, "ssi_ext.1");
+       clk_register_clkdev(clk[ssi_ext1_gate], "ssi_ext1", NULL);
+       clk_register_clkdev(clk[ssi_ext2_gate], "ssi_ext2", NULL);
        clk_register_clkdev(clk[sdma_gate], NULL, "imx35-sdma");
        clk_register_clkdev(clk[cpu_podf], "cpu", NULL);
        clk_register_clkdev(clk[iim_gate], "iim", NULL);
diff --git a/arch/arm/mach-imx/imx53-dt.c b/arch/arm/mach-imx/imx53-dt.c
index 52455ea..8b002fcd 100644
--- a/arch/arm/mach-imx/imx53-dt.c
+++ b/arch/arm/mach-imx/imx53-dt.c
@@ -87,9 +87,9 @@ static void __init imx53_qsb_init(void)
 {
        struct clk *clk;

-       clk = clk_get_sys("ssi_ext.0", NULL);
+       clk = clk_get_sys(NULL, "ssi_ext1");
        if (IS_ERR(clk)) {
-               pr_err("failed to get clk ssi_ext.0\n");
+               pr_err("failed to get clk ssi_ext1\n");
                return;
        }

[PATCH 2/5] ARM: imx: add audmux pad setting for imx51-babbage

[Shawn Guo]

Before i.MX51 Pinctrl support is available, we have to reply on
the iomux initialization in non-DT board file to set iomux up for
DT boot.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
---
 arch/arm/mach-imx/mach-mx51_babbage.c |    6 ++++++
 1 files changed, 6 insertions(+), 0 deletions(-)

diff --git a/arch/arm/mach-imx/mach-mx51_babbage.c b/arch/arm/mach-imx/mach-mx51_babbage.c
index e4b822e..517672e 100644
--- a/arch/arm/mach-imx/mach-mx51_babbage.c
+++ b/arch/arm/mach-imx/mach-mx51_babbage.c
@@ -163,6 +163,12 @@ static iomux_v3_cfg_t mx51babbage_pads[] = {
 	MX51_PAD_CSPI1_SCLK__ECSPI1_SCLK,
 	MX51_PAD_CSPI1_SS0__GPIO4_24,
 	MX51_PAD_CSPI1_SS1__GPIO4_25,
+
+	/* Audio */
+	MX51_PAD_AUD3_BB_TXD__AUD3_TXD,
+	MX51_PAD_AUD3_BB_RXD__AUD3_RXD,
+	MX51_PAD_AUD3_BB_CK__AUD3_TXC,
+	MX51_PAD_AUD3_BB_FS__AUD3_TXFS,
 };
 
 /* Serial ports */
-- 
1.7.5.4

[PATCH 3/5] ARM: imx: add audio codec clk lookup for imx53-qsb

[Shawn Guo]

On imx53-qsb board, the clk ssi_ext.0 is used as the clock input
to audio codec sgtl5000.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
---
 arch/arm/mach-imx/imx53-dt.c |   19 +++++++++++++++++++
 1 files changed, 19 insertions(+), 0 deletions(-)

diff --git a/arch/arm/mach-imx/imx53-dt.c b/arch/arm/mach-imx/imx53-dt.c
index 574eca4..139ec4e 100644
--- a/arch/arm/mach-imx/imx53-dt.c
+++ b/arch/arm/mach-imx/imx53-dt.c
@@ -10,6 +10,9 @@
  * http://www.gnu.org/copyleft/gpl.html
  */
 
+#include <linux/clk.h>
+#include <linux/clkdev.h>
+#include <linux/err.h>
 #include <linux/io.h>
 #include <linux/irq.h>
 #include <linux/irqdomain.h>
@@ -81,6 +84,19 @@ static const struct of_device_id imx53_iomuxc_of_match[] __initconst = {
 	{ /* sentinel */ }
 };
 
+static void __init imx53_qsb_init(void)
+{
+	struct clk *clk;
+
+	clk = clk_get_sys("ssi_ext.0", NULL);
+	if (IS_ERR(clk)) {
+		pr_err("failed to get clk ssi_ext.0\n");
+		return;
+	}
+
+	clk_register_clkdev(clk, NULL, "0-000a");
+}
+
 static void __init imx53_dt_init(void)
 {
 	struct device_node *node;
@@ -99,6 +115,9 @@ static void __init imx53_dt_init(void)
 		of_node_put(node);
 	}
 
+	if (of_machine_is_compatible("fsl,imx53-qsb"))
+		imx53_qsb_init();
+
 	of_platform_populate(NULL, of_default_bus_match_table,
 			     imx53_auxdata_lookup, NULL);
 }
-- 
1.7.5.4

[PATCH 3/5] ARM: imx: add audio codec clk lookup for imx53-qsb

[Sascha Hauer]

On Fri, May 11, 2012 at 02:42:46PM +0800, Shawn Guo wrote:
> On imx53-qsb board, the clk ssi_ext.0 is used as the clock input
> to audio codec sgtl5000.
> 
> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
> ---
>  arch/arm/mach-imx/imx53-dt.c |   19 +++++++++++++++++++
>  1 files changed, 19 insertions(+), 0 deletions(-)
> 
> diff --git a/arch/arm/mach-imx/imx53-dt.c b/arch/arm/mach-imx/imx53-dt.c
> index 574eca4..139ec4e 100644
> --- a/arch/arm/mach-imx/imx53-dt.c
> +++ b/arch/arm/mach-imx/imx53-dt.c
> @@ -10,6 +10,9 @@
>   * http://www.gnu.org/copyleft/gpl.html
>   */
>  
> +#include <linux/clk.h>
> +#include <linux/clkdev.h>
> +#include <linux/err.h>
>  #include <linux/io.h>
>  #include <linux/irq.h>
>  #include <linux/irqdomain.h>
> @@ -81,6 +84,19 @@ static const struct of_device_id imx53_iomuxc_of_match[] __initconst = {
>  	{ /* sentinel */ }
>  };
>  
> +static void __init imx53_qsb_init(void)
> +{
> +	struct clk *clk;
> +
> +	clk = clk_get_sys("ssi_ext.0", NULL);
> +	if (IS_ERR(clk)) {
> +		pr_err("failed to get clk ssi_ext.0\n");
> +		return;
> +	}
> +
> +	clk_register_clkdev(clk, NULL, "0-000a");
> +}
> +
>  static void __init imx53_dt_init(void)
>  {
>  	struct device_node *node;
> @@ -99,6 +115,9 @@ static void __init imx53_dt_init(void)
>  		of_node_put(node);
>  	}
>  
> +	if (of_machine_is_compatible("fsl,imx53-qsb"))
> +		imx53_qsb_init();
> +

I wonder if we really want to open this can of worms here. Adding board
specific hacks (or fixups) in this file can become very messy once we
have more than only a few oftree based boards.

Sascha

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |

[PATCH 3/5] ARM: imx: add audio codec clk lookup for imx53-qsb

[Shawn Guo]

On Mon, May 14, 2012 at 10:22:01AM +0200, Sascha Hauer wrote:
> >  static void __init imx53_dt_init(void)
> >  {
> >  	struct device_node *node;
> > @@ -99,6 +115,9 @@ static void __init imx53_dt_init(void)
> >  		of_node_put(node);
> >  	}
> >  
> > +	if (of_machine_is_compatible("fsl,imx53-qsb"))
> > +		imx53_qsb_init();
> > +
> 
> I wonder if we really want to open this can of worms here. Adding board
> specific hacks (or fixups) in this file can become very messy once we
> have more than only a few oftree based boards.
> 
>From what I have seen, this is an acceptable solution to board specific
setup.  What's the alternative on your mind?

-- 
Regards,
Shawn

[PATCH 3/5] ARM: imx: add audio codec clk lookup for imx53-qsb

[Sascha Hauer]

On Mon, May 14, 2012 at 04:50:03PM +0800, Shawn Guo wrote:
> On Mon, May 14, 2012 at 10:22:01AM +0200, Sascha Hauer wrote:
> > >  static void __init imx53_dt_init(void)
> > >  {
> > >  	struct device_node *node;
> > > @@ -99,6 +115,9 @@ static void __init imx53_dt_init(void)
> > >  		of_node_put(node);
> > >  	}
> > >  
> > > +	if (of_machine_is_compatible("fsl,imx53-qsb"))
> > > +		imx53_qsb_init();
> > > +
> > 
> > I wonder if we really want to open this can of worms here. Adding board
> > specific hacks (or fixups) in this file can become very messy once we
> > have more than only a few oftree based boards.
> > 
> From what I have seen, this is an acceptable solution to board specific
> setup.  What's the alternative on your mind?

Right now I do not have an alternative, I just try to see 2 years in the
future. Maybe until then we can do it this way and then I'll point to
this post saying 'I told you' ;)

I hope we won't get to that point. The above should be really in the
devicetree, right?

Sascha

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |

[PATCH 3/5] ARM: imx: add audio codec clk lookup for imx53-qsb

[Shawn Guo]

On Mon, May 14, 2012 at 10:53:48AM +0200, Sascha Hauer wrote:
> I hope we won't get to that point. The above should be really in the
> devicetree, right?

If you are talking about that clk lookup, yes, the board specific clk
lookup is the best candidate going into device tree.

-- 
Regards,
Shawn

[PATCH 4/5] ARM: dts: imx51-babbage: enable audio support

[Shawn Guo]

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
---
 arch/arm/boot/dts/imx51-babbage.dts |   28 +++++++++++++++++++++++++++-
 arch/arm/boot/dts/imx51.dtsi        |   33 +++++++++++++++++++++++++++++++++
 2 files changed, 60 insertions(+), 1 deletions(-)

diff --git a/arch/arm/boot/dts/imx51-babbage.dts b/arch/arm/boot/dts/imx51-babbage.dts
index d42a404..de065b5 100644
--- a/arch/arm/boot/dts/imx51-babbage.dts
+++ b/arch/arm/boot/dts/imx51-babbage.dts
@@ -162,6 +162,11 @@
 						};
 					};
 				};
+
+				ssi2: ssi at 70014000 {
+					fsl,mode = "i2s-slave";
+					status = "okay";
+				};
 			};
 
 			wdog at 73f98000 { /* WDOG1 */
@@ -191,12 +196,19 @@
 			i2c at 83fc4000 { /* I2C2 */
 				status = "okay";
 
-				codec: sgtl5000 at 0a {
+				sgtl5000: codec at 0a {
 					compatible = "fsl,sgtl5000";
 					reg = <0x0a>;
+					clock-frequency = <26000000>;
+					VDDA-supply = <&vdig_reg>;
+					VDDIO-supply = <&vvideo_reg>;
 				};
 			};
 
+			audmux at 83fd0000 {
+				status = "okay";
+			};
+
 			ethernet at 83fec000 {
 				phy-mode = "mii";
 				status = "okay";
@@ -214,4 +226,18 @@
 			gpio-key,wakeup;
 		};
 	};
+
+	sound {
+		compatible = "fsl,imx51-babbage-sgtl5000",
+			     "fsl,imx-audio-sgtl5000";
+		model = "imx51-babbage-sgtl5000";
+		ssi-controller = <&ssi2>;
+		audio-codec = <&sgtl5000>;
+		audio-routing =
+			"MIC_IN", "Mic Jack",
+			"Mic Jack", "Mic Bias",
+			"Headphone Jack", "HP_OUT";
+		mux-int-port = <2>;
+		mux-ext-port = <3>;
+	};
 };
diff --git a/arch/arm/boot/dts/imx51.dtsi b/arch/arm/boot/dts/imx51.dtsi
index 66f0ebd..bfa65ab 100644
--- a/arch/arm/boot/dts/imx51.dtsi
+++ b/arch/arm/boot/dts/imx51.dtsi
@@ -102,6 +102,15 @@
 					status = "disabled";
 				};
 
+				ssi2: ssi at 70014000 {
+					compatible = "fsl,imx51-ssi", "fsl,imx21-ssi";
+					reg = <0x70014000 0x4000>;
+					interrupts = <30>;
+					fsl,fifo-depth = <15>;
+					fsl,ssi-dma-events = <25 24 23 22>; /* TX0 RX0 TX1 RX1 */
+					status = "disabled";
+				};
+
 				esdhc at 70020000 { /* ESDHC3 */
 					compatible = "fsl,imx51-esdhc";
 					reg = <0x70020000 0x4000>;
@@ -235,6 +244,30 @@
 				status = "disabled";
 			};
 
+			ssi1: ssi at 83fcc000 {
+				compatible = "fsl,imx51-ssi", "fsl,imx21-ssi";
+				reg = <0x83fcc000 0x4000>;
+				interrupts = <29>;
+				fsl,fifo-depth = <15>;
+				fsl,ssi-dma-events = <29 28 27 26>; /* TX0 RX0 TX1 RX1 */
+				status = "disabled";
+			};
+
+			audmux at 83fd0000 {
+				compatible = "fsl,imx51-audmux", "fsl,imx31-audmux";
+				reg = <0x83fd0000 0x4000>;
+				status = "disabled";
+			};
+
+			ssi3: ssi at 83fe8000 {
+				compatible = "fsl,imx51-ssi", "fsl,imx21-ssi";
+				reg = <0x83fe8000 0x4000>;
+				interrupts = <96>;
+				fsl,fifo-depth = <15>;
+				fsl,ssi-dma-events = <47 46 37 35>; /* TX0 RX0 TX1 RX1 */
+				status = "disabled";
+			};
+
 			ethernet at 83fec000 {
 				compatible = "fsl,imx51-fec", "fsl,imx27-fec";
 				reg = <0x83fec000 0x4000>;
-- 
1.7.5.4

[PATCH 4/5] ARM: dts: imx51-babbage: enable audio support

[Fabio Estevam]

Shawn,

On 5/11/12, Shawn Guo <shawn.guo@linaro.org> wrote:
> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
> ---
>  arch/arm/boot/dts/imx51-babbage.dts |   28 +++++++++++++++++++++++++++-
>  arch/arm/boot/dts/imx51.dtsi        |   33

Looking at the Freescale kernel I see some GPIOs that need to be
setup, such as audio oscillator enable pin (GPUO4_26), but I don't see
any audio related GPIO pin in your patch.

Will this be added later via pinctrl?

Regards,

Fabio Estevam

[PATCH 4/5] ARM: dts: imx51-babbage: enable audio support

[Shawn Guo]

On Fri, May 11, 2012 at 10:18:13AM -0300, Fabio Estevam wrote:
> Shawn,
> 
> On 5/11/12, Shawn Guo <shawn.guo@linaro.org> wrote:
> > Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
> > ---
> >  arch/arm/boot/dts/imx51-babbage.dts |   28 +++++++++++++++++++++++++++-
> >  arch/arm/boot/dts/imx51.dtsi        |   33
> 
> Looking at the Freescale kernel I see some GPIOs that need to be
> setup, such as audio oscillator enable pin (GPUO4_26), but I don't see
> any audio related GPIO pin in your patch.
> 
Yes, I noticed that.  But it seems to me that the oscillator is enabled
by default anyway, so for now, I treat it as a fixed-rate clock without
gating and have the frequency defined in device tree.

> Will this be added later via pinctrl?
> 
For later, we will probably have another basic clk type supported in
clk framework, fixed-rate clock with a gpio control as the gating.

-- 
Regards,
Shawn

[PATCH 5/5] ARM: dts: imx53-qsb: enable audio support

[Shawn Guo]

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
---
 arch/arm/boot/dts/imx53-qsb.dts |   39 ++++++++++++++++++++++++++++++++++++++-
 arch/arm/boot/dts/imx53.dtsi    |   33 +++++++++++++++++++++++++++++++++
 2 files changed, 71 insertions(+), 1 deletions(-)

diff --git a/arch/arm/boot/dts/imx53-qsb.dts b/arch/arm/boot/dts/imx53-qsb.dts
index 393e90d..2d803a9 100644
--- a/arch/arm/boot/dts/imx53-qsb.dts
+++ b/arch/arm/boot/dts/imx53-qsb.dts
@@ -29,6 +29,11 @@
 					status = "okay";
 				};
 
+				ssi2: ssi at 50014000 {
+					fsl,mode = "i2s-slave";
+					status = "okay";
+				};
+
 				esdhc at 50020000 { /* ESDHC3 */
 					cd-gpios = <&gpio3 11 0>;
 					wp-gpios = <&gpio3 12 0>;
@@ -58,9 +63,11 @@
 			i2c at 63fc4000 { /* I2C2 */
 				status = "okay";
 
-				codec: sgtl5000 at 0a {
+				sgtl5000: codec at 0a {
 					compatible = "fsl,sgtl5000";
 					reg = <0x0a>;
+					VDDA-supply = <&reg_3p2v>;
+					VDDIO-supply = <&reg_3p2v>;
 				};
 			};
 
@@ -150,6 +157,10 @@
 				};
 			};
 
+			audmux at 63fd0000 {
+				status = "okay";
+			};
+
 			ethernet at 63fec000 {
 				phy-mode = "rmii";
 				phy-reset-gpios = <&gpio7 6 0>;
@@ -190,4 +201,30 @@
 			linux,default-trigger = "heartbeat";
 		};
 	};
+
+	regulators {
+		compatible = "simple-bus";
+
+		reg_3p2v: 3p2v {
+			compatible = "regulator-fixed";
+			regulator-name = "3P2V";
+			regulator-min-microvolt = <3200000>;
+			regulator-max-microvolt = <3200000>;
+			regulator-always-on;
+		};
+	};
+
+	sound {
+		compatible = "fsl,imx53-qsb-sgtl5000",
+			     "fsl,imx-audio-sgtl5000";
+		model = "imx53-qsb-sgtl5000";
+		ssi-controller = <&ssi2>;
+		audio-codec = <&sgtl5000>;
+		audio-routing =
+			"MIC_IN", "Mic Jack",
+			"Mic Jack", "Mic Bias",
+			"Headphone Jack", "HP_OUT";
+		mux-int-port = <2>;
+		mux-ext-port = <5>;
+	};
 };
diff --git a/arch/arm/boot/dts/imx53.dtsi b/arch/arm/boot/dts/imx53.dtsi
index 5188615..e3e8694 100644
--- a/arch/arm/boot/dts/imx53.dtsi
+++ b/arch/arm/boot/dts/imx53.dtsi
@@ -104,6 +104,15 @@
 					status = "disabled";
 				};
 
+				ssi2: ssi at 50014000 {
+					compatible = "fsl,imx53-ssi", "fsl,imx21-ssi";
+					reg = <0x50014000 0x4000>;
+					interrupts = <30>;
+					fsl,fifo-depth = <15>;
+					fsl,ssi-dma-events = <25 24 23 22>; /* TX0 RX0 TX1 RX1 */
+					status = "disabled";
+				};
+
 				esdhc at 50020000 { /* ESDHC3 */
 					compatible = "fsl,imx53-esdhc";
 					reg = <0x50020000 0x4000>;
@@ -290,6 +299,30 @@
 				status = "disabled";
 			};
 
+			ssi1: ssi at 63fcc000 {
+				compatible = "fsl,imx53-ssi", "fsl,imx21-ssi";
+				reg = <0x63fcc000 0x4000>;
+				interrupts = <29>;
+				fsl,fifo-depth = <15>;
+				fsl,ssi-dma-events = <29 28 27 26>; /* TX0 RX0 TX1 RX1 */
+				status = "disabled";
+			};
+
+			audmux at 63fd0000 {
+				compatible = "fsl,imx53-audmux", "fsl,imx31-audmux";
+				reg = <0x63fd0000 0x4000>;
+				status = "disabled";
+			};
+
+			ssi3: ssi at 63fe8000 {
+				compatible = "fsl,imx53-ssi", "fsl,imx21-ssi";
+				reg = <0x63fe8000 0x4000>;
+				interrupts = <96>;
+				fsl,fifo-depth = <15>;
+				fsl,ssi-dma-events = <47 46 45 44>; /* TX0 RX0 TX1 RX1 */
+				status = "disabled";
+			};
+
 			ethernet at 63fec000 {
 				compatible = "fsl,imx53-fec", "fsl,imx25-fec";
 				reg = <0x63fec000 0x4000>;
-- 
1.7.5.4