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From: catalin.marinas@arm.com (Catalin Marinas)
To: linux-arm-kernel@lists.infradead.org
Subject: [RFC 03/23] ARM: LPAE: use phys_addr_t on virt <--> phys conversion
Date: Tue, 24 Jul 2012 12:02:54 +0100	[thread overview]
Message-ID: <20120724110254.GG20132@arm.com> (raw)
In-Reply-To: <500E7F22.9090803@ti.com>

On Tue, Jul 24, 2012 at 11:55:30AM +0100, Cyril Chemparathy wrote:
> On 7/24/2012 6:37 AM, Catalin Marinas wrote:
> > On Tue, Jul 24, 2012 at 02:09:05AM +0100, Cyril Chemparathy wrote:
> >> This patch fixes up the types used when converting back and forth between
> >> physical and virtual addresses.
> >>
> >> Signed-off-by: Vitaly Andrianov <vitalya@ti.com>
> >> Signed-off-by: Cyril Chemparathy <cyril@ti.com>
> >> ---
> >>   arch/arm/include/asm/memory.h |   17 +++++++++++------
> >>   1 file changed, 11 insertions(+), 6 deletions(-)
> >>
> >> diff --git a/arch/arm/include/asm/memory.h b/arch/arm/include/asm/memory.h
> >> index fcb5757..7629dfe 100644
> >> --- a/arch/arm/include/asm/memory.h
> >> +++ b/arch/arm/include/asm/memory.h
> >> @@ -169,22 +169,27 @@ extern unsigned long __pv_phys_offset;
> >>   	: "=r" (to)					\
> >>   	: "r" (from), "I" (type))
> >>
> >> -static inline unsigned long __virt_to_phys(unsigned long x)
> >> +static inline phys_addr_t __virt_to_phys(unsigned long x)
> >>   {
> >>   	unsigned long t;
> >>   	__pv_stub(x, t, "add", __PV_BITS_31_24);
> >>   	return t;
> >>   }
> >>
> >> -static inline unsigned long __phys_to_virt(unsigned long x)
> >> +static inline unsigned long __phys_to_virt(phys_addr_t x)
> >>   {
> >>   	unsigned long t;
> >>   	__pv_stub(x, t, "sub", __PV_BITS_31_24);
> >>   	return t;
> >>   }
> >
> > BTW, I would prefer if the phys-to-virt patching was fixed as well. It
> > shouldn't be difficult.
> 
> On that topic - yes, we have this on our radar, but in our case we;re 
> talking about patching (in head.S) and then repatching (at switch over).
> 
> One of the ideas we've been bouncing around has been to convert the 
> phys-virt patch code into arithmetic on PFNs.  This way we don't have to 
> get too messy with 64-bit in the patch code, and we can use the same 
> patch code for both phys_to_virt and virt_to_phys.  Thoughts on this 
> approach?

It may be slightly less efficient with Thumb-2 code as we can't have add
and lsl in the same instruction. It may anyway be faster than reading a
global variable.

But I suspect you can just mask out the top 32-bit part of a physical
address when converting to virtual. The opposite may also work, you just
have some constant in the top 32-bit part of the phys address. Note that
virt_to_phys is only valid for the lowmem, so 32-bit arithmetic with
some constant for the top 32-bit should be enough.

-- 
Catalin

  reply	other threads:[~2012-07-24 11:02 UTC|newest]

Thread overview: 44+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2012-07-24  1:09 [RFC 00/23] Introducing the TI Keystone platform Cyril Chemparathy
2012-07-24  1:09 ` [RFC 01/23] ARM: LPAE: disable phys-to-virt patching on PAE systems Cyril Chemparathy
2012-07-24  9:41   ` Catalin Marinas
2012-07-24 10:43     ` Cyril Chemparathy
2012-07-24  1:09 ` [RFC 02/23] ARM: LPAE: use signed arithmetic for mask definitions Cyril Chemparathy
2012-07-24 10:05   ` Catalin Marinas
2012-07-24 10:52     ` Cyril Chemparathy
2012-07-31 15:35     ` Cyril Chemparathy
2012-07-24  1:09 ` [RFC 05/23] ARM: LPAE: use phys_addr_t in free_memmap() Cyril Chemparathy
2012-07-24  1:10 ` [RFC 04/23] ARM: LPAE: use phys_addr_t in alloc_init_pud() Cyril Chemparathy
2012-07-24  1:10 ` [RFC 08/23] ARM: LPAE: use 64-bit pgd physical address in switch_mm() Cyril Chemparathy
2012-07-24  1:10 ` [RFC 11/23] ARM: mm: cleanup checks for membank overlap with vmalloc area Cyril Chemparathy
2012-07-24  1:10 ` [RFC 16/23] ARM: LPAE: accomodate >32-bit addresses for page table base Cyril Chemparathy
2012-07-24  1:10 ` [RFC 07/23] ARM: LPAE: use phys_addr_t for membank size Cyril Chemparathy
2012-07-24 10:04   ` Will Deacon
2012-07-24 10:46     ` Cyril Chemparathy
2012-07-24  1:10 ` [RFC 20/23] mm: bootmem: use phys_addr_t for physical addresses Cyril Chemparathy
2012-07-24  1:10 ` [RFC 12/23] ARM: mm: clean up membank size limit checks Cyril Chemparathy
2012-07-24  1:10 ` [RFC 17/23] ARM: add machine desc hook for early memory/paging initialization Cyril Chemparathy
2012-07-24 14:32   ` Arnd Bergmann
2012-07-24 14:47     ` Cyril Chemparathy
2012-07-24  1:10 ` [RFC 03/23] ARM: LPAE: use phys_addr_t on virt <--> phys conversion Cyril Chemparathy
2012-07-24 10:37   ` Catalin Marinas
2012-07-24 10:55     ` Cyril Chemparathy
2012-07-24 11:02       ` Catalin Marinas [this message]
2012-07-24  1:10 ` [RFC 18/23] ARM: add virt_to_idmap for interconnect aliasing Cyril Chemparathy
2012-07-24  1:10 ` [RFC 09/23] ARM: LPAE: use 64-bit accessors for TTBR registers Cyril Chemparathy
2012-07-24  1:10 ` [RFC 13/23] ARM: LPAE: define ARCH_LOW_ADDRESS_LIMIT for bootmem Cyril Chemparathy
2012-07-24  1:10 ` [RFC 10/23] ARM: mm: use physical addresses in highmem sanity checks Cyril Chemparathy
2012-07-24  1:10 ` [RFC 22/23] ARM: keystone: enable SMP on Keystone machines Cyril Chemparathy
2012-07-24  1:10 ` [RFC 15/23] ARM: LPAE: allow proc override of TTB setup Cyril Chemparathy
2012-07-24  1:33 ` [RFC 23/23] ARM: keystone: add switch over to high physical address range Cyril Chemparathy
2012-07-24  9:49   ` Catalin Marinas
2012-07-24 14:39   ` Arnd Bergmann
2012-07-24 14:59     ` Cyril Chemparathy
2012-07-24  1:33 ` [RFC 06/23] ARM: LPAE: use phys_addr_t for initrd location and size Cyril Chemparathy
2012-07-24  1:38 ` [RFC 19/23] drivers: cma: fix addressing on PAE machines Cyril Chemparathy
2012-07-24  1:38 ` [RFC 21/23] ARM: keystone: introducing TI Keystone platform Cyril Chemparathy
2012-07-24 14:46   ` Arnd Bergmann
2012-07-24 17:56     ` Cyril Chemparathy
2012-07-24 18:45       ` Arnd Bergmann
2012-07-24  1:38 ` [RFC 14/23] ARM: LPAE: factor out T1SZ and TTBR1 computations Cyril Chemparathy
2012-07-24  9:08 ` [RFC 00/23] Introducing the TI Keystone platform Will Deacon
2012-07-24 10:41   ` Cyril Chemparathy

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