[PATCH v3 0/8] ARM/dts: OMAP audio related updates for OMAP2/3/4/5

[PATCH v3 0/8] ARM/dts: OMAP audio related updates for OMAP2/3/4/5

[Peter Ujfalusi]

Hello,

Changes since v2:
- Fixed the interrupts properties of McBSP for OMAP2/3
- omap2420.dtsi, omap2430.dtsi header date updated to 2012

Changes since v1:
- Rebased on current l-o:devel-dt branch
- Two new patch, one for OMAP4 to add reg-names for the mem areas, one for OMAP5
  to add McPDM and DMIC section

The series adds/fixes the audio related IPs (McBSP, McPDM, DMIC) in the dtsi
files and enable the audio on BeagleBoard when booted with DT.

I have created on top of:
git://git.kernel.org/pub/scm/linux/kernel/git/bcousson/linux-omap-dt.git
for_3.7/dts

Regards,
Peter
---
Peter Ujfalusi (8):
  ARM/dts: omap2: Add McBSP entries for OMAP2420 and OMAP2430 SoC
  ARM/dts: omap2420-h4: Include omap2420.dtsi file instead the common
    omap2
  ARM/dts: omap3: Add McBSP entries
  ARM/dts: omap4: Add McBSP entries
  ARM/dts: omap4: Add reg-names for McPDM and DMIC
  ARM/dts: omap5: Add McBSP entries
  ARM/dts: omap5: Add McPDM and DMIC section to the dtsi file
  ARM/dts: omap3-beagle: Enable audio support

 arch/arm/boot/dts/omap2420-h4.dts  |  2 +-
 arch/arm/boot/dts/omap2420.dtsi    | 39 ++++++++++++++++++
 arch/arm/boot/dts/omap2430.dtsi    | 83 ++++++++++++++++++++++++++++++++++++++
 arch/arm/boot/dts/omap3-beagle.dts | 14 +++++++
 arch/arm/boot/dts/omap3.dtsi       | 69 +++++++++++++++++++++++++++++++
 arch/arm/boot/dts/omap4.dtsi       | 49 ++++++++++++++++++++++
 arch/arm/boot/dts/omap5.dtsi       | 56 +++++++++++++++++++++++++
 7 files changed, 311 insertions(+), 1 deletion(-)
 create mode 100644 arch/arm/boot/dts/omap2420.dtsi
 create mode 100644 arch/arm/boot/dts/omap2430.dtsi

-- 
1.7.12

[PATCH v3 1/8] ARM/dts: omap2: Add McBSP entries for OMAP2420 and OMAP2430 SoC

[Peter Ujfalusi]

The McBSP IP within OMAP2420 and 2430 is different we need to create separate
dtsi files for them.

Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
---
 arch/arm/boot/dts/omap2420.dtsi | 39 +++++++++++++++++++
 arch/arm/boot/dts/omap2430.dtsi | 83 +++++++++++++++++++++++++++++++++++++++++
 2 files changed, 122 insertions(+)
 create mode 100644 arch/arm/boot/dts/omap2420.dtsi
 create mode 100644 arch/arm/boot/dts/omap2430.dtsi

diff --git a/arch/arm/boot/dts/omap2420.dtsi b/arch/arm/boot/dts/omap2420.dtsi
new file mode 100644
index 0000000..6174d3d
--- /dev/null
+++ b/arch/arm/boot/dts/omap2420.dtsi
@@ -0,0 +1,39 @@
+/*
+ * Device Tree Source for OMAP2420 SoC
+ *
+ * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * This file is licensed under the terms of the GNU General Public License
+ * version 2.  This program is licensed "as is" without any warranty of any
+ * kind, whether express or implied.
+ */
+
+/include/ "omap2.dtsi"
+
+/ {
+	compatible = "ti,omap2420", "ti,omap2";
+
+	ocp {
+		mcbsp1: mcbsp at 48074000 {
+			compatible = "ti,omap2420-mcbsp";
+			reg = <0x48074000 0xff>;
+			reg-names = "mpu";
+			interrupts = <59>, /* TX interrupt */
+				     <60>; /* RX interrupt */
+			interrupt-names = "tx", "rx";
+			interrupt-parent = <&intc>;
+			ti,hwmods = "mcbsp1";
+		};
+
+		mcbsp2: mcbsp at 48076000 {
+			compatible = "ti,omap2420-mcbsp";
+			reg = <0x48076000 0xff>;
+			reg-names = "mpu";
+			interrupts = <62>, /* TX interrupt */
+				     <63>; /* RX interrupt */
+			interrupt-names = "tx", "rx";
+			interrupt-parent = <&intc>;
+			ti,hwmods = "mcbsp2";
+		};
+	};
+};
diff --git a/arch/arm/boot/dts/omap2430.dtsi b/arch/arm/boot/dts/omap2430.dtsi
new file mode 100644
index 0000000..59a639a
--- /dev/null
+++ b/arch/arm/boot/dts/omap2430.dtsi
@@ -0,0 +1,83 @@
+/*
+ * Device Tree Source for OMAP243x SoC
+ *
+ * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * This file is licensed under the terms of the GNU General Public License
+ * version 2.  This program is licensed "as is" without any warranty of any
+ * kind, whether express or implied.
+ */
+
+/include/ "omap2.dtsi"
+
+/ {
+	compatible = "ti,omap2430", "ti,omap2";
+
+	ocp {
+		mcbsp1: mcbsp at 48074000 {
+			compatible = "ti,omap2430-mcbsp";
+			reg = <0x48074000 0xff>;
+			reg-names = "mpu";
+			interrupts = <64>, /* OCP compliant interrupt */
+				     <59>, /* TX interrupt */
+				     <60>, /* RX interrupt */
+				     <61>; /* RX overflow interrupt */
+			interrupt-names = "common", "tx", "rx", "rx_overflow";
+			interrupt-parent = <&intc>;
+			ti,buffer-size = <128>;
+			ti,hwmods = "mcbsp1";
+		};
+
+		mcbsp2: mcbsp at 48076000 {
+			compatible = "ti,omap2430-mcbsp";
+			reg = <0x48076000 0xff>;
+			reg-names = "mpu";
+			interrupts = <16>, /* OCP compliant interrupt */
+				     <62>, /* TX interrupt */
+				     <63>; /* RX interrupt */
+			interrupt-names = "common", "tx", "rx";
+			interrupt-parent = <&intc>;
+			ti,buffer-size = <128>;
+			ti,hwmods = "mcbsp2";
+		};
+
+		mcbsp3: mcbsp at 4808c000 {
+			compatible = "ti,omap2430-mcbsp";
+			reg = <0x4808c000 0xff>;
+			reg-names = "mpu";
+			interrupts = <17>, /* OCP compliant interrupt */
+				     <89>, /* TX interrupt */
+				     <90>; /* RX interrupt */
+			interrupt-names = "common", "tx", "rx";
+			interrupt-parent = <&intc>;
+			ti,buffer-size = <128>;
+			ti,hwmods = "mcbsp3";
+		};
+
+		mcbsp4: mcbsp at 4808e000 {
+			compatible = "ti,omap2430-mcbsp";
+			reg = <0x4808e000 0xff>;
+			reg-names = "mpu";
+			interrupts = <18>, /* OCP compliant interrupt */
+				     <54>, /* TX interrupt */
+				     <55>; /* RX interrupt */
+			interrupt-names = "common", "tx", "rx";
+			interrupt-parent = <&intc>;
+			ti,buffer-size = <128>;
+			ti,hwmods = "mcbsp4";
+		};
+
+		mcbsp5: mcbsp at 48096000 {
+			compatible = "ti,omap2430-mcbsp";
+			reg = <0x48096000 0xff>;
+			reg-names = "mpu";
+			interrupts = <19>, /* OCP compliant interrupt */
+				     <81>, /* TX interrupt */
+				     <82>; /* RX interrupt */
+			interrupt-names = "common", "tx", "rx";
+			interrupt-parent = <&intc>;
+			ti,buffer-size = <128>;
+			ti,hwmods = "mcbsp5";
+		};
+	};
+};
-- 
1.7.12

[PATCH v3 2/8] ARM/dts: omap2420-h4: Include omap2420.dtsi file instead the common omap2

[Peter Ujfalusi]

Since the board is based on OMAP2420 we should include the dedicated dtsi
file (which includes the common omap2 dtsi).

Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
---
 arch/arm/boot/dts/omap2420-h4.dts | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/omap2420-h4.dts b/arch/arm/boot/dts/omap2420-h4.dts
index 25b50b7..77b84e1 100644
--- a/arch/arm/boot/dts/omap2420-h4.dts
+++ b/arch/arm/boot/dts/omap2420-h4.dts
@@ -7,7 +7,7 @@
  */
 /dts-v1/;
 
-/include/ "omap2.dtsi"
+/include/ "omap2420.dtsi"
 
 / {
 	model = "TI OMAP2420 H4 board";
-- 
1.7.12

[PATCH v3 3/8] ARM/dts: omap3: Add McBSP entries

[Peter Ujfalusi]

Create the needed sections to be able to probe McBSP ports via DT.

Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
---
 arch/arm/boot/dts/omap3.dtsi | 69 ++++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 69 insertions(+)

diff --git a/arch/arm/boot/dts/omap3.dtsi b/arch/arm/boot/dts/omap3.dtsi
index 8109471..f024bb3 100644
--- a/arch/arm/boot/dts/omap3.dtsi
+++ b/arch/arm/boot/dts/omap3.dtsi
@@ -220,5 +220,74 @@
 			compatible = "ti,omap3-wdt";
 			ti,hwmods = "wd_timer2";
 		};
+
+		mcbsp1: mcbsp at 48074000 {
+			compatible = "ti,omap3-mcbsp";
+			reg = <0x48074000 0xff>;
+			reg-names = "mpu";
+			interrupts = <16>, /* OCP compliant interrupt */
+				     <59>, /* TX interrupt */
+				     <60>; /* RX interrupt */
+			interrupt-names = "common", "tx", "rx";
+			interrupt-parent = <&intc>;
+			ti,buffer-size = <128>;
+			ti,hwmods = "mcbsp1";
+		};
+
+		mcbsp2: mcbsp at 49022000 {
+			compatible = "ti,omap3-mcbsp";
+			reg = <0x49022000 0xff>,
+			      <0x49028000 0xff>;
+			reg-names = "mpu", "sidetone";
+			interrupts = <17>, /* OCP compliant interrupt */
+				     <62>, /* TX interrupt */
+				     <63>, /* RX interrupt */
+				     <4>;  /* Sidetone */
+			interrupt-names = "common", "tx", "rx", "sidetone";
+			interrupt-parent = <&intc>;
+			ti,buffer-size = <1280>;
+			ti,hwmods = "mcbsp2";
+		};
+
+		mcbsp3: mcbsp at 49024000 {
+			compatible = "ti,omap3-mcbsp";
+			reg = <0x49024000 0xff>,
+			      <0x4902a000 0xff>;
+			reg-names = "mpu", "sidetone";
+			interrupts = <22>, /* OCP compliant interrupt */
+				     <89>, /* TX interrupt */
+				     <90>, /* RX interrupt */
+				     <5>;  /* Sidetone */
+			interrupt-names = "common", "tx", "rx", "sidetone";
+			interrupt-parent = <&intc>;
+			ti,buffer-size = <128>;
+			ti,hwmods = "mcbsp3";
+		};
+
+		mcbsp4: mcbsp at 49026000 {
+			compatible = "ti,omap3-mcbsp";
+			reg = <0x49026000 0xff>;
+			reg-names = "mpu";
+			interrupts = <23>, /* OCP compliant interrupt */
+				     <54>, /* TX interrupt */
+				     <55>; /* RX interrupt */
+			interrupt-names = "common", "tx", "rx";
+			interrupt-parent = <&intc>;
+			ti,buffer-size = <128>;
+			ti,hwmods = "mcbsp4";
+		};
+
+		mcbsp5: mcbsp at 48096000 {
+			compatible = "ti,omap3-mcbsp";
+			reg = <0x48096000 0xff>;
+			reg-names = "mpu";
+			interrupts = <27>, /* OCP compliant interrupt */
+				     <81>, /* TX interrupt */
+				     <82>; /* RX interrupt */
+			interrupt-names = "common", "tx", "rx";
+			interrupt-parent = <&intc>;
+			ti,buffer-size = <128>;
+			ti,hwmods = "mcbsp5";
+		};
 	};
 };
-- 
1.7.12

[PATCH v3 4/8] ARM/dts: omap4: Add McBSP entries

[Peter Ujfalusi]

Create the sections describing the McBSP ports to be able to use them via
DT.

Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
---
 arch/arm/boot/dts/omap4.dtsi | 47 ++++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 47 insertions(+)

diff --git a/arch/arm/boot/dts/omap4.dtsi b/arch/arm/boot/dts/omap4.dtsi
index 1853dc7..5ed3b94 100644
--- a/arch/arm/boot/dts/omap4.dtsi
+++ b/arch/arm/boot/dts/omap4.dtsi
@@ -287,6 +287,53 @@
 			ti,hwmods = "dmic";
 		};
 
+		mcbsp1: mcbsp at 40122000 {
+			compatible = "ti,omap4-mcbsp";
+			reg = <0x40122000 0xff>, /* MPU private access */
+			      <0x49022000 0xff>; /* L3 Interconnect */
+			reg-names = "mpu", "dma";
+			interrupts = <0 17 0x4>;
+			interrupt-names = "common";
+			interrupt-parent = <&gic>;
+			ti,buffer-size = <128>;
+			ti,hwmods = "mcbsp1";
+		};
+
+		mcbsp2: mcbsp at 40124000 {
+			compatible = "ti,omap4-mcbsp";
+			reg = <0x40124000 0xff>, /* MPU private access */
+			      <0x49024000 0xff>; /* L3 Interconnect */
+			reg-names = "mpu", "dma";
+			interrupts = <0 22 0x4>;
+			interrupt-names = "common";
+			interrupt-parent = <&gic>;
+			ti,buffer-size = <128>;
+			ti,hwmods = "mcbsp2";
+		};
+
+		mcbsp3: mcbsp at 40126000 {
+			compatible = "ti,omap4-mcbsp";
+			reg = <0x40126000 0xff>, /* MPU private access */
+			      <0x49026000 0xff>; /* L3 Interconnect */
+			reg-names = "mpu", "dma";
+			interrupts = <0 23 0x4>;
+			interrupt-names = "common";
+			interrupt-parent = <&gic>;
+			ti,buffer-size = <128>;
+			ti,hwmods = "mcbsp3";
+		};
+
+		mcbsp4: mcbsp at 48096000 {
+			compatible = "ti,omap4-mcbsp";
+			reg = <0x48096000 0xff>; /* L4 Interconnect */
+			reg-names = "mpu";
+			interrupts = <0 16 0x4>;
+			interrupt-names = "common";
+			interrupt-parent = <&gic>;
+			ti,buffer-size = <128>;
+			ti,hwmods = "mcbsp4";
+		};
+
 		keypad: keypad at 4a31c000 {
 			compatible = "ti,omap4-keypad";
 			ti,hwmods = "kbd";
-- 
1.7.12

[PATCH v3 5/8] ARM/dts: omap4: Add reg-names for McPDM and DMIC

[Peter Ujfalusi]

In order to get the memory areas by name when booted with DT.

Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
---
 arch/arm/boot/dts/omap4.dtsi | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/arm/boot/dts/omap4.dtsi b/arch/arm/boot/dts/omap4.dtsi
index 5ed3b94..9f851df 100644
--- a/arch/arm/boot/dts/omap4.dtsi
+++ b/arch/arm/boot/dts/omap4.dtsi
@@ -273,6 +273,7 @@
 			compatible = "ti,omap4-mcpdm";
 			reg = <0x40132000 0x7f>, /* MPU private access */
 			      <0x49032000 0x7f>; /* L3 Interconnect */
+			reg-names = "mpu", "dma";
 			interrupts = <0 112 0x4>;
 			interrupt-parent = <&gic>;
 			ti,hwmods = "mcpdm";
@@ -282,6 +283,7 @@
 			compatible = "ti,omap4-dmic";
 			reg = <0x4012e000 0x7f>, /* MPU private access */
 			      <0x4902e000 0x7f>; /* L3 Interconnect */
+			reg-names = "mpu", "dma";
 			interrupts = <0 114 0x4>;
 			interrupt-parent = <&gic>;
 			ti,hwmods = "dmic";
-- 
1.7.12

[PATCH v3 6/8] ARM/dts: omap5: Add McBSP entries

[Peter Ujfalusi]

Create the sections describing the McBSP ports to be able to use them via
DT.

Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
---
 arch/arm/boot/dts/omap5.dtsi | 36 ++++++++++++++++++++++++++++++++++++
 1 file changed, 36 insertions(+)

diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi
index 4c11ae1..aa97e93 100644
--- a/arch/arm/boot/dts/omap5.dtsi
+++ b/arch/arm/boot/dts/omap5.dtsi
@@ -251,5 +251,41 @@
 			compatible = "ti,omap4-keypad";
 			ti,hwmods = "kbd";
 		};
+
+		mcbsp1: mcbsp at 40122000 {
+			compatible = "ti,omap4-mcbsp";
+			reg = <0x40122000 0xff>, /* MPU private access */
+			      <0x49022000 0xff>; /* L3 Interconnect */
+			reg-names = "mpu", "dma";
+			interrupts = <0 17 0x4>;
+			interrupt-names = "common";
+			interrupt-parent = <&gic>;
+			ti,buffer-size = <128>;
+			ti,hwmods = "mcbsp1";
+		};
+
+		mcbsp2: mcbsp at 40124000 {
+			compatible = "ti,omap4-mcbsp";
+			reg = <0x40124000 0xff>, /* MPU private access */
+			      <0x49024000 0xff>; /* L3 Interconnect */
+			reg-names = "mpu", "dma";
+			interrupts = <0 22 0x4>;
+			interrupt-names = "common";
+			interrupt-parent = <&gic>;
+			ti,buffer-size = <128>;
+			ti,hwmods = "mcbsp2";
+		};
+
+		mcbsp3: mcbsp at 40126000 {
+			compatible = "ti,omap4-mcbsp";
+			reg = <0x40126000 0xff>, /* MPU private access */
+			      <0x49026000 0xff>; /* L3 Interconnect */
+			reg-names = "mpu", "dma";
+			interrupts = <0 23 0x4>;
+			interrupt-names = "common";
+			interrupt-parent = <&gic>;
+			ti,buffer-size = <128>;
+			ti,hwmods = "mcbsp3";
+		};
 	};
 };
-- 
1.7.12

[PATCH v3 7/8] ARM/dts: omap5: Add McPDM and DMIC section to the dtsi file

[Peter Ujfalusi]

To be able to load the McPDM and DMIC driver when booted with device tree.

Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
---
 arch/arm/boot/dts/omap5.dtsi | 20 ++++++++++++++++++++
 1 file changed, 20 insertions(+)

diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi
index aa97e93..9ac75b3 100644
--- a/arch/arm/boot/dts/omap5.dtsi
+++ b/arch/arm/boot/dts/omap5.dtsi
@@ -252,6 +252,26 @@
 			ti,hwmods = "kbd";
 		};
 
+		mcpdm: mcpdm at 40132000 {
+			compatible = "ti,omap4-mcpdm";
+			reg = <0x40132000 0x7f>, /* MPU private access */
+			      <0x49032000 0x7f>; /* L3 Interconnect */
+			reg-names = "mpu", "dma";
+			interrupts = <0 112 0x4>;
+			interrupt-parent = <&gic>;
+			ti,hwmods = "mcpdm";
+		};
+
+		dmic: dmic at 4012e000 {
+			compatible = "ti,omap4-dmic";
+			reg = <0x4012e000 0x7f>, /* MPU private access */
+			      <0x4902e000 0x7f>; /* L3 Interconnect */
+			reg-names = "mpu", "dma";
+			interrupts = <0 114 0x4>;
+			interrupt-parent = <&gic>;
+			ti,hwmods = "dmic";
+		};
+
 		mcbsp1: mcbsp at 40122000 {
 			compatible = "ti,omap4-mcbsp";
 			reg = <0x40122000 0xff>, /* MPU private access */
-- 
1.7.12

[PATCH v3 8/8] ARM/dts: omap3-beagle: Enable audio support

[Peter Ujfalusi]

Add the needed sections to enable audio support on BeagleBoard when booted
with DT blob.

Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
---
 arch/arm/boot/dts/omap3-beagle.dts | 14 ++++++++++++++
 1 file changed, 14 insertions(+)

diff --git a/arch/arm/boot/dts/omap3-beagle.dts b/arch/arm/boot/dts/omap3-beagle.dts
index 16bff8b..10d87a2 100644
--- a/arch/arm/boot/dts/omap3-beagle.dts
+++ b/arch/arm/boot/dts/omap3-beagle.dts
@@ -25,6 +25,14 @@
 			gpios = <&twl_gpio 19 0>; /* LEDB */
 		};
 	};
+
+	sound {
+		compatible = "ti,omap-twl4030";
+		ti,model = "omap3beagle";
+
+		ti,mcbsp = <&mcbsp2>;
+		ti,codec = <&twl_audio>;
+	};
 };
 
 &i2c1 {
@@ -40,6 +48,12 @@
 			regulator-min-microvolt = <1800000>;
 			regulator-max-microvolt = <3000000>;
 		};
+
+		twl_audio: audio {
+			compatible = "ti,twl4030-audio";
+			codec {
+			};
+		};
 	};
 };
 
-- 
1.7.12

[PATCH v3 1/8] ARM/dts: omap2: Add McBSP entries for OMAP2420 and OMAP2430 SoC

[Tony Lindgren]

* Peter Ujfalusi <peter.ujfalusi@ti.com> [120905 04:59]:
> +
> +	ocp {
> +		mcbsp1: mcbsp at 48074000 {
> +			compatible = "ti,omap2420-mcbsp";
> +			reg = <0x48074000 0xff>;
> +			reg-names = "mpu";
> +			interrupts = <59>, /* TX interrupt */
> +				     <60>; /* RX interrupt */
> +			interrupt-names = "tx", "rx";
> +			interrupt-parent = <&intc>;
> +			ti,hwmods = "mcbsp1";
> +		};
> +
> +		mcbsp2: mcbsp at 48076000 {
> +			compatible = "ti,omap2420-mcbsp";
> +			reg = <0x48076000 0xff>;
> +			reg-names = "mpu";
> +			interrupts = <62>, /* TX interrupt */
> +				     <63>; /* RX interrupt */
> +			interrupt-names = "tx", "rx";
> +			interrupt-parent = <&intc>;
> +			ti,hwmods = "mcbsp2";
> +		};
> +	};

Hmm don't you need to specify the interrupt chip and offset for
the interrupts here?

Regards,

Tony

[PATCH v3 1/8] ARM/dts: omap2: Add McBSP entries for OMAP2420 and OMAP2430 SoC

[Benoit Cousson]

Hi Tony,

On 09/08/2012 12:29 AM, Tony Lindgren wrote:
> * Peter Ujfalusi <peter.ujfalusi@ti.com> [120905 04:59]:
>> +
>> +	ocp {
>> +		mcbsp1: mcbsp at 48074000 {
>> +			compatible = "ti,omap2420-mcbsp";
>> +			reg = <0x48074000 0xff>;
>> +			reg-names = "mpu";
>> +			interrupts = <59>, /* TX interrupt */
>> +				     <60>; /* RX interrupt */
>> +			interrupt-names = "tx", "rx";
>> +			interrupt-parent = <&intc>;
>> +			ti,hwmods = "mcbsp1";
>> +		};
>> +
>> +		mcbsp2: mcbsp at 48076000 {
>> +			compatible = "ti,omap2420-mcbsp";
>> +			reg = <0x48076000 0xff>;
>> +			reg-names = "mpu";
>> +			interrupts = <62>, /* TX interrupt */
>> +				     <63>; /* RX interrupt */
>> +			interrupt-names = "tx", "rx";
>> +			interrupt-parent = <&intc>;
>> +			ti,hwmods = "mcbsp2";
>> +		};
>> +	};
> 
> Hmm don't you need to specify the interrupt chip and offset for
> the interrupts here?

Mmm, I'm not sure to get your question, there is the link to the
interrupt-parent.

The interrupt number is relative to the parent interrupt domain. So even
if the INTC IRQ offset start at 32 instead of 0, DT IRQ mechanism will
convert that to the proper hwirq thanks to irqdomain.
In that case we should always provide interrupt number relative to the
interrupt controller HW number and not assuming any Linux IRQ number
offset like before.


And in fact the interrupt-parent is not even needed, by default if will
look to the parent to get the interrupt-controller.

Extract from [1]

interrupt-parent:
"Because the hierarchy of the nodes in the interrupt tree might not
match the device tree, the interrupt-parent property is available to
make the definition of an interrupt parent explicit.
The value is the phandle to the interrupt parent. If this property is
missing from a device, its interrupt parent is assumed to be its device
tree parent."

[1] http://www.power.org/resources/downloads/Power_ePAPR_APPROVED_v1.0.pdf

Regards,
Benoit

[PATCH v3 1/8] ARM/dts: omap2: Add McBSP entries for OMAP2420 and OMAP2430 SoC

[Peter Ujfalusi]

Hi Benoit,

On 09/10/2012 11:07 AM, Benoit Cousson wrote:
> Hi Tony,
> 
> On 09/08/2012 12:29 AM, Tony Lindgren wrote:
>> * Peter Ujfalusi <peter.ujfalusi@ti.com> [120905 04:59]:
>>> +
>>> +	ocp {
>>> +		mcbsp1: mcbsp at 48074000 {
>>> +			compatible = "ti,omap2420-mcbsp";
>>> +			reg = <0x48074000 0xff>;
>>> +			reg-names = "mpu";
>>> +			interrupts = <59>, /* TX interrupt */
>>> +				     <60>; /* RX interrupt */
>>> +			interrupt-names = "tx", "rx";
>>> +			interrupt-parent = <&intc>;
>>> +			ti,hwmods = "mcbsp1";
>>> +		};
>>> +
>>> +		mcbsp2: mcbsp at 48076000 {
>>> +			compatible = "ti,omap2420-mcbsp";
>>> +			reg = <0x48076000 0xff>;
>>> +			reg-names = "mpu";
>>> +			interrupts = <62>, /* TX interrupt */
>>> +				     <63>; /* RX interrupt */
>>> +			interrupt-names = "tx", "rx";
>>> +			interrupt-parent = <&intc>;
>>> +			ti,hwmods = "mcbsp2";
>>> +		};
>>> +	};
>>
>> Hmm don't you need to specify the interrupt chip and offset for
>> the interrupts here?
> 
> Mmm, I'm not sure to get your question, there is the link to the
> interrupt-parent.
> 
> The interrupt number is relative to the parent interrupt domain. So even
> if the INTC IRQ offset start at 32 instead of 0, DT IRQ mechanism will
> convert that to the proper hwirq thanks to irqdomain.
> In that case we should always provide interrupt number relative to the
> interrupt controller HW number and not assuming any Linux IRQ number
> offset like before.
> 
> 
> And in fact the interrupt-parent is not even needed, by default if will
> look to the parent to get the interrupt-controller.

This is true, but it makes the 'code' a bit more readable if I (we) specify
the interrupt-parent.

> 
> Extract from [1]
> 
> interrupt-parent:
> "Because the hierarchy of the nodes in the interrupt tree might not
> match the device tree, the interrupt-parent property is available to
> make the definition of an interrupt parent explicit.
> The value is the phandle to the interrupt parent. If this property is
> missing from a device, its interrupt parent is assumed to be its device
> tree parent."
> 
> [1] http://www.power.org/resources/downloads/Power_ePAPR_APPROVED_v1.0.pdf
> 
> Regards,
> Benoit
> 


-- 
P?ter

[PATCH v3 1/8] ARM/dts: omap2: Add McBSP entries for OMAP2420 and OMAP2430 SoC

[Tony Lindgren]

* Peter Ujfalusi <peter.ujfalusi@ti.com> [120910 04:05]:
> Hi Benoit,
> 
> On 09/10/2012 11:07 AM, Benoit Cousson wrote:
> > Hi Tony,
> > 
> > On 09/08/2012 12:29 AM, Tony Lindgren wrote:
> >> * Peter Ujfalusi <peter.ujfalusi@ti.com> [120905 04:59]:
> >>> +
> >>> +	ocp {
> >>> +		mcbsp1: mcbsp at 48074000 {
> >>> +			compatible = "ti,omap2420-mcbsp";
> >>> +			reg = <0x48074000 0xff>;
> >>> +			reg-names = "mpu";
> >>> +			interrupts = <59>, /* TX interrupt */
> >>> +				     <60>; /* RX interrupt */
> >>> +			interrupt-names = "tx", "rx";
> >>> +			interrupt-parent = <&intc>;
> >>> +			ti,hwmods = "mcbsp1";
> >>> +		};
> >>> +
> >>> +		mcbsp2: mcbsp at 48076000 {
> >>> +			compatible = "ti,omap2420-mcbsp";
> >>> +			reg = <0x48076000 0xff>;
> >>> +			reg-names = "mpu";
> >>> +			interrupts = <62>, /* TX interrupt */
> >>> +				     <63>; /* RX interrupt */
> >>> +			interrupt-names = "tx", "rx";
> >>> +			interrupt-parent = <&intc>;
> >>> +			ti,hwmods = "mcbsp2";
> >>> +		};
> >>> +	};
> >>
> >> Hmm don't you need to specify the interrupt chip and offset for
> >> the interrupts here?
> > 
> > Mmm, I'm not sure to get your question, there is the link to the
> > interrupt-parent.
> > 
> > The interrupt number is relative to the parent interrupt domain. So even
> > if the INTC IRQ offset start at 32 instead of 0, DT IRQ mechanism will
> > convert that to the proper hwirq thanks to irqdomain.
> > In that case we should always provide interrupt number relative to the
> > interrupt controller HW number and not assuming any Linux IRQ number
> > offset like before.

Yes never mind, I was confused. We have #interrupt-cells = <1> and the
interrupt specifier is just the interrupt offset..

Regards,

Tony 

> > And in fact the interrupt-parent is not even needed, by default if will
> > look to the parent to get the interrupt-controller.
> 
> This is true, but it makes the 'code' a bit more readable if I (we) specify
> the interrupt-parent.
> 
> > 
> > Extract from [1]
> > 
> > interrupt-parent:
> > "Because the hierarchy of the nodes in the interrupt tree might not
> > match the device tree, the interrupt-parent property is available to
> > make the definition of an interrupt parent explicit.
> > The value is the phandle to the interrupt parent. If this property is
> > missing from a device, its interrupt parent is assumed to be its device
> > tree parent."
> > 
> > [1] http://www.power.org/resources/downloads/Power_ePAPR_APPROVED_v1.0.pdf
> > 
> > Regards,
> > Benoit
> > 
> 
> 
> -- 
> P?ter