[PATCH V3 1/5] ARM: add infra-structure for BCM2708/BCM2835 and Raspberry Pi

[PATCH V3 1/5] ARM: add infra-structure for BCM2708/BCM2835 and Raspberry Pi

[Stephen Warren]

From: Simon Arlott <simon@fire.lp0.eu>

The BCM2708 is an ARM SoC from Broadcom. It is the primary SoC in a
series which contains the BCM2835 amongst other variants. This patch
adds very basic support for this series of SoCs, under the BCM2708 name.

http://www.broadcom.com/products/BCM2835
http://www.raspberrypi.org/wp-content/uploads/2012/02/BCM2835-ARM-Peripherals.pd

Note that the documentation in the latter .pdf assumes the MMU setup
that's used on the "VideoCore" companion processor, and does not document
physical peripheral addresses. Subtract 0x5e000000 to obtain the physical
addresses.

The BCM2835 SoC is used in the Raspberry Pi. This patch also adds a
minimal device tree for this board; enough to see some very early kernel
boot messages through earlyprintk. However, this patch does not yet
provide a useful booting system.

http://www.raspberrypi.org/.

This patch was extracted from git://github.com/lp0/linux.git branch
rpi-split from 3-4 months ago, and significantly stripped down and
modified since.

Signed-off-by: Chris Boot <bootc@bootc.net>
Signed-off-by: Simon Arlott <simon@fire.lp0.eu>
Signed-off-by: Dom Cobley <popcornmix@gmail.com>
Signed-off-by: Dom Cobley <dc4@broadcom.com>
Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
---
This version is enough to get to "Kernel panic - not syncing: No init found."
I haven't tested yet, but I expect that using an initrd should work.

v3:
* Added DT binding documentation for the SoC itself.
* Changed patch subject from "support" to "infra-structure", and added
  to the commit description, to indicate that the patch isn't adding
  complete support for the SoC/board.
* Added all S-o-b tags from downstream, now that I have permission to
  fix them up to be valid.
* Changed patch author to Simon Arlott, now I have permission to change
  his email address to something valid.
* Limited my (c) additions to files I created; the other changes turnd
  out to be trivial.
v2:
* Rename *_BASE to *_PHYS to match Simon's rpi-split branch.
* Remove #define UART_BAUD since it isn't used.
* Don't select WATCHDOG from ARCH_BCM2708
* Remove 8250 and PL010 serial ports from bcm2708_defconfig
* Remove <mach/hardware.h>
* Rename common.c back to bcm2708.c; matches downstream and is
  preferred naming style.
---
 Documentation/devicetree/bindings/arm/bcm2708.txt |   15 ++++
 arch/arm/Kconfig                                  |   18 ++++
 arch/arm/Makefile                                 |    1 +
 arch/arm/boot/dts/bcm2835-rpi-b.dts               |   12 +++
 arch/arm/boot/dts/bcm2835.dtsi                    |   10 +++
 arch/arm/configs/bcm2708_defconfig                |   93 +++++++++++++++++++++
 arch/arm/mach-bcm2708/Makefile                    |    1 +
 arch/arm/mach-bcm2708/Makefile.boot               |    5 ++
 arch/arm/mach-bcm2708/bcm2708.c                   |   77 +++++++++++++++++
 arch/arm/mach-bcm2708/include/mach/bcm2708_soc.h  |   29 +++++++
 arch/arm/mach-bcm2708/include/mach/debug-macro.S  |   21 +++++
 arch/arm/mach-bcm2708/include/mach/timex.h        |   26 ++++++
 arch/arm/mach-bcm2708/include/mach/uncompress.h   |   45 ++++++++++
 13 files changed, 353 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/arm/bcm2708.txt
 create mode 100644 arch/arm/boot/dts/bcm2835-rpi-b.dts
 create mode 100644 arch/arm/boot/dts/bcm2835.dtsi
 create mode 100644 arch/arm/configs/bcm2708_defconfig
 create mode 100644 arch/arm/mach-bcm2708/Makefile
 create mode 100644 arch/arm/mach-bcm2708/Makefile.boot
 create mode 100644 arch/arm/mach-bcm2708/bcm2708.c
 create mode 100644 arch/arm/mach-bcm2708/include/mach/bcm2708_soc.h
 create mode 100644 arch/arm/mach-bcm2708/include/mach/debug-macro.S
 create mode 100644 arch/arm/mach-bcm2708/include/mach/timex.h
 create mode 100644 arch/arm/mach-bcm2708/include/mach/uncompress.h

diff --git a/Documentation/devicetree/bindings/arm/bcm2708.txt b/Documentation/devicetree/bindings/arm/bcm2708.txt
new file mode 100644
index 0000000..49eec61
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/bcm2708.txt
@@ -0,0 +1,15 @@
+Broadcom BCM2708 device tree bindings
+-------------------------------------------
+
+Boards with the BCM2708 SoC, or another SoC in the BCM2708 family, shall have
+the following properties:
+
+Required root node property:
+
+compatible = "broadcom,bcm2708";
+
+Boards with BCM2835 SoC shall *additionally* have the following properties:
+
+Required root node property:
+
+compatible = "broadcom,bcm2835";
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index d0021fe..4dcd0cd 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -349,6 +349,24 @@ config ARCH_AT91
 	  This enables support for systems based on Atmel
 	  AT91RM9200 and AT91SAM9* processors.
 
+config ARCH_BCM2708
+	bool "Broadcom BCM2708 family"
+	select ARCH_WANT_OPTIONAL_GPIOLIB
+	select ARM_AMBA
+	select ARM_ERRATA_411920
+	select ARM_TIMER_SP804
+	select CLKDEV_LOOKUP
+	select COMMON_CLK
+	select CPU_V6
+	select GENERIC_CLOCKEVENTS
+	select MULTI_IRQ_HANDLER
+	select SPARSE_IRQ
+	select USE_OF
+	help
+	  This enables support for the Broadcom BCM2708 SoC series. The
+	  BCM2835 is one such SoC in this series. The Raspberry Pi uses
+	  the BCM2835.
+
 config ARCH_BCMRING
 	bool "Broadcom BCMRING"
 	depends on MMU
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index a812d12..3c4f0b3 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -136,6 +136,7 @@ textofs-$(CONFIG_ARCH_MSM8960) := 0x00208000
 # Machine directory name.  This list is sorted alphanumerically
 # by CONFIG_* macro name.
 machine-$(CONFIG_ARCH_AT91)		:= at91
+machine-$(CONFIG_ARCH_BCM2708)		:= bcm2708
 machine-$(CONFIG_ARCH_BCMRING)		:= bcmring
 machine-$(CONFIG_ARCH_CLPS711X)		:= clps711x
 machine-$(CONFIG_ARCH_CNS3XXX)		:= cns3xxx
diff --git a/arch/arm/boot/dts/bcm2835-rpi-b.dts b/arch/arm/boot/dts/bcm2835-rpi-b.dts
new file mode 100644
index 0000000..7e43197
--- /dev/null
+++ b/arch/arm/boot/dts/bcm2835-rpi-b.dts
@@ -0,0 +1,12 @@
+/dts-v1/;
+/memreserve/ 0x0c000000 0x04000000;
+/include/ "bcm2835.dtsi"
+
+/ {
+	model = "Raspberry Pi Model B";
+	compatible = "raspberrypi,model-b", "broadcom,bcm2835", "broadcom,bcm2708";
+
+	memory {
+		reg = <0 0x10000000>;
+	};
+};
diff --git a/arch/arm/boot/dts/bcm2835.dtsi b/arch/arm/boot/dts/bcm2835.dtsi
new file mode 100644
index 0000000..9039482
--- /dev/null
+++ b/arch/arm/boot/dts/bcm2835.dtsi
@@ -0,0 +1,10 @@
+/include/ "skeleton.dtsi"
+
+/ {
+	compatible = "broadcom,bcm2835", "broadcom,bcm2708";
+	model = "BCM2835";
+
+	chosen {
+		bootargs = "earlyprintk";
+	};
+};
diff --git a/arch/arm/configs/bcm2708_defconfig b/arch/arm/configs/bcm2708_defconfig
new file mode 100644
index 0000000..6f741e9
--- /dev/null
+++ b/arch/arm/configs/bcm2708_defconfig
@@ -0,0 +1,93 @@
+CONFIG_EXPERIMENTAL=y
+# CONFIG_LOCALVERSION_AUTO is not set
+CONFIG_SYSVIPC=y
+CONFIG_BSD_PROCESS_ACCT=y
+CONFIG_BSD_PROCESS_ACCT_V3=y
+CONFIG_FHANDLE=y
+CONFIG_NO_HZ=y
+CONFIG_HIGH_RES_TIMERS=y
+CONFIG_LOG_BUF_SHIFT=18
+CONFIG_CGROUP_FREEZER=y
+CONFIG_CGROUP_DEVICE=y
+CONFIG_CPUSETS=y
+CONFIG_CGROUP_CPUACCT=y
+CONFIG_RESOURCE_COUNTERS=y
+CONFIG_CGROUP_PERF=y
+CONFIG_CFS_BANDWIDTH=y
+CONFIG_RT_GROUP_SCHED=y
+CONFIG_NAMESPACES=y
+CONFIG_SCHED_AUTOGROUP=y
+CONFIG_RELAY=y
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_RD_BZIP2=y
+CONFIG_RD_LZMA=y
+CONFIG_RD_XZ=y
+CONFIG_RD_LZO=y
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+CONFIG_KALLSYMS_ALL=y
+CONFIG_EMBEDDED=y
+# CONFIG_COMPAT_BRK is not set
+CONFIG_PROFILING=y
+CONFIG_OPROFILE=y
+CONFIG_JUMP_LABEL=y
+# CONFIG_BLOCK is not set
+CONFIG_ARCH_BCM2708=y
+CONFIG_PREEMPT_VOLUNTARY=y
+CONFIG_COMPACTION=y
+CONFIG_KSM=y
+CONFIG_DEFAULT_MMAP_MIN_ADDR=65536
+CONFIG_CLEANCACHE=y
+CONFIG_SECCOMP=y
+CONFIG_CC_STACKPROTECTOR=y
+CONFIG_KEXEC=y
+CONFIG_CRASH_DUMP=y
+# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
+# CONFIG_SUSPEND is not set
+CONFIG_DEVTMPFS=y
+CONFIG_DEVTMPFS_MOUNT=y
+# CONFIG_STANDALONE is not set
+# CONFIG_INPUT_MOUSEDEV is not set
+# CONFIG_INPUT_KEYBOARD is not set
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_SERIO is not set
+# CONFIG_VT is not set
+# CONFIG_UNIX98_PTYS is not set
+# CONFIG_LEGACY_PTYS is not set
+# CONFIG_DEVKMEM is not set
+CONFIG_SERIAL_AMBA_PL011=y
+CONFIG_SERIAL_AMBA_PL011_CONSOLE=y
+CONFIG_TTY_PRINTK=y
+# CONFIG_HW_RANDOM is not set
+# CONFIG_HWMON is not set
+# CONFIG_USB_SUPPORT is not set
+# CONFIG_IOMMU_SUPPORT is not set
+# CONFIG_FILE_LOCKING is not set
+# CONFIG_DNOTIFY is not set
+# CONFIG_INOTIFY_USER is not set
+# CONFIG_PROC_FS is not set
+# CONFIG_SYSFS is not set
+# CONFIG_MISC_FILESYSTEMS is not set
+CONFIG_PRINTK_TIME=y
+# CONFIG_ENABLE_WARN_DEPRECATED is not set
+# CONFIG_ENABLE_MUST_CHECK is not set
+CONFIG_UNUSED_SYMBOLS=y
+CONFIG_LOCKUP_DETECTOR=y
+CONFIG_DEBUG_INFO=y
+CONFIG_DEBUG_MEMORY_INIT=y
+CONFIG_BOOT_PRINTK_DELAY=y
+CONFIG_SCHED_TRACER=y
+CONFIG_STACK_TRACER=y
+CONFIG_FUNCTION_PROFILER=y
+CONFIG_DYNAMIC_DEBUG=y
+CONFIG_KGDB=y
+CONFIG_KGDB_KDB=y
+CONFIG_TEST_KSTRTOX=y
+CONFIG_STRICT_DEVMEM=y
+CONFIG_DEBUG_LL=y
+CONFIG_EARLY_PRINTK=y
+# CONFIG_XZ_DEC_X86 is not set
+# CONFIG_XZ_DEC_POWERPC is not set
+# CONFIG_XZ_DEC_IA64 is not set
+# CONFIG_XZ_DEC_ARM is not set
+# CONFIG_XZ_DEC_ARMTHUMB is not set
+# CONFIG_XZ_DEC_SPARC is not set
diff --git a/arch/arm/mach-bcm2708/Makefile b/arch/arm/mach-bcm2708/Makefile
new file mode 100644
index 0000000..c382763
--- /dev/null
+++ b/arch/arm/mach-bcm2708/Makefile
@@ -0,0 +1 @@
+obj-y += bcm2708.o
diff --git a/arch/arm/mach-bcm2708/Makefile.boot b/arch/arm/mach-bcm2708/Makefile.boot
new file mode 100644
index 0000000..0831fd1
--- /dev/null
+++ b/arch/arm/mach-bcm2708/Makefile.boot
@@ -0,0 +1,5 @@
+   zreladdr-y := 0x00008000
+params_phys-y := 0x00000100
+initrd_phys-y := 0x00800000
+
+dtb-y += bcm2835-rpi-b.dtb
diff --git a/arch/arm/mach-bcm2708/bcm2708.c b/arch/arm/mach-bcm2708/bcm2708.c
new file mode 100644
index 0000000..ae6df4f
--- /dev/null
+++ b/arch/arm/mach-bcm2708/bcm2708.c
@@ -0,0 +1,77 @@
+/*
+ * Copyright (C) 2010 Broadcom
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/init.h>
+#include <linux/of_platform.h>
+
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+#include <asm/mach/time.h>
+#include <asm/exception.h>
+
+#include <mach/bcm2708_soc.h>
+
+static struct map_desc io_map __initdata = {
+	.virtual = BCM2708_PERIPH_VIRT,
+	.pfn = __phys_to_pfn(BCM2708_PERIPH_PHYS),
+	.length = BCM2708_PERIPH_SIZE,
+	.type = MT_DEVICE
+};
+
+void __init bcm2708_map_io(void)
+{
+	iotable_init(&io_map, 1);
+}
+
+void __init bcm2708_init_irq(void)
+{
+}
+
+asmlinkage void __exception_irq_entry bcm2708_handle_irq(struct pt_regs *regs)
+{
+}
+
+void __init bcm2708_init(void)
+{
+	int ret;
+
+	ret = of_platform_populate(NULL, of_default_bus_match_table, NULL,
+				   NULL);
+	if (ret) {
+		pr_err("of_platform_populate failed: %d\n", ret);
+		BUG();
+	}
+}
+
+static void __init bcm2708_timer_init(void)
+{
+}
+
+struct sys_timer bcm2708_timer = {
+	.init = bcm2708_timer_init
+};
+
+static const char * const bcm2708_compat[] = {
+	"broadcom,bcm2708",
+	NULL
+};
+
+DT_MACHINE_START(BCM2708, "BCM2708")
+	.map_io = bcm2708_map_io,
+	.init_irq = bcm2708_init_irq,
+	.handle_irq = bcm2708_handle_irq,
+	.init_machine = bcm2708_init,
+	.timer = &bcm2708_timer,
+	.dt_compat = bcm2708_compat
+MACHINE_END
diff --git a/arch/arm/mach-bcm2708/include/mach/bcm2708_soc.h b/arch/arm/mach-bcm2708/include/mach/bcm2708_soc.h
new file mode 100644
index 0000000..3549699
--- /dev/null
+++ b/arch/arm/mach-bcm2708/include/mach/bcm2708_soc.h
@@ -0,0 +1,29 @@
+/*
+ * Copyright (C) 2012 Stephen Warren
+ *
+ * Derived from code:
+ * Copyright (C) 2010 Broadcom
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef __MACH_BCM2708_BCM2708_SOC_H__
+#define __MACH_BCM2708_BCM2708_SOC_H__
+
+#include <asm/sizes.h>
+
+#define BCM2708_PERIPH_PHYS	0x20000000
+#define BCM2708_PERIPH_VIRT	0xf0000000
+#define BCM2708_PERIPH_SIZE	SZ_16M
+#define BCM2708_DEBUG_PHYS	0x20201000
+#define BCM2708_DEBUG_VIRT	0xf0201000
+
+#endif
diff --git a/arch/arm/mach-bcm2708/include/mach/debug-macro.S b/arch/arm/mach-bcm2708/include/mach/debug-macro.S
new file mode 100644
index 0000000..132ee0a
--- /dev/null
+++ b/arch/arm/mach-bcm2708/include/mach/debug-macro.S
@@ -0,0 +1,21 @@
+/*
+ * Debugging macro include header
+ *
+ * Copyright (C) 2010 Broadcom
+ * Copyright (C) 1994-1999 Russell King
+ * Moved from linux/arch/arm/kernel/debug.S by Ben Dooks
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+
+#include <mach/bcm2708_soc.h>
+
+	.macro	addruart, rp, rv, tmp
+	ldr	\rp, =BCM2708_DEBUG_PHYS
+	ldr	\rv, =BCM2708_DEBUG_VIRT
+	.endm
+
+#include <asm/hardware/debug-pl01x.S>
diff --git a/arch/arm/mach-bcm2708/include/mach/timex.h b/arch/arm/mach-bcm2708/include/mach/timex.h
new file mode 100644
index 0000000..ca67219
--- /dev/null
+++ b/arch/arm/mach-bcm2708/include/mach/timex.h
@@ -0,0 +1,26 @@
+/*
+ *  BCM2708 system clock frequency
+ *
+ *  Copyright (C) 2010 Broadcom
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+
+#ifndef __ASM_ARCH_TIMEX_H
+#define __ASM_ARCH_TIMEX_H
+
+#define CLOCK_TICK_RATE		(1000000)
+
+#endif
diff --git a/arch/arm/mach-bcm2708/include/mach/uncompress.h b/arch/arm/mach-bcm2708/include/mach/uncompress.h
new file mode 100644
index 0000000..df2bf2f
--- /dev/null
+++ b/arch/arm/mach-bcm2708/include/mach/uncompress.h
@@ -0,0 +1,45 @@
+/*
+ * Copyright (C) 2010 Broadcom
+ * Copyright (C) 2003 ARM Limited
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/io.h>
+#include <linux/amba/serial.h>
+#include <mach/bcm2708_soc.h>
+
+#define UART0_BASE BCM2708_DEBUG_PHYS
+
+#define BCM2708_UART_DR IOMEM(UART0_BASE + UART01x_DR)
+#define BCM2708_UART_FR IOMEM(UART0_BASE + UART01x_FR)
+#define BCM2708_UART_CR IOMEM(UART0_BASE + UART011_CR)
+
+static inline void putc(int c)
+{
+	while (__raw_readl(BCM2708_UART_FR) & UART01x_FR_TXFF)
+		barrier();
+
+	__raw_writel(c, BCM2708_UART_DR);
+}
+
+static inline void flush(void)
+{
+	int fr;
+
+	do {
+		fr = __raw_readl(BCM2708_UART_FR);
+		barrier();
+	} while ((fr & (UART011_FR_TXFE | UART01x_FR_BUSY)) != UART011_FR_TXFE);
+}
+
+#define arch_decomp_setup()
+#define arch_decomp_wdog()
-- 
1.7.9.5

[PATCH V3 2/5] ARM: bcm2708: add interrupt controller driver

[Stephen Warren]

From: Simon Arlott <simon@fire.lp0.eu>

The BCM2708 contains a custom interrupt controller, which supports 72
interrupt sources using a 2-level register scheme. The interrupt
controller, or the HW block containing it, is referred to occasionally
as "armctrl" in the SoC documentation, hence the symbol naming in the
code.

This patch was extracted from git://github.com/lp0/linux.git branch
rpi-split as of 2012/09/08, and modified as follows:

* Added devicetree documentation, and hence removed list of IRQs from
  bcm2835.dtsi.
* Changed shift in MAKE_HWIRQ() and HWIRQ_BANK() from 8 to 5 to reduce
  the size of the hwirq space, and pass the total size of the hwirq space
  to irq_domain_add_linear(), rather than just the number of valid hwirqs;
  the two are different due to the hwirq space being sparse.
* Added the interrupt controller DT node to the top-level of the DT,
  rather than nesting it inside a /axi node. Hence, changed the reg value
  since /axi had a ranges property. This seems simpler to me, but I'm not
  sure if everyone will like this change or not.
* Don't set struct irq_domain_ops.map = irq_domain_simple_map, hence
  removing the need to patch include/linux/irqdomain.h or
  kernel/irq/irqdomain.c.
* Removed unused IS_VALID_BANK()/IS_VALID_IRQ() macros.
* Renamed armctrl_handle_irq() to prevent possible symbol clashes.
* Made armctrl_of_init() static.
* Removed comment "Each bank is registered as a separate interrupt
  controller" since this is no longer true.
* Removed FSF address from license header.
* Added my name to copyright header.

Signed-off-by: Chris Boot <bootc@bootc.net>
Signed-off-by: Simon Arlott <simon@fire.lp0.eu>
Signed-off-by: Dom Cobley <popcornmix@gmail.com>
Signed-off-by: Dom Cobley <dc4@broadcom.com>
Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
--
v3: New patch.

TODO: Should of_address_to_resource(), ioremap(), request_mem_region()
in armctrl_of_init() be collapsed into of_iomap(). This wouldn't request
the region, but a quick grep implies that's quite common with DT.
---
 .../arm/bcm2708/broadcom,bcm2708-armctrl-ic.txt    |  110 +++++++++
 arch/arm/boot/dts/bcm2835.dtsi                     |    8 +
 arch/arm/mach-bcm2708/Makefile                     |    1 +
 arch/arm/mach-bcm2708/bcm2708.c                    |   12 +-
 arch/arm/mach-bcm2708/irq.c                        |  234 ++++++++++++++++++++
 arch/arm/mach-bcm2708/irq.h                        |   27 +++
 6 files changed, 383 insertions(+), 9 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/arm/bcm2708/broadcom,bcm2708-armctrl-ic.txt
 create mode 100644 arch/arm/mach-bcm2708/irq.c
 create mode 100644 arch/arm/mach-bcm2708/irq.h

diff --git a/Documentation/devicetree/bindings/arm/bcm2708/broadcom,bcm2708-armctrl-ic.txt b/Documentation/devicetree/bindings/arm/bcm2708/broadcom,bcm2708-armctrl-ic.txt
new file mode 100644
index 0000000..d7f7887
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/bcm2708/broadcom,bcm2708-armctrl-ic.txt
@@ -0,0 +1,110 @@
+BCM2708 Top-Level ("ARMCTRL") Interrupt Controller
+
+The BCM2708 contains a custom top-level interrupt controller, which supports
+72 interrupt sources using a 2-level register scheme. The interrupt
+controller, or the HW block containing it, is referred to occasionally
+as "armctrl" in the SoC documentation, hence naming of this binding.
+
+Required properties:
+
+- compatible : should be "broadcom,bcm2708-armctrl-ic.txt"
+- reg : Specifies base physical address and size of the registers.
+- interrupt-controller : Identifies the node as an interrupt controller
+- #interrupt-cells : Specifies the number of cells needed to encode an
+  interrupt source. The value shall be 2.
+
+  The 1st cell is the interrupt bank; 0 for interrupts in the "IRQ basic
+  pending" register, or 1/2 respectively for interrupts in the "IRQ pending
+  1/2" register.
+
+  The 2nd cell contains the interrupt number within the bank. Valid values
+  are 0..7 for bank 0, and 0..31 for bank 1.
+
+The interrupt sources are as follows, for the BCM2835 derivative SoC at least:
+
+Bank 0:
+0: ARM_TIMER
+1: ARM_MAILBOX
+2: ARM_DOORBELL_0
+3: ARM_DOORBELL_1
+4: VPU0_HALTED
+5: VPU1_HALTED
+6: ILLEGAL_TYPE0
+7: ILLEGAL_TYPE1
+
+Bank 1:
+0: TIMER0
+1: TIMER1
+2: TIMER2
+3: TIMER3
+4: CODEC0
+5: CODEC1
+6: CODEC2
+7: VC_JPEG
+8: ISP
+9: VC_USB
+10: VC_3D
+11: TRANSPOSER
+12: MULTICORESYNC0
+13: MULTICORESYNC1
+14: MULTICORESYNC2
+15: MULTICORESYNC3
+16: DMA0
+17: DMA1
+18: VC_DMA2
+19: VC_DMA3
+20: DMA4
+21: DMA5
+22: DMA6
+23: DMA7
+24: DMA8
+25: DMA9
+26: DMA10
+27: DMA11
+28: DMA12
+29: AUX
+30: ARM
+31: VPUDMA
+
+Bank 2:
+0: HOSTPORT
+1: VIDEOSCALER
+2: CCP2TX
+3: SDC
+4: DSI0
+5: AVE
+6: CAM0
+7: CAM1
+8: HDMI0
+9: HDMI1
+10: PIXELVALVE1
+11: I2CSPISLV
+12: DSI1
+13: PWA0
+14: PWA1
+15: CPR
+16: SMI
+17: GPIO0
+18: GPIO1
+19: GPIO2
+20: GPIO3
+21: VC_I2C
+22: VC_SPI
+23: VC_I2SPCM
+24: VC_SDIO
+25: VC_UART
+26: SLIMBUS
+27: VEC
+28: CPG
+29: RNG
+30: VC_ARASANSDIO
+31: AVSPMON
+
+Example:
+
+intc: interrupt-controller {
+	compatible = "broadcom,bcm2708-armctrl-ic";
+	reg = <0x2000b200 0x200>;
+	interrupt-controller;
+	#interrupt-cells = <2>;
+};
diff --git a/arch/arm/boot/dts/bcm2835.dtsi b/arch/arm/boot/dts/bcm2835.dtsi
index 9039482..00eaf2b 100644
--- a/arch/arm/boot/dts/bcm2835.dtsi
+++ b/arch/arm/boot/dts/bcm2835.dtsi
@@ -3,8 +3,16 @@
 / {
 	compatible = "broadcom,bcm2835", "broadcom,bcm2708";
 	model = "BCM2835";
+	interrupt-parent = <&intc>;
 
 	chosen {
 		bootargs = "earlyprintk";
 	};
+
+	intc: interrupt-controller {
+		compatible = "broadcom,bcm2708-armctrl-ic";
+		reg = <0x2000b200 0x200>;
+		interrupt-controller;
+		#interrupt-cells = <2>;
+	};
 };
diff --git a/arch/arm/mach-bcm2708/Makefile b/arch/arm/mach-bcm2708/Makefile
index c382763..597f811 100644
--- a/arch/arm/mach-bcm2708/Makefile
+++ b/arch/arm/mach-bcm2708/Makefile
@@ -1 +1,2 @@
 obj-y += bcm2708.o
+obj-y += irq.o
diff --git a/arch/arm/mach-bcm2708/bcm2708.c b/arch/arm/mach-bcm2708/bcm2708.c
index ae6df4f..ad6b7f8 100644
--- a/arch/arm/mach-bcm2708/bcm2708.c
+++ b/arch/arm/mach-bcm2708/bcm2708.c
@@ -22,6 +22,8 @@
 
 #include <mach/bcm2708_soc.h>
 
+#include "irq.h"
+
 static struct map_desc io_map __initdata = {
 	.virtual = BCM2708_PERIPH_VIRT,
 	.pfn = __phys_to_pfn(BCM2708_PERIPH_PHYS),
@@ -34,14 +36,6 @@ void __init bcm2708_map_io(void)
 	iotable_init(&io_map, 1);
 }
 
-void __init bcm2708_init_irq(void)
-{
-}
-
-asmlinkage void __exception_irq_entry bcm2708_handle_irq(struct pt_regs *regs)
-{
-}
-
 void __init bcm2708_init(void)
 {
 	int ret;
@@ -70,7 +64,7 @@ static const char * const bcm2708_compat[] = {
 DT_MACHINE_START(BCM2708, "BCM2708")
 	.map_io = bcm2708_map_io,
 	.init_irq = bcm2708_init_irq,
-	.handle_irq = bcm2708_handle_irq,
+	.handle_irq = bcm2708_armctrl_handle_irq,
 	.init_machine = bcm2708_init,
 	.timer = &bcm2708_timer,
 	.dt_compat = bcm2708_compat
diff --git a/arch/arm/mach-bcm2708/irq.c b/arch/arm/mach-bcm2708/irq.c
new file mode 100644
index 0000000..81dba4e
--- /dev/null
+++ b/arch/arm/mach-bcm2708/irq.c
@@ -0,0 +1,234 @@
+/*
+ *  Copyright 2010 Broadcom
+ *  Copyright 2012 Simon Arlott, Chris Boot, Stephen Warren
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * Quirk 1: Shortcut interrupts don't set the bank 1/2 register pending bits
+ *
+ * If an interrupt fires on bank 1 that isn't in the shortcuts list, bit 8
+ * on bank 0 is set to signify that an interrupt in bank 1 has fired, and
+ * to look in the bank 1 status register for more information.
+ *
+ * If an interrupt fires on bank 1 that _is_ in the shortcuts list, its
+ * shortcut bit in bank 0 is set as well as its interrupt bit in the bank 1
+ * status register, but bank 0 bit 8 is _not_ set.
+ *
+ * Quirk 2: You can't mask the register 1/2 pending interrupts
+ *
+ * In a proper cascaded interrupt controller, the interrupt lines with
+ * cascaded interrupt controllers on them are just normal interrupt lines.
+ * You can mask the interrupts and get on with things. With this controller
+ * you can't do that.
+ *
+ * Quirk 3: The shortcut interrupts can't be (un)masked in bank 0
+ *
+ * Those interrupts that have shortcuts can only be masked/unmasked in
+ * their respective banks' enable/disable registers. Doing so in the bank 0
+ * enable/disable registers has no effect.
+ *
+ * The FIQ control register:
+ *  Bits 0-6: IRQ (index in order of interrupts from banks 1, 2, then 0)
+ *  Bit    7: Enable FIQ generation
+ *  Bits  8+: Unused
+ *
+ * An interrupt must be disabled before configuring it for FIQ generation
+ * otherwise both handlers will fire at the same time!
+ */
+
+#include <linux/io.h>
+#include <linux/slab.h>
+#include <linux/of_address.h>
+#include <linux/of_irq.h>
+#include <linux/irqdomain.h>
+#include <asm/exception.h>
+
+#include "irq.h"
+
+/* Put the bank and irq (32 bits) into the hwirq */
+#define MAKE_HWIRQ(b, n)	((b << 5) | (n))
+#define HWIRQ_BANK(i)		(i >> 5)
+#define HWIRQ_BIT(i)		BIT(i & 0x1f)
+
+#define NR_IRQS_BANK0		8
+#define BANK0_HWIRQ_MASK	0xff
+/* Shortcuts can't be disabled so any unknown new ones need to be masked */
+#define SHORTCUT1_MASK		0x00007c00
+#define SHORTCUT2_MASK		0x001f8000
+#define SHORTCUT_SHIFT		10
+#define BANK1_HWIRQ		BIT(8)
+#define BANK2_HWIRQ		BIT(9)
+#define BANK0_VALID_MASK	(BANK0_HWIRQ_MASK | BANK1_HWIRQ | BANK2_HWIRQ \
+					| SHORTCUT1_MASK | SHORTCUT2_MASK)
+
+#define REG_FIQ_CONTROL		0x0c
+
+#define NR_BANKS		3
+#define IRQS_PER_BANK		32
+
+static int reg_pending[] __initconst = { 0x00, 0x04, 0x08 };
+static int reg_enable[] __initconst = { 0x18, 0x10, 0x14 };
+static int reg_disable[] __initconst = { 0x24, 0x1c, 0x20 };
+static int bank_irqs[] __initconst = { 8, 32, 32 };
+
+static const int shortcuts[] = {
+	7, 9, 10, 18, 19,		/* Bank 1 */
+	21, 22, 23, 24, 25, 30		/* Bank 2 */
+};
+
+struct armctrl_ic {
+	void __iomem *base;
+	void __iomem *pending[NR_BANKS];
+	void __iomem *enable[NR_BANKS];
+	void __iomem *disable[NR_BANKS];
+	struct irq_domain *domain;
+};
+
+static struct armctrl_ic intc __read_mostly;
+
+static void armctrl_mask_irq(struct irq_data *d)
+{
+	writel_relaxed(HWIRQ_BIT(d->hwirq), intc.disable[HWIRQ_BANK(d->hwirq)]);
+}
+
+static void armctrl_unmask_irq(struct irq_data *d)
+{
+	writel_relaxed(HWIRQ_BIT(d->hwirq), intc.enable[HWIRQ_BANK(d->hwirq)]);
+}
+
+static struct irq_chip armctrl_chip = {
+	.name = "ARMCTRL-level",
+	.irq_mask = armctrl_mask_irq,
+	.irq_unmask = armctrl_unmask_irq
+};
+
+static int armctrl_xlate(struct irq_domain *d, struct device_node *ctrlr,
+	const u32 *intspec, unsigned int intsize,
+	unsigned long *out_hwirq, unsigned int *out_type)
+{
+	if (WARN_ON(intsize != 2))
+		return -EINVAL;
+
+	if (WARN_ON(intspec[0] >= NR_BANKS))
+		return -EINVAL;
+
+	if (WARN_ON(intspec[1] >= IRQS_PER_BANK))
+		return -EINVAL;
+
+	if (WARN_ON(intspec[0] == 0 && intspec[1] >= NR_IRQS_BANK0))
+		return -EINVAL;
+
+	*out_hwirq = MAKE_HWIRQ(intspec[0], intspec[1]);
+	*out_type = IRQ_TYPE_NONE;
+	return 0;
+}
+
+static struct irq_domain_ops armctrl_ops = {
+	.xlate = armctrl_xlate
+};
+
+static int __init armctrl_of_init(struct device_node *node,
+	struct device_node *parent)
+{
+	struct resource res;
+	void __iomem *base;
+	int ret, irq, b, i;
+
+	ret = of_address_to_resource(node, 0, &res);
+	if (ret)
+		panic("%s: unable to find IC registers\n",
+			node->full_name);
+
+	base = ioremap(res.start, resource_size(&res));
+	if (!base)
+		panic("%s: unable to map IC registers\n",
+			node->full_name);
+
+	if (!request_mem_region(res.start, resource_size(&res),
+			node->full_name))
+		panic("%s: unable to request resources for IC registers\n",
+			node->full_name);
+
+	intc.domain = irq_domain_add_linear(node, MAKE_HWIRQ(NR_BANKS, 0),
+			&armctrl_ops, NULL);
+	if (!intc.domain)
+		panic("%s: unable to create IRQ domain\n", node->full_name);
+
+	for (b = 0; b < NR_BANKS; b++) {
+		intc.pending[b] = base + reg_pending[b];
+		intc.enable[b] = base + reg_enable[b];
+		intc.disable[b] = base + reg_disable[b];
+
+		for (i = 0; i < bank_irqs[b]; i++) {
+			irq = irq_create_mapping(intc.domain, MAKE_HWIRQ(b, i));
+			BUG_ON(irq <= 0);
+			irq_set_chip_and_handler(irq, &armctrl_chip,
+				handle_level_irq);
+			set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
+		}
+	}
+	return 0;
+}
+
+static struct of_device_id irq_of_match[] __initconst = {
+	{ .compatible = "broadcom,bcm2708-armctrl-ic", .data = armctrl_of_init }
+};
+
+void __init bcm2708_init_irq(void)
+{
+	of_irq_init(irq_of_match);
+}
+
+/*
+ * Handle each interrupt across the entire interrupt controller.  This reads the
+ * status register before handling each interrupt, which is necessary given that
+ * handle_IRQ may briefly re-enable interrupts for soft IRQ handling.
+ */
+
+static void armctrl_handle_bank(int bank, struct pt_regs *regs)
+{
+	u32 stat, irq;
+
+	while ((stat = readl_relaxed(intc.pending[bank]))) {
+		irq = MAKE_HWIRQ(bank, ffs(stat) - 1);
+		handle_IRQ(irq_linear_revmap(intc.domain, irq), regs);
+	}
+}
+
+static void armctrl_handle_shortcut(int bank, struct pt_regs *regs,
+	u32 stat)
+{
+	u32 irq = MAKE_HWIRQ(bank, shortcuts[ffs(stat >> SHORTCUT_SHIFT) - 1]);
+	handle_IRQ(irq_linear_revmap(intc.domain, irq), regs);
+}
+
+asmlinkage void __exception_irq_entry bcm2708_armctrl_handle_irq(
+	struct pt_regs *regs)
+{
+	u32 stat, irq;
+
+	while ((stat = readl_relaxed(intc.pending[0]) & BANK0_VALID_MASK)) {
+		if (stat & BANK0_HWIRQ_MASK) {
+			irq = MAKE_HWIRQ(0, ffs(stat & BANK0_HWIRQ_MASK) - 1);
+			handle_IRQ(irq_linear_revmap(intc.domain, irq), regs);
+		} else if (stat & SHORTCUT1_MASK) {
+			armctrl_handle_shortcut(1, regs, stat & SHORTCUT1_MASK);
+		} else if (stat & SHORTCUT2_MASK) {
+			armctrl_handle_shortcut(2, regs, stat & SHORTCUT2_MASK);
+		} else if (stat & BANK1_HWIRQ) {
+			armctrl_handle_bank(1, regs);
+		} else if (stat & BANK2_HWIRQ) {
+			armctrl_handle_bank(2, regs);
+		} else {
+			BUG();
+		}
+	}
+}
diff --git a/arch/arm/mach-bcm2708/irq.h b/arch/arm/mach-bcm2708/irq.h
new file mode 100644
index 0000000..2cf073b
--- /dev/null
+++ b/arch/arm/mach-bcm2708/irq.h
@@ -0,0 +1,27 @@
+/*
+ *  Copyright (C) 2010 Broadcom
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+
+#ifndef __BCM2708_IRQ_H
+#define __BCM2708_IRQ_H
+
+extern void bcm2708_init_irq(void);
+
+extern asmlinkage void __exception_irq_entry bcm2708_armctrl_handle_irq(
+	struct pt_regs *regs);
+
+#endif
-- 
1.7.9.5

[PATCH V3 3/5] ARM: bcm2708: add system timer

[Stephen Warren]

From: Simon Arlott <simon@fire.lp0.eu>

The System Timer peripheral provides four 32-bit timer channels and a
single 64-bit free running counter. Each channel has an output compare
register, which is compared against the 32 least significant bits of the
free running counter values, and generates an interrupt.

Timer 3 is used as the Linux timer.

The BCM2708 also contains an SP804-based timer module. However, it
apparently has significant differences from the standard SP804 IP block,
and Broadcom's documentation recommends using the system timer instead.

This patch was extracted from git://github.com/lp0/linux.git branch
rpi-split as of 2012/09/08, and modified as follows:

* Moved struct sys_timer bcm2708_timer into time.c to encapsulate it more.
* Added DT binding docs.
* Moved to drivers/clocksource/. This looks like the desired location for
  such code now.
* Simplified bcm2708_time_init() to find one matching node and operate on
  it, rather than looping over all matching nodes. This seems more
  consistent with other clocksource code.
* Renamed struct bcm2708_timer.index to match_mask to better represent its
  purpose.
* s/printk(PR_INFO/pr_info(/

Signed-off-by: Chris Boot <bootc@bootc.net>
Signed-off-by: Simon Arlott <simon@fire.lp0.eu>
Signed-off-by: Dom Cobley <popcornmix@gmail.com>
Signed-off-by: Dom Cobley <dc4@broadcom.com>
Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
---
v3: New patch.

TODO: Should of_address_to_resource(), ioremap(), request_mem_region()
in bcm2708_time_init() be collapsed into of_iomap(). This wouldn't request
the region, but a quick grep implies that's quite common with DT.
---
 .../arm/bcm2708/broadcom,bcm2708-system-timer.txt  |   22 +++
 arch/arm/boot/dts/bcm2835.dtsi                     |    7 +
 arch/arm/mach-bcm2708/bcm2708.c                    |   10 +-
 drivers/clocksource/Makefile                       |    1 +
 drivers/clocksource/bcm2708_timer.c                |  170 ++++++++++++++++++++
 include/linux/bcm2708_timer.h                      |   22 +++
 6 files changed, 223 insertions(+), 9 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/arm/bcm2708/broadcom,bcm2708-system-timer.txt
 create mode 100644 drivers/clocksource/bcm2708_timer.c
 create mode 100644 include/linux/bcm2708_timer.h

diff --git a/Documentation/devicetree/bindings/arm/bcm2708/broadcom,bcm2708-system-timer.txt b/Documentation/devicetree/bindings/arm/bcm2708/broadcom,bcm2708-system-timer.txt
new file mode 100644
index 0000000..840e18b
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/bcm2708/broadcom,bcm2708-system-timer.txt
@@ -0,0 +1,22 @@
+BCM2708 System Timer
+
+The System Timer peripheral provides four 32-bit timer channels and a
+single 64-bit free running counter. Each channel has an output compare
+register, which is compared against the 32 least significant bits of the
+free running counter values, and generates an interrupt.
+
+Required properties:
+
+- compatible : should be "broadcom,bcm2708-system-timer.txt"
+- reg : Specifies base physical address and size of the registers.
+- interrupts : A list of 4 interrupt sinks; one per timer channel.
+- clock-frequency : The frequency of the clock that drives the counter, in Hz.
+
+Example:
+
+timer {
+	compatible = "broadcom,bcm2835-system-timer", "broadcom,bcm2708-system-timer";
+	reg = <0x20003000 0x1000>;
+	interrupts = <1 0>, <1 1>, <1 2>, <1 3>;
+	clock-frequency = <1000000>;
+};
diff --git a/arch/arm/boot/dts/bcm2835.dtsi b/arch/arm/boot/dts/bcm2835.dtsi
index 00eaf2b..3e8ea51 100644
--- a/arch/arm/boot/dts/bcm2835.dtsi
+++ b/arch/arm/boot/dts/bcm2835.dtsi
@@ -9,6 +9,13 @@
 		bootargs = "earlyprintk";
 	};
 
+	timer {
+		compatible = "broadcom,bcm2835-system-timer", "broadcom,bcm2708-system-timer";
+		reg = <0x20003000 0x1000>;
+		interrupts = <1 0>, <1 1>, <1 2>, <1 3>;
+		clock-frequency = <1000000>;
+	};
+
 	intc: interrupt-controller {
 		compatible = "broadcom,bcm2708-armctrl-ic";
 		reg = <0x2000b200 0x200>;
diff --git a/arch/arm/mach-bcm2708/bcm2708.c b/arch/arm/mach-bcm2708/bcm2708.c
index ad6b7f8..8ee11d9 100644
--- a/arch/arm/mach-bcm2708/bcm2708.c
+++ b/arch/arm/mach-bcm2708/bcm2708.c
@@ -14,10 +14,10 @@
 
 #include <linux/init.h>
 #include <linux/of_platform.h>
+#include <linux/bcm2708_timer.h>
 
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
-#include <asm/mach/time.h>
 #include <asm/exception.h>
 
 #include <mach/bcm2708_soc.h>
@@ -48,14 +48,6 @@ void __init bcm2708_init(void)
 	}
 }
 
-static void __init bcm2708_timer_init(void)
-{
-}
-
-struct sys_timer bcm2708_timer = {
-	.init = bcm2708_timer_init
-};
-
 static const char * const bcm2708_compat[] = {
 	"broadcom,bcm2708",
 	NULL
diff --git a/drivers/clocksource/Makefile b/drivers/clocksource/Makefile
index 6591990..342b72e 100644
--- a/drivers/clocksource/Makefile
+++ b/drivers/clocksource/Makefile
@@ -14,3 +14,4 @@ obj-$(CONFIG_DW_APB_TIMER_OF)	+= dw_apb_timer_of.o
 obj-$(CONFIG_CLKSRC_DBX500_PRCMU)	+= clksrc-dbx500-prcmu.o
 obj-$(CONFIG_ARMADA_370_XP_TIMER)	+= time-armada-370-xp.o
 obj-$(CONFIG_CLKSRC_ARM_GENERIC)	+= arm_generic.o
+obj-$(CONFIG_ARCH_BCM2708)	+= bcm2708_timer.o
diff --git a/drivers/clocksource/bcm2708_timer.c b/drivers/clocksource/bcm2708_timer.c
new file mode 100644
index 0000000..bc41381
--- /dev/null
+++ b/drivers/clocksource/bcm2708_timer.c
@@ -0,0 +1,170 @@
+/*
+ * Copyright 2012 Simon Arlott
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+
+#include <linux/bcm2708_timer.h>
+#include <linux/bitops.h>
+#include <linux/clockchips.h>
+#include <linux/clocksource.h>
+#include <linux/interrupt.h>
+#include <linux/irqreturn.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/of_address.h>
+#include <linux/of_irq.h>
+#include <linux/of_platform.h>
+#include <linux/slab.h>
+#include <linux/string.h>
+
+#include <asm/sched_clock.h>
+#include <asm/irq.h>
+
+#define REG_CONTROL	0x00
+#define REG_COUNTER_LO	0x04
+#define REG_COUNTER_HI	0x08
+#define REG_COMPARE(n)	(0x0c + (n) * 4)
+#define MAX_TIMER	3
+#define DEFAULT_TIMER	3
+
+struct bcm2708_timer {
+	void __iomem *control;
+	void __iomem *compare;
+	int match_mask;
+	struct clock_event_device evt;
+	struct irqaction act;
+};
+
+static void __iomem *system_clock __read_mostly;
+
+static u32 notrace bcm2708_sched_read(void)
+{
+	return readl_relaxed(system_clock);
+}
+
+static void bcm2708_time_set_mode(enum clock_event_mode mode,
+	struct clock_event_device *evt_dev)
+{
+	switch (mode) {
+	case CLOCK_EVT_MODE_ONESHOT:
+	case CLOCK_EVT_MODE_UNUSED:
+	case CLOCK_EVT_MODE_SHUTDOWN:
+	case CLOCK_EVT_MODE_RESUME:
+		break;
+	default:
+		WARN(1, "%s: unhandled event mode %d\n", __func__, mode);
+		break;
+	}
+}
+
+static int bcm2708_time_set_next_event(unsigned long event,
+	struct clock_event_device *evt_dev)
+{
+	struct bcm2708_timer *timer = container_of(evt_dev,
+		struct bcm2708_timer, evt);
+	writel_relaxed(readl_relaxed(system_clock) + event,
+		timer->compare);
+	return 0;
+}
+
+static irqreturn_t bcm2708_time_interrupt(int irq, void *dev_id)
+{
+	struct bcm2708_timer *timer = dev_id;
+	void (*event_handler)(struct clock_event_device *);
+	if (readl_relaxed(timer->control) & timer->match_mask) {
+		writel_relaxed(timer->match_mask, timer->control);
+
+		event_handler = ACCESS_ONCE(timer->evt.event_handler);
+		if (event_handler)
+			event_handler(&timer->evt);
+		return IRQ_HANDLED;
+	} else {
+		return IRQ_NONE;
+	}
+}
+
+static struct of_device_id bcm2708_time_match[] __initconst = {
+	{ .compatible = "broadcom,bcm2708-system-timer" },
+	{}
+};
+
+static void __init bcm2708_time_init(void)
+{
+	struct device_node *node;
+	struct resource res;
+	void __iomem *base;
+	u32 freq;
+	int irq;
+	struct bcm2708_timer *timer;
+
+	node = of_find_matching_node(NULL, bcm2708_time_match);
+	if (!node)
+		panic("No bcm2708 timer node");
+
+	if (of_address_to_resource(node, 0, &res))
+		panic("Can't parse address");
+
+	if (!request_mem_region(res.start, resource_size(&res),
+			node->full_name))
+		panic("Can't request memory region");
+
+	base = ioremap(res.start, resource_size(&res));
+	if (!base)
+		panic("Can't remap registers");
+
+	if (of_property_read_u32(node, "clock-frequency", &freq))
+		panic("Can't read clock-frequency");
+
+	system_clock = base + REG_COUNTER_LO;
+	setup_sched_clock(bcm2708_sched_read, 32, freq);
+
+	clocksource_mmio_init(base + REG_COUNTER_LO, node->name,
+		freq, 300, 32, clocksource_mmio_readl_up);
+
+	irq = irq_of_parse_and_map(node, DEFAULT_TIMER);
+	if (irq <= 0)
+		panic("Can't parse IRQ");
+
+	timer = kzalloc(sizeof(*timer), GFP_KERNEL);
+	if (!timer)
+		panic("Can't allocate timer struct\n");
+
+	timer->control = base + REG_CONTROL;
+	timer->compare = base + REG_COMPARE(DEFAULT_TIMER);
+	timer->match_mask = BIT(DEFAULT_TIMER);
+	timer->evt.name = node->name;
+	timer->evt.rating = 300;
+	timer->evt.features = CLOCK_EVT_FEAT_ONESHOT;
+	timer->evt.set_mode = bcm2708_time_set_mode;
+	timer->evt.set_next_event = bcm2708_time_set_next_event;
+	timer->evt.cpumask = cpumask_of(0);
+	timer->act.name = node->name;
+	timer->act.flags = IRQF_TIMER | IRQF_SHARED;
+	timer->act.dev_id = timer;
+	timer->act.handler = bcm2708_time_interrupt;
+
+	if (setup_irq(irq, &timer->act))
+		panic("Can't set up timer IRQ\n");
+
+	clockevents_config_and_register(&timer->evt, freq, 0xf, 0xffffffff);
+
+	pr_info("bcm2708: system timer at MMIO %#lx (irq = %d)\n",
+		(unsigned long)res.start, irq);
+}
+
+struct sys_timer bcm2708_timer = {
+	.init = bcm2708_time_init,
+};
diff --git a/include/linux/bcm2708_timer.h b/include/linux/bcm2708_timer.h
new file mode 100644
index 0000000..1a433c1
--- /dev/null
+++ b/include/linux/bcm2708_timer.h
@@ -0,0 +1,22 @@
+/*
+ * Copyright 2012 Simon Arlott
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef __BCM2708_TIMER_H
+#define __BCM2708_TIMER_H
+
+#include <asm/mach/time.h>
+
+extern struct sys_timer bcm2708_timer;
+
+#endif
-- 
1.7.9.5

[PATCH V3 4/5] ARM: bcm2708: add stub clock driver

[Stephen Warren]

From: Simon Arlott <simon@fire.lp0.eu>

This patch adds a minimal stub clock driver for the BCM2708. Its sole
purpose is to allow the PL011 AMBA clk_get() API calls to provide
something that looks enough like a clock that the driver probes and
operates correctly.

This patch was extracted from git://github.com/lp0/linux.git branch
rpi-split as of 2012/09/08, and modified as follows:

* Modified .dev_id for UART clocks to match UART DT node names.

Signed-off-by: Chris Boot <bootc@bootc.net>
Signed-off-by: Simon Arlott <simon@fire.lp0.eu>
Signed-off-by: Dom Cobley <popcornmix@gmail.com>
Signed-off-by: Dom Cobley <dc4@broadcom.com>
Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
--
v3: New patch.
---
 arch/arm/mach-bcm2708/Makefile  |    1 +
 arch/arm/mach-bcm2708/bcm2708.c |    3 +++
 arch/arm/mach-bcm2708/clock.c   |   53 +++++++++++++++++++++++++++++++++++++++
 arch/arm/mach-bcm2708/clock.h   |   24 ++++++++++++++++++
 4 files changed, 81 insertions(+)
 create mode 100644 arch/arm/mach-bcm2708/clock.c
 create mode 100644 arch/arm/mach-bcm2708/clock.h

diff --git a/arch/arm/mach-bcm2708/Makefile b/arch/arm/mach-bcm2708/Makefile
index 597f811..4902453 100644
--- a/arch/arm/mach-bcm2708/Makefile
+++ b/arch/arm/mach-bcm2708/Makefile
@@ -1,2 +1,3 @@
 obj-y += bcm2708.o
+obj-y += clock.o
 obj-y += irq.o
diff --git a/arch/arm/mach-bcm2708/bcm2708.c b/arch/arm/mach-bcm2708/bcm2708.c
index 8ee11d9..05a3fc1 100644
--- a/arch/arm/mach-bcm2708/bcm2708.c
+++ b/arch/arm/mach-bcm2708/bcm2708.c
@@ -22,6 +22,7 @@
 
 #include <mach/bcm2708_soc.h>
 
+#include "clock.h"
 #include "irq.h"
 
 static struct map_desc io_map __initdata = {
@@ -40,6 +41,8 @@ void __init bcm2708_init(void)
 {
 	int ret;
 
+	bcm2708_init_clocks();
+
 	ret = of_platform_populate(NULL, of_default_bus_match_table, NULL,
 				   NULL);
 	if (ret) {
diff --git a/arch/arm/mach-bcm2708/clock.c b/arch/arm/mach-bcm2708/clock.c
new file mode 100644
index 0000000..83b26ec
--- /dev/null
+++ b/arch/arm/mach-bcm2708/clock.c
@@ -0,0 +1,53 @@
+/*
+ * Copyright (C) 2010 Broadcom
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+
+#include <linux/clk.h>
+#include <linux/clk-private.h>
+#include <linux/clk-provider.h>
+#include <linux/clkdev.h>
+
+#include "clock.h"
+
+/*
+ * These are fixed clocks (and device tree doesn't support clk!).
+ *
+ * They're probably not all root clocks and it may be possible to
+ * turn them on and off but until this is mapped out better it's
+ * the only way they can be used.
+ */
+DEFINE_CLK_FIXED_RATE(sys_pclk,   CLK_IS_ROOT, 250000000, 0);
+DEFINE_CLK_FIXED_RATE(apb_pclk,   CLK_IS_ROOT, 126000000, 0);
+DEFINE_CLK_FIXED_RATE(uart0_pclk, CLK_IS_ROOT,   3000000, 0);
+DEFINE_CLK_FIXED_RATE(uart1_pclk, CLK_IS_ROOT, 125000000, 0);
+
+static struct clk_lookup lookups[] = {
+	{ .con_id = "sys_pclk", .clk = &sys_pclk },
+	{ .con_id = "apb_pclk", .clk = &apb_pclk },
+	{ .dev_id = "20201000.uart", .clk = &uart0_pclk },
+	{ .dev_id = "20215000.uart", .clk = &uart1_pclk }
+};
+
+void __init bcm2708_init_clocks(void)
+{
+	int i;
+
+	for (i = 0; i < ARRAY_SIZE(lookups); i++) {
+		__clk_init(NULL, lookups[i].clk);
+		clkdev_add(&lookups[i]);
+	}
+}
diff --git a/arch/arm/mach-bcm2708/clock.h b/arch/arm/mach-bcm2708/clock.h
new file mode 100644
index 0000000..8670060
--- /dev/null
+++ b/arch/arm/mach-bcm2708/clock.h
@@ -0,0 +1,24 @@
+/*
+ * Copyright (C) 2010 Broadcom
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+
+#ifndef __BCM2708_CLOCK_H
+#define __BCM2708_CLOCK_H
+
+void __init bcm2708_init_clocks(void);
+
+#endif
-- 
1.7.9.5

[PATCH V3 5/5] ARM: bcm2708: instantiate console UART

[Stephen Warren]

From: Simon Arlott <simon@fire.lp0.eu>

This patch was extracted from git://github.com/lp0/linux.git branch
rpi-split as of 2012/09/08, and modified as follows:

* Modified UART DT node to use a unit-address to differentiate UART node
  names, rather than using different base names "uart0" and "uart1".
  Note that UART 1 (the Broadcom "mini UART") is not yet present, but
  I'm naming the DT node in anticipation that it will be added.

Signed-off-by: Chris Boot <bootc@bootc.net>
Signed-off-by: Simon Arlott <simon@fire.lp0.eu>
Signed-off-by: Dom Cobley <popcornmix@gmail.com>
Signed-off-by: Dom Cobley <dc4@broadcom.com>
Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
--
v3: New patch.
---
 arch/arm/boot/dts/bcm2835.dtsi |    9 ++++++++-
 1 file changed, 8 insertions(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/bcm2835.dtsi b/arch/arm/boot/dts/bcm2835.dtsi
index 3e8ea51..05b1a37 100644
--- a/arch/arm/boot/dts/bcm2835.dtsi
+++ b/arch/arm/boot/dts/bcm2835.dtsi
@@ -6,7 +6,7 @@
 	interrupt-parent = <&intc>;
 
 	chosen {
-		bootargs = "earlyprintk";
+		bootargs = "earlyprintk console=ttyAMA0";
 	};
 
 	timer {
@@ -22,4 +22,11 @@
 		interrupt-controller;
 		#interrupt-cells = <2>;
 	};
+
+	uart at 20201000 {
+		compatible = "broadcom,bcm2835-pl011", "broadcom,bcm2708-pl011", "arm,pl011", "arm,primecell";
+		reg = <0x20201000 0x1000>;
+		interrupts = <2 25>;
+		clock-frequency = <3000000>;
+	};
 };
-- 
1.7.9.5

[PATCH V3 1/5] ARM: add infra-structure for BCM2708/BCM2835 and Raspberry Pi

[Arnd Bergmann]

On Wednesday 12 September 2012, Stephen Warren wrote:
> From: Simon Arlott <simon@fire.lp0.eu>
> 
> The BCM2708 is an ARM SoC from Broadcom. It is the primary SoC in a
> series which contains the BCM2835 amongst other variants. This patch
> adds very basic support for this series of SoCs, under the BCM2708 name.
> 
> http://www.broadcom.com/products/BCM2835
> http://www.raspberrypi.org/wp-content/uploads/2012/02/BCM2835-ARM-Peripherals.pd
> 
> Note that the documentation in the latter .pdf assumes the MMU setup
> that's used on the "VideoCore" companion processor, and does not document
> physical peripheral addresses. Subtract 0x5e000000 to obtain the physical
> addresses.
> 
> The BCM2835 SoC is used in the Raspberry Pi. This patch also adds a
> minimal device tree for this board; enough to see some very early kernel
> boot messages through earlyprintk. However, this patch does not yet
> provide a useful booting system.
> 
> http://www.raspberrypi.org/.
> 
> This patch was extracted from git://github.com/lp0/linux.git branch
> rpi-split from 3-4 months ago, and significantly stripped down and
> modified since.
> 
> Signed-off-by: Chris Boot <bootc@bootc.net>
> Signed-off-by: Simon Arlott <simon@fire.lp0.eu>
> Signed-off-by: Dom Cobley <popcornmix@gmail.com>
> Signed-off-by: Dom Cobley <dc4@broadcom.com>
> Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>

Acked-by: Arnd Bergmann <arnd@arndb.de>

[PATCH V3 2/5] ARM: bcm2708: add interrupt controller driver

[Arnd Bergmann]

On Wednesday 12 September 2012, Stephen Warren wrote:
> From: Simon Arlott <simon@fire.lp0.eu>
> 
> The BCM2708 contains a custom interrupt controller, which supports 72
> interrupt sources using a 2-level register scheme. The interrupt
> controller, or the HW block containing it, is referred to occasionally
> as "armctrl" in the SoC documentation, hence the symbol naming in the
> code.
> 
> This patch was extracted from git://github.com/lp0/linux.git branch
> rpi-split as of 2012/09/08, and modified as follows:
> 
> * Added devicetree documentation, and hence removed list of IRQs from
>   bcm2835.dtsi.
> * Changed shift in MAKE_HWIRQ() and HWIRQ_BANK() from 8 to 5 to reduce
>   the size of the hwirq space, and pass the total size of the hwirq space
>   to irq_domain_add_linear(), rather than just the number of valid hwirqs;
>   the two are different due to the hwirq space being sparse.

If the IRQ space is very sparse, isn't it better to use a tree domain
rather than a linear one?

> * Added the interrupt controller DT node to the top-level of the DT,
>   rather than nesting it inside a /axi node. Hence, changed the reg value
>   since /axi had a ranges property. This seems simpler to me, but I'm not
>   sure if everyone will like this change or not.

The layout should follow what the hardware looks like. If the interrupt
controller is connected through axi, then I'd suggest describing it there
unless there is a strong reason not to. The interrupt-parent property
of the root node can easily point anywhere.

> TODO: Should of_address_to_resource(), ioremap(), request_mem_region()
> in armctrl_of_init() be collapsed into of_iomap(). This wouldn't request
> the region, but a quick grep implies that's quite common with DT.

Yes, that sounds reasonable.

> diff --git a/Documentation/devicetree/bindings/arm/bcm2708/broadcom,bcm2708-armctrl-ic.txt b/Documentation/devicetree/bindings/arm/bcm2708/broadcom,bcm2708-armctrl-ic.txt
> new file mode 100644
> index 0000000..d7f7887
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/arm/bcm2708/broadcom,bcm2708-armctrl-ic.txt

The bindings are normally grouped by subsystem, not by manufacturer or soc,
because a lot of components end up getting reused by other people. For
some reason, we have put a lot of interrupt controller bindings into the
arm subdirectory, so you can keep doing this, but I would not create a hierarchy
below that.

I think it would be even better if we could put them all into
bindings/interrupt-controller or similar.

> @@ -0,0 +1,110 @@
> +BCM2708 Top-Level ("ARMCTRL") Interrupt Controller
> +
> +The BCM2708 contains a custom top-level interrupt controller, which supports
> +72 interrupt sources using a 2-level register scheme. The interrupt
> +controller, or the HW block containing it, is referred to occasionally
> +as "armctrl" in the SoC documentation, hence naming of this binding.

Do we actually know that BCM2708 has the same one, or could it be present
just on bcm2835? It seem hard to find any information about bcm2708,
so I don't feel too good about using that name in bindings.


> diff --git a/arch/arm/mach-bcm2708/irq.c b/arch/arm/mach-bcm2708/irq.c
> new file mode 100644
> index 0000000..81dba4e
> --- /dev/null
> +++ b/arch/arm/mach-bcm2708/irq.c

We're starting to put interrupt controller drivers into drivers/irqchip
in v3.7, so maybe you can put this one there too. We will get a trivial
merge conflict with the Makefile, but that's ok IMHO.

> +asmlinkage void __exception_irq_entry bcm2708_armctrl_handle_irq(
> +	struct pt_regs *regs)
> +{
> +	u32 stat, irq;
> +
> +	while ((stat = readl_relaxed(intc.pending[0]) & BANK0_VALID_MASK)) {
> +		if (stat & BANK0_HWIRQ_MASK) {
> +			irq = MAKE_HWIRQ(0, ffs(stat & BANK0_HWIRQ_MASK) - 1);
> +			handle_IRQ(irq_linear_revmap(intc.domain, irq), regs);
> +		} else if (stat & SHORTCUT1_MASK) {
> +			armctrl_handle_shortcut(1, regs, stat & SHORTCUT1_MASK);
> +		} else if (stat & SHORTCUT2_MASK) {
> +			armctrl_handle_shortcut(2, regs, stat & SHORTCUT2_MASK);
> +		} else if (stat & BANK1_HWIRQ) {
> +			armctrl_handle_bank(1, regs);
> +		} else if (stat & BANK2_HWIRQ) {
> +			armctrl_handle_bank(2, regs);
> +		} else {
> +			BUG();
> +		}
> +	}
> +}


I'm not sure if readl_relaxed() is appropriate here, or if you need readl().
If you have an MSI type interrupt signaling the completion of a DMA, you
need to ensure ordering between the data transfer and the interrupt
notification.

	Arnd

[PATCH V3 3/5] ARM: bcm2708: add system timer

[Arnd Bergmann]

On Wednesday 12 September 2012, Stephen Warren wrote:
> From: Simon Arlott <simon@fire.lp0.eu>
> 
> The System Timer peripheral provides four 32-bit timer channels and a
> single 64-bit free running counter. Each channel has an output compare
> register, which is compared against the 32 least significant bits of the
> free running counter values, and generates an interrupt.
> 
> Timer 3 is used as the Linux timer.
> 
> The BCM2708 also contains an SP804-based timer module. However, it
> apparently has significant differences from the standard SP804 IP block,
> and Broadcom's documentation recommends using the system timer instead.
> 
> This patch was extracted from git://github.com/lp0/linux.git branch
> rpi-split as of 2012/09/08, and modified as follows:
> 
> * Moved struct sys_timer bcm2708_timer into time.c to encapsulate it more.
> * Added DT binding docs.
> * Moved to drivers/clocksource/. This looks like the desired location for
>   such code now.
> * Simplified bcm2708_time_init() to find one matching node and operate on
>   it, rather than looping over all matching nodes. This seems more
>   consistent with other clocksource code.
> * Renamed struct bcm2708_timer.index to match_mask to better represent its
>   purpose.
> * s/printk(PR_INFO/pr_info(/
> 
> Signed-off-by: Chris Boot <bootc@bootc.net>
> Signed-off-by: Simon Arlott <simon@fire.lp0.eu>
> Signed-off-by: Dom Cobley <popcornmix@gmail.com>
> Signed-off-by: Dom Cobley <dc4@broadcom.com>
> Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>

Acked-by: Arnd Bergmann <arnd@arndb.de>

Looks good to me, but I think the use of of_iomap() would be a good
simplification of the init function.

	Arnd

[PATCH V3 5/5] ARM: bcm2708: instantiate console UART

[Arnd Bergmann]

On Wednesday 12 September 2012, Stephen Warren wrote:
> From: Simon Arlott <simon@fire.lp0.eu>
> 
> This patch was extracted from git://github.com/lp0/linux.git branch
> rpi-split as of 2012/09/08, and modified as follows:
> 
> * Modified UART DT node to use a unit-address to differentiate UART node
>   names, rather than using different base names "uart0" and "uart1".
>   Note that UART 1 (the Broadcom "mini UART") is not yet present, but
>   I'm naming the DT node in anticipation that it will be added.
> 

Shouldn't the selection be done using an alias like this?

	aliases {
		serial0 = &/uart at 20201000;
	};

	Arnd

[PATCH V3 4/5] ARM: bcm2708: add stub clock driver

[Arnd Bergmann]

On Wednesday 12 September 2012, Stephen Warren wrote:
> From: Simon Arlott <simon@fire.lp0.eu>
> 
> This patch adds a minimal stub clock driver for the BCM2708. Its sole
> purpose is to allow the PL011 AMBA clk_get() API calls to provide
> something that looks enough like a clock that the driver probes and
> operates correctly.
> 
> This patch was extracted from git://github.com/lp0/linux.git branch
> rpi-split as of 2012/09/08, and modified as follows:
> 
> * Modified .dev_id for UART clocks to match UART DT node names.
> 
> Signed-off-by: Chris Boot <bootc@bootc.net>
> Signed-off-by: Simon Arlott <simon@fire.lp0.eu>
> Signed-off-by: Dom Cobley <popcornmix@gmail.com>
> Signed-off-by: Dom Cobley <dc4@broadcom.com>
> Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
> --
> v3: New patch.
> ---
>  arch/arm/mach-bcm2708/Makefile  |    1 +
>  arch/arm/mach-bcm2708/bcm2708.c |    3 +++
>  arch/arm/mach-bcm2708/clock.c   |   53 +++++++++++++++++++++++++++++++++++++++
>  arch/arm/mach-bcm2708/clock.h   |   24 ++++++++++++++++++
>  4 files changed, 81 insertions(+)
>  create mode 100644 arch/arm/mach-bcm2708/clock.c
>  create mode 100644 arch/arm/mach-bcm2708/clock.h

I think you should keep Mike on Cc for clock related patches. I also wonder
whether this file should go into drivers/clk right away, since that is where
it would end up when it grows into a full clock driver.

	Arnd

[PATCH V3 2/5] ARM: bcm2708: add interrupt controller driver

[Stephen Warren]

On 09/12/2012 04:37 AM, Arnd Bergmann wrote:
> On Wednesday 12 September 2012, Stephen Warren wrote:
>> From: Simon Arlott <simon@fire.lp0.eu>
>>
>> The BCM2708 contains a custom interrupt controller, which supports 72
>> interrupt sources using a 2-level register scheme. The interrupt
>> controller, or the HW block containing it, is referred to occasionally
>> as "armctrl" in the SoC documentation, hence the symbol naming in the
>> code.
>>
>> This patch was extracted from git://github.com/lp0/linux.git branch
>> rpi-split as of 2012/09/08, and modified as follows:
>>
>> * Added devicetree documentation, and hence removed list of IRQs from
>>   bcm2835.dtsi.
>> * Changed shift in MAKE_HWIRQ() and HWIRQ_BANK() from 8 to 5 to reduce
>>   the size of the hwirq space, and pass the total size of the hwirq space
>>   to irq_domain_add_linear(), rather than just the number of valid hwirqs;
>>   the two are different due to the hwirq space being sparse.
> 
> If the IRQ space is very sparse, isn't it better to use a tree domain
> rather than a linear one?

It's not very sparse. There are 3 banks, each containing up to 32
interrupts. However, the first bank actually only has 8 interrupts plus
2 cascade inputs (which are hidden inside the interrupt controller
driver and so not exposed). So, it's more like there's one gap in the
middle. I don't know much about the tree domain, but I figure it's
probably not worth it.

>> * Added the interrupt controller DT node to the top-level of the DT,
>>   rather than nesting it inside a /axi node. Hence, changed the reg value
>>   since /axi had a ranges property. This seems simpler to me, but I'm not
>>   sure if everyone will like this change or not.
> 
> The layout should follow what the hardware looks like. If the interrupt
> controller is connected through axi, then I'd suggest describing it there
> unless there is a strong reason not to. The interrupt-parent property
> of the root node can easily point anywhere.

The problem is that there's no documentation of the actual bus
structure. Simon's original patch placed all peripherals under a single
top-level /axi bus/node, but the documentation mentions all of AXI, APB,
and AHB in passing, but doesn't explicitly describe which peripherals
are on which bus etc. I think I'd rather not represent the bus structure
in the .dtsi file at all, rather than represent just part of the
structure and hence be misleading.

>> @@ -0,0 +1,110 @@
>> +BCM2708 Top-Level ("ARMCTRL") Interrupt Controller
>> +
>> +The BCM2708 contains a custom top-level interrupt controller, which supports
>> +72 interrupt sources using a 2-level register scheme. The interrupt
>> +controller, or the HW block containing it, is referred to occasionally
>> +as "armctrl" in the SoC documentation, hence naming of this binding.
> 
> Do we actually know that BCM2708 has the same one, or could it be present
> just on bcm2835? It seem hard to find any information about bcm2708,
> so I don't feel too good about using that name in bindings.

I don't know anything at all about the BCM2708 really. Perhaps Dom at
Broadcom can fill in some details?

A similar discussion was apparently held downstream, and IIRC the
reported decision there was that BCM2708 was the "parent" of a family of
SoCs, so they made all the DT stuff compatible with both 2708 and 2835.
Given the lack of documentation, I'd be quite happy to rework all of
this to say just BCM2835 instead, and drop any reference to BCM2708 at
all. Should I just go ahead and do that?

>> +asmlinkage void __exception_irq_entry bcm2708_armctrl_handle_irq(
>> +	struct pt_regs *regs)
>> +{
>> +	u32 stat, irq;
>> +
>> +	while ((stat = readl_relaxed(intc.pending[0]) & BANK0_VALID_MASK)) {
>> +		if (stat & BANK0_HWIRQ_MASK) {
>> +			irq = MAKE_HWIRQ(0, ffs(stat & BANK0_HWIRQ_MASK) - 1);
>> +			handle_IRQ(irq_linear_revmap(intc.domain, irq), regs);
>> +		} else if (stat & SHORTCUT1_MASK) {
>> +			armctrl_handle_shortcut(1, regs, stat & SHORTCUT1_MASK);
>> +		} else if (stat & SHORTCUT2_MASK) {
>> +			armctrl_handle_shortcut(2, regs, stat & SHORTCUT2_MASK);
>> +		} else if (stat & BANK1_HWIRQ) {
>> +			armctrl_handle_bank(1, regs);
>> +		} else if (stat & BANK2_HWIRQ) {
>> +			armctrl_handle_bank(2, regs);
>> +		} else {
>> +			BUG();
>> +		}
>> +	}
>> +}
> 
> I'm not sure if readl_relaxed() is appropriate here, or if you need readl().
> If you have an MSI type interrupt signaling the completion of a DMA, you
> need to ensure ordering between the data transfer and the interrupt
> notification.

I did wonder about this. I suppose it would be safe to globally replace
all readl/writel_relaxed with plain readl/writel, and fix this up later
if we can justify it. Should I go ahead and do that?

[PATCH V3 5/5] ARM: bcm2708: instantiate console UART

[Stephen Warren]

On 09/12/2012 04:45 AM, Arnd Bergmann wrote:
> On Wednesday 12 September 2012, Stephen Warren wrote:
>> From: Simon Arlott <simon@fire.lp0.eu>
>>
>> This patch was extracted from git://github.com/lp0/linux.git branch
>> rpi-split as of 2012/09/08, and modified as follows:
>>
>> * Modified UART DT node to use a unit-address to differentiate UART node
>>   names, rather than using different base names "uart0" and "uart1".
>>   Note that UART 1 (the Broadcom "mini UART") is not yet present, but
>>   I'm naming the DT node in anticipation that it will be added.
>>
> 
> Shouldn't the selection be done using an alias like this?
> 
> 	aliases {
> 		serial0 = &/uart at 20201000;
> 	};

The "differentiate" was more "ensure that node names in DT are unique"
than anything to do with user-visible selection/identification.

I can certainly add the alias if you want, but I don't know what benefit
it will have, since I've never used aliases before.

[PATCH V3 5/5] ARM: bcm2708: instantiate console UART

[Arnd Bergmann]

On Thursday 13 September 2012, Stephen Warren wrote:
> On 09/12/2012 04:45 AM, Arnd Bergmann wrote:
> > On Wednesday 12 September 2012, Stephen Warren wrote:
> >> From: Simon Arlott <simon@fire.lp0.eu>
> >>
> >> This patch was extracted from git://github.com/lp0/linux.git branch
> >> rpi-split as of 2012/09/08, and modified as follows:
> >>
> >> * Modified UART DT node to use a unit-address to differentiate UART node
> >>   names, rather than using different base names "uart0" and "uart1".
> >>   Note that UART 1 (the Broadcom "mini UART") is not yet present, but
> >>   I'm naming the DT node in anticipation that it will be added.
> >>
> > 
> > Shouldn't the selection be done using an alias like this?
> > 
> >       aliases {
> >               serial0 = &/uart at 20201000;
> >       };
> 
> The "differentiate" was more "ensure that node names in DT are unique"
> than anything to do with user-visible selection/identification.
> 
> I can certainly add the alias if you want, but I don't know what benefit
> it will have, since I've never used aliases before.

The idea of the aliases is that you can identify which port to use
if one passes an argument like "console=ttyS0" or opens a specific
/dev/tty* device node. I believe we don't actually use it that way
at the moment though.

	Arnd

[PATCH V3 2/5] ARM: bcm2708: add interrupt controller driver

[Arnd Bergmann]

On Thursday 13 September 2012, Stephen Warren wrote:
> On 09/12/2012 04:37 AM, Arnd Bergmann wrote:
> > If the IRQ space is very sparse, isn't it better to use a tree domain
> > rather than a linear one?
> 
> It's not very sparse. There are 3 banks, each containing up to 32
> interrupts. However, the first bank actually only has 8 interrupts plus
> 2 cascade inputs (which are hidden inside the interrupt controller
> driver and so not exposed). So, it's more like there's one gap in the
> middle. I don't know much about the tree domain, but I figure it's
> probably not worth it.

Ok, makes sense.

> >> * Added the interrupt controller DT node to the top-level of the DT,
> >>   rather than nesting it inside a /axi node. Hence, changed the reg value
> >>   since /axi had a ranges property. This seems simpler to me, but I'm not
> >>   sure if everyone will like this change or not.
> > 
> > The layout should follow what the hardware looks like. If the interrupt
> > controller is connected through axi, then I'd suggest describing it there
> > unless there is a strong reason not to. The interrupt-parent property
> > of the root node can easily point anywhere.
> 
> The problem is that there's no documentation of the actual bus
> structure. Simon's original patch placed all peripherals under a single
> top-level /axi bus/node, but the documentation mentions all of AXI, APB,
> and AHB in passing, but doesn't explicitly describe which peripherals
> are on which bus etc. I think I'd rather not represent the bus structure
> in the .dtsi file at all, rather than represent just part of the
> structure and hence be misleading.

Ok.

> >> @@ -0,0 +1,110 @@
> >> +BCM2708 Top-Level ("ARMCTRL") Interrupt Controller
> >> +
> >> +The BCM2708 contains a custom top-level interrupt controller, which supports
> >> +72 interrupt sources using a 2-level register scheme. The interrupt
> >> +controller, or the HW block containing it, is referred to occasionally
> >> +as "armctrl" in the SoC documentation, hence naming of this binding.
> > 
> > Do we actually know that BCM2708 has the same one, or could it be present
> > just on bcm2835? It seem hard to find any information about bcm2708,
> > so I don't feel too good about using that name in bindings.
> 
> I don't know anything at all about the BCM2708 really. Perhaps Dom at
> Broadcom can fill in some details?
> 
> A similar discussion was apparently held downstream, and IIRC the
> reported decision there was that BCM2708 was the "parent" of a family of
> SoCs, so they made all the DT stuff compatible with both 2708 and 2835.
> Given the lack of documentation, I'd be quite happy to rework all of
> this to say just BCM2835 instead, and drop any reference to BCM2708 at
> all. Should I just go ahead and do that?

That's probably safer, yes.

> >> +asmlinkage void __exception_irq_entry bcm2708_armctrl_handle_irq(
> >> +	struct pt_regs *regs)
> >> +{
> >> +	u32 stat, irq;
> >> +
> >> +	while ((stat = readl_relaxed(intc.pending[0]) & BANK0_VALID_MASK)) {
> >> +		if (stat & BANK0_HWIRQ_MASK) {
> >> +			irq = MAKE_HWIRQ(0, ffs(stat & BANK0_HWIRQ_MASK) - 1);
> >> +			handle_IRQ(irq_linear_revmap(intc.domain, irq), regs);
> >> +		} else if (stat & SHORTCUT1_MASK) {
> >> +			armctrl_handle_shortcut(1, regs, stat & SHORTCUT1_MASK);
> >> +		} else if (stat & SHORTCUT2_MASK) {
> >> +			armctrl_handle_shortcut(2, regs, stat & SHORTCUT2_MASK);
> >> +		} else if (stat & BANK1_HWIRQ) {
> >> +			armctrl_handle_bank(1, regs);
> >> +		} else if (stat & BANK2_HWIRQ) {
> >> +			armctrl_handle_bank(2, regs);
> >> +		} else {
> >> +			BUG();
> >> +		}
> >> +	}
> >> +}
> > 
> > I'm not sure if readl_relaxed() is appropriate here, or if you need readl().
> > If you have an MSI type interrupt signaling the completion of a DMA, you
> > need to ensure ordering between the data transfer and the interrupt
> > notification.
> 
> I did wonder about this. I suppose it would be safe to globally replace
> all readl/writel_relaxed with plain readl/writel, and fix this up later
> if we can justify it. Should I go ahead and do that?

The synchronizations can be a bit expensive, so in the interrupt controller
driver it makes sense to use at least writel_relaxed, which should always
be fine because you don't have to worry about outgoing DMAs.

Even for incoming DMA, I think there is only a need for the non-relaxed
version if we're actually dealing with MSI interrupts, because regular
level and edge triggered interrupts have no form of synchronization between
DMA completion and interrupt delivery anyway.

	Arnd

[PATCH V3 1/5] ARM: add infra-structure for BCM2708/BCM2835 and Raspberry Pi

[Domenico Andreoli]

Hi Stephen,

On Tue, Sep 11, 2012 at 10:18:25PM -0600, Stephen Warren wrote:
> From: Simon Arlott <simon@fire.lp0.eu>
> 
> diff --git a/Documentation/devicetree/bindings/arm/bcm2708.txt b/Documentation/devicetree/bindings/arm/bcm2708.txt
> new file mode 100644
> index 0000000..49eec61
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/arm/bcm2708.txt
> @@ -0,0 +1,15 @@
> +Broadcom BCM2708 device tree bindings
> +-------------------------------------------
> +
> +Boards with the BCM2708 SoC, or another SoC in the BCM2708 family, shall have
> +the following properties:
> +
> +Required root node property:
> +
> +compatible = "broadcom,bcm2708";
> +
> +Boards with BCM2835 SoC shall *additionally* have the following properties:
> +
> +Required root node property:
> +
> +compatible = "broadcom,bcm2835";

Please update also the vendor prefixes index at
Documentation/devicetree/bindings/vendor-prefixes.txt.

BTW is it possible to change it to "bcm"?

Regards,
Domenico 

-----[ Domenico Andreoli, aka cavok
 --[ http://cavokz.wordpress.com/gpgkey/
   ---[ 3A0F 2F80 F79C 678A 8936  4FEE 0677 9033 A20E BC50

[PATCH V3 1/5] ARM: add infra-structure for BCM2708/BCM2835 and Raspberry Pi

[Stephen Warren]

On 09/13/2012 01:51 PM, Domenico Andreoli wrote:
> Hi Stephen,
> 
> On Tue, Sep 11, 2012 at 10:18:25PM -0600, Stephen Warren wrote:
>> From: Simon Arlott <simon@fire.lp0.eu>
>>
>> diff --git a/Documentation/devicetree/bindings/arm/bcm2708.txt b/Documentation/devicetree/bindings/arm/bcm2708.txt
>> new file mode 100644
>> index 0000000..49eec61
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/arm/bcm2708.txt
>> @@ -0,0 +1,15 @@
>> +Broadcom BCM2708 device tree bindings
>> +-------------------------------------------
>> +
>> +Boards with the BCM2708 SoC, or another SoC in the BCM2708 family, shall have
>> +the following properties:
>> +
>> +Required root node property:
>> +
>> +compatible = "broadcom,bcm2708";
>> +
>> +Boards with BCM2835 SoC shall *additionally* have the following properties:
>> +
>> +Required root node property:
>> +
>> +compatible = "broadcom,bcm2835";
> 
> Please update also the vendor prefixes index at
> Documentation/devicetree/bindings/vendor-prefixes.txt.

Oops, yes, I forgot that.

> BTW is it possible to change it to "bcm"?

I believe standard practice is to use the stock ticker symbol if not
using the full company name, so that'd be "brcm". Does anyone have an
objection? I'll assume not and make the change...

[PATCH V3 2/5] ARM: bcm2708: add interrupt controller driver

[Stephen Warren]

On 09/13/2012 04:45 AM, Arnd Bergmann wrote:
> On Thursday 13 September 2012, Stephen Warren wrote:
>> On 09/12/2012 04:37 AM, Arnd Bergmann wrote:

>>>> @@ -0,0 +1,110 @@
>>>> +BCM2708 Top-Level ("ARMCTRL") Interrupt Controller
>>>> +
>>>> +The BCM2708 contains a custom top-level interrupt controller, which supports
>>>> +72 interrupt sources using a 2-level register scheme. The interrupt
>>>> +controller, or the HW block containing it, is referred to occasionally
>>>> +as "armctrl" in the SoC documentation, hence naming of this binding.
>>>
>>> Do we actually know that BCM2708 has the same one, or could it be present
>>> just on bcm2835? It seem hard to find any information about bcm2708,
>>> so I don't feel too good about using that name in bindings.
>>
>> I don't know anything at all about the BCM2708 really. Perhaps Dom at
>> Broadcom can fill in some details?
>>
>> A similar discussion was apparently held downstream, and IIRC the
>> reported decision there was that BCM2708 was the "parent" of a family of
>> SoCs, so they made all the DT stuff compatible with both 2708 and 2835.
>> Given the lack of documentation, I'd be quite happy to rework all of
>> this to say just BCM2835 instead, and drop any reference to BCM2708 at
>> all. Should I just go ahead and do that?
> 
> That's probably safer, yes.

Sounds good. For reference, I found:

https://github.com/raspberrypi/linux/issues/22

... where it sounds like BCM2708 isn't actually a chip at all, but a
family name, so that supports this change.

>>>> +asmlinkage void __exception_irq_entry bcm2708_armctrl_handle_irq(
>>>> +	struct pt_regs *regs)
>>>> +{
>>>> +	u32 stat, irq;
>>>> +
>>>> +	while ((stat = readl_relaxed(intc.pending[0]) & BANK0_VALID_MASK)) {
>>>> +		if (stat & BANK0_HWIRQ_MASK) {
>>>> +			irq = MAKE_HWIRQ(0, ffs(stat & BANK0_HWIRQ_MASK) - 1);
>>>> +			handle_IRQ(irq_linear_revmap(intc.domain, irq), regs);
>>>> +		} else if (stat & SHORTCUT1_MASK) {
>>>> +			armctrl_handle_shortcut(1, regs, stat & SHORTCUT1_MASK);
>>>> +		} else if (stat & SHORTCUT2_MASK) {
>>>> +			armctrl_handle_shortcut(2, regs, stat & SHORTCUT2_MASK);
>>>> +		} else if (stat & BANK1_HWIRQ) {
>>>> +			armctrl_handle_bank(1, regs);
>>>> +		} else if (stat & BANK2_HWIRQ) {
>>>> +			armctrl_handle_bank(2, regs);
>>>> +		} else {
>>>> +			BUG();
>>>> +		}
>>>> +	}
>>>> +}
>>>
>>> I'm not sure if readl_relaxed() is appropriate here, or if you need readl().
>>> If you have an MSI type interrupt signaling the completion of a DMA, you
>>> need to ensure ordering between the data transfer and the interrupt
>>> notification.
>>
>> I did wonder about this. I suppose it would be safe to globally replace
>> all readl/writel_relaxed with plain readl/writel, and fix this up later
>> if we can justify it. Should I go ahead and do that?
> 
> The synchronizations can be a bit expensive, so in the interrupt controller
> driver it makes sense to use at least writel_relaxed, which should always
> be fine because you don't have to worry about outgoing DMAs.

Thinking some more about this - I doubt there are any MSI-style
interrupts; there's certainly no PCI/PCIe on the Raspberry Pi board, and
none documented in the SoC itself (although admittedly only a small
subset of the SoC is publicly documented). I guess it's easiest just to
leave that code as-is, and fix it up if the hardware ever turns out to
be more complex, and actually have MSI.

[PATCH V3 1/5] ARM: add infra-structure for BCM2708/BCM2835 and Raspberry Pi

[Olof Johansson]

On Thu, Sep 13, 2012 at 08:16:34PM -0600, Stephen Warren wrote:
> > BTW is it possible to change it to "bcm"?
> 
> I believe standard practice is to use the stock ticker symbol if not
> using the full company name, so that'd be "brcm". Does anyone have an
> objection? I'll assume not and make the change...

Yeah, "brcm," is the appropriate prefix in this case.


-Olof