From: linux@arm.linux.org.uk (Russell King - ARM Linux)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v3 RESEND 06/17] ARM: LPAE: use signed arithmetic for mask definitions
Date: Mon, 24 Sep 2012 14:54:38 +0100 [thread overview]
Message-ID: <20120924135438.GC26454@n2100.arm.linux.org.uk> (raw)
In-Reply-To: <1348242975-19184-7-git-send-email-cyril@ti.com>
On Fri, Sep 21, 2012 at 11:56:04AM -0400, Cyril Chemparathy wrote:
> This patch applies to PAGE_MASK, PMD_MASK, and PGDIR_MASK, where forcing
> unsigned long math truncates the mask at the 32-bits. This clearly does bad
> things on PAE systems.
>
> This patch fixes this problem by defining these masks as signed quantities.
> We then rely on sign extension to do the right thing.
>
> Signed-off-by: Cyril Chemparathy <cyril@ti.com>
> Signed-off-by: Vitaly Andrianov <vitalya@ti.com>
> Reviewed-by: Nicolas Pitre <nico@linaro.org>
> ---
> arch/arm/include/asm/page.h | 2 +-
> arch/arm/include/asm/pgtable-3level.h | 6 +++---
> 2 files changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/arch/arm/include/asm/page.h b/arch/arm/include/asm/page.h
> index ecf9019..1e0fe08 100644
> --- a/arch/arm/include/asm/page.h
> +++ b/arch/arm/include/asm/page.h
> @@ -13,7 +13,7 @@
> /* PAGE_SHIFT determines the page size */
> #define PAGE_SHIFT 12
> #define PAGE_SIZE (_AC(1,UL) << PAGE_SHIFT)
> -#define PAGE_MASK (~(PAGE_SIZE-1))
> +#define PAGE_MASK (~((1 << PAGE_SHIFT) - 1))
It's strange. Every other platform in the kernel, including those with
PAE, manage to get away with defining PAGE_MASK as the original above
(see asm-generic/pgtable.h) Why is ARM any different?
Note that PAGE_MASK gets used@the moment on ARM for both virtual and
physical addresses. x86 has PHYSICAL_PAGE_MASK for masking physical
addresses. Maybe we should adopt the same approach?
Whatever, I feel that we should not deviate from the established
definitions across every other architecture.
>
> #ifndef __ASSEMBLY__
>
> diff --git a/arch/arm/include/asm/pgtable-3level.h b/arch/arm/include/asm/pgtable-3level.h
> index b249035..ae39d11 100644
> --- a/arch/arm/include/asm/pgtable-3level.h
> +++ b/arch/arm/include/asm/pgtable-3level.h
> @@ -48,16 +48,16 @@
> #define PMD_SHIFT 21
>
> #define PMD_SIZE (1UL << PMD_SHIFT)
> -#define PMD_MASK (~(PMD_SIZE-1))
> +#define PMD_MASK (~((1 << PMD_SHIFT) - 1))
> #define PGDIR_SIZE (1UL << PGDIR_SHIFT)
> -#define PGDIR_MASK (~(PGDIR_SIZE-1))
> +#define PGDIR_MASK (~((1 << PGDIR_SHIFT) - 1))
>
> /*
> * section address mask and size definitions.
> */
> #define SECTION_SHIFT 21
> #define SECTION_SIZE (1UL << SECTION_SHIFT)
> -#define SECTION_MASK (~(SECTION_SIZE-1))
> +#define SECTION_MASK (~((1 << SECTION_SHIFT) - 1))
These masks are applied to a _virtual_ kernel address, not the physical
addresses, Even with LPAE, the virtual address space is still 32-bit.
So this is definitely wrong.
next prev parent reply other threads:[~2012-09-24 13:54 UTC|newest]
Thread overview: 69+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-09-21 15:55 [PATCH v3 RESEND 00/17] LPAE fixes and extensions for Keystone Cyril Chemparathy
2012-09-21 15:55 ` [PATCH v3 RESEND 01/17] ARM: add mechanism for late code patching Cyril Chemparathy
2012-09-22 15:10 ` Nicolas Pitre
2012-09-22 21:41 ` Cyril Chemparathy
2012-09-24 12:06 ` Dave Martin
2012-09-24 14:49 ` Cyril Chemparathy
2012-09-24 15:54 ` Dave Martin
2012-09-21 15:56 ` [PATCH v3 RESEND 02/17] ARM: add self test for runtime patch mechanism Cyril Chemparathy
2012-09-21 15:56 ` [PATCH v3 RESEND 03/17] ARM: use late patch framework for phys-virt patching Cyril Chemparathy
2012-09-21 15:56 ` [PATCH v3 RESEND 04/17] ARM: LPAE: use phys_addr_t on virt <--> phys conversion Cyril Chemparathy
2012-09-24 13:09 ` Catalin Marinas
2012-09-24 13:57 ` Cyril Chemparathy
2012-09-21 15:56 ` [PATCH v3 RESEND 05/17] ARM: LPAE: support 64-bit virt_to_phys patching Cyril Chemparathy
2012-09-22 15:24 ` Nicolas Pitre
2012-09-24 15:13 ` Catalin Marinas
2012-09-24 15:56 ` Nicolas Pitre
2012-09-24 20:59 ` Cyril Chemparathy
2012-09-24 21:20 ` Nicolas Pitre
2012-09-24 21:52 ` Catalin Marinas
2012-09-24 22:32 ` Nicolas Pitre
2012-09-24 22:40 ` Russell King - ARM Linux
2012-09-24 22:53 ` Cyril Chemparathy
2012-09-24 23:03 ` Nicolas Pitre
2012-09-24 23:08 ` Russell King - ARM Linux
2012-09-24 22:55 ` Nicolas Pitre
2012-09-25 12:55 ` Dave Martin
2012-09-25 13:53 ` Catalin Marinas
2012-09-24 21:53 ` Cyril Chemparathy
2012-09-24 22:06 ` Russell King - ARM Linux
2012-09-24 16:31 ` Dave Martin
2012-09-24 16:51 ` Nicolas Pitre
2012-09-21 15:56 ` [PATCH v3 RESEND 06/17] ARM: LPAE: use signed arithmetic for mask definitions Cyril Chemparathy
2012-09-24 13:09 ` Catalin Marinas
2012-09-24 13:54 ` Russell King - ARM Linux [this message]
2012-09-21 15:56 ` [PATCH v3 RESEND 07/17] ARM: LPAE: use phys_addr_t in alloc_init_pud() Cyril Chemparathy
2012-09-24 13:10 ` Catalin Marinas
2012-09-21 15:56 ` [PATCH v3 RESEND 08/17] ARM: LPAE: use phys_addr_t in free_memmap() Cyril Chemparathy
2012-09-24 13:29 ` Catalin Marinas
2012-09-24 13:41 ` Russell King - ARM Linux
2012-09-24 15:09 ` Cyril Chemparathy
2012-09-24 15:22 ` Russell King - ARM Linux
2012-09-24 16:41 ` Cyril Chemparathy
2012-09-24 16:51 ` Catalin Marinas
2012-09-24 17:06 ` Cyril Chemparathy
2012-09-24 17:14 ` Russell King - ARM Linux
2012-09-25 13:08 ` Catalin Marinas
2012-09-25 13:30 ` Russell King - ARM Linux
2012-09-24 16:55 ` Russell King - ARM Linux
2012-09-24 17:03 ` Catalin Marinas
2012-09-21 15:56 ` [PATCH v3 RESEND 09/17] ARM: LPAE: use phys_addr_t for initrd location and size Cyril Chemparathy
2012-09-24 13:30 ` Catalin Marinas
2012-09-24 13:38 ` Russell King - ARM Linux
2012-09-24 14:00 ` Cyril Chemparathy
2012-09-21 15:56 ` [PATCH v3 RESEND 10/17] ARM: LPAE: use phys_addr_t in switch_mm() Cyril Chemparathy
2012-09-24 14:05 ` Catalin Marinas
2012-09-24 14:32 ` Cyril Chemparathy
2012-09-21 15:56 ` [PATCH v3 RESEND 11/17] ARM: LPAE: use 64-bit accessors for TTBR registers Cyril Chemparathy
2012-09-24 14:10 ` Catalin Marinas
2012-09-21 15:56 ` [PATCH v3 RESEND 12/17] ARM: LPAE: define ARCH_LOW_ADDRESS_LIMIT for bootmem Cyril Chemparathy
2012-09-24 14:16 ` Catalin Marinas
2012-09-21 15:56 ` [PATCH v3 RESEND 13/17] ARM: LPAE: factor out T1SZ and TTBR1 computations Cyril Chemparathy
2012-09-24 14:45 ` Catalin Marinas
2012-09-24 14:58 ` Cyril Chemparathy
2012-09-21 15:56 ` [PATCH v3 RESEND 14/17] ARM: LPAE: accomodate >32-bit addresses for page table base Cyril Chemparathy
2012-09-24 15:17 ` Catalin Marinas
2012-09-21 15:56 ` [PATCH v3 RESEND 15/17] ARM: mm: use physical addresses in highmem sanity checks Cyril Chemparathy
2012-09-24 15:18 ` Catalin Marinas
2012-09-21 15:56 ` [PATCH v3 RESEND 16/17] ARM: mm: cleanup checks for membank overlap with vmalloc area Cyril Chemparathy
2012-09-21 15:56 ` [PATCH v3 RESEND 17/17] ARM: mm: clean up membank size limit checks Cyril Chemparathy
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