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From: shawn.guo@linaro.org (Shawn Guo)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH] ARM: dts: imx6q-arm2: move NANDF_CS pins out of 'hog'
Date: Mon, 15 Oct 2012 21:35:20 +0800	[thread overview]
Message-ID: <20121015133516.GC24393@S2101-09.ap.freescale.net> (raw)
In-Reply-To: <CAMiH66EdFW7JrCD+NVtJnn-dYan0U_QyhOoRKvsQHV5g0u7pqQ@mail.gmail.com>

On Mon, Oct 15, 2012 at 08:45:48AM -0400, Huang Shijie wrote:
> On Mon, Oct 15, 2012 at 4:48 AM, Shawn Guo <shawn.guo@linaro.org> wrote:
> > Commit 9e3c0066 (ARM: dts: imx6q-arm2: add pinctrl for uart and enet)
> > defines NANDF_CS pins as gpio in 'hog', assuming these two pins are
> > always used by usdhc3 in gpio mode as card-detection and
> > write-protection on ARM2 board.  But it's not true.  These pins are
> > shared by usdhc3 and gpmi-nand.  We should have the pins functional
> > for gpmi-nand when usdhc3 is disabled.
> >
> > Move the pins out of 'hog', so that pins only work in gpio mode as CD
> > and WP when usdhc3 is enabled, and otherwise they are available for
> > gpmi-nand.
> >
> > Reported-by: Huang Shijie <b32955@freescale.com>
> > Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
> > ---
> > Huang,
> >
> > Please help test the patch to see if it fixes your problem, thanks.
> 
> yes, this patch fixes the problem.
> thanks a lot.
> 
> Tested-by: Huang Shijie <shijie8@gmail.com>
> 
Arnd, Olof,

Can you please send it for later -rc, since it fixes a regression
in -rc1?

Shawn

  reply	other threads:[~2012-10-15 13:35 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2012-10-15  8:48 [PATCH] ARM: dts: imx6q-arm2: move NANDF_CS pins out of 'hog' Shawn Guo
2012-10-15 12:45 ` Huang Shijie
2012-10-15 13:35   ` Shawn Guo [this message]
2012-10-16 17:07     ` Olof Johansson

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