* [PATCH v6 1/5] usb: phy: samsung: Introducing usb phy driver for hsotg
2012-09-17 12:54 [PATCH v6 0/5] usb: phy: samsung: Introducing usb phy driver for samsung SoCs Praveen Paneri
@ 2012-09-17 12:54 ` Praveen Paneri
2012-09-24 9:38 ` Praveen Paneri
` (2 more replies)
2012-09-17 12:54 ` [PATCH v6 2/5] usb: s3c-hsotg: Adding phy driver support Praveen Paneri
` (3 subsequent siblings)
4 siblings, 3 replies; 27+ messages in thread
From: Praveen Paneri @ 2012-09-17 12:54 UTC (permalink / raw)
To: linux-arm-kernel
This driver uses usb_phy interface to interact with s3c-hsotg. Supports
phy_init and phy_shutdown functions to enable/disable phy. Tested with
smdk6410 and smdkv310. More SoCs can be brought under later.
Signed-off-by: Praveen Paneri <p.paneri@samsung.com>
Acked-by: Heiko Stuebner <heiko@sntech.de>
---
.../devicetree/bindings/usb/samsung-usbphy.txt | 9 +
drivers/usb/phy/Kconfig | 8 +
drivers/usb/phy/Makefile | 1 +
drivers/usb/phy/samsung-usbphy.c | 360 ++++++++++++++++++++
include/linux/platform_data/samsung-usbphy.h | 27 ++
5 files changed, 405 insertions(+), 0 deletions(-)
create mode 100644 Documentation/devicetree/bindings/usb/samsung-usbphy.txt
create mode 100644 drivers/usb/phy/samsung-usbphy.c
create mode 100644 include/linux/platform_data/samsung-usbphy.h
diff --git a/Documentation/devicetree/bindings/usb/samsung-usbphy.txt b/Documentation/devicetree/bindings/usb/samsung-usbphy.txt
new file mode 100644
index 0000000..fefd9c8
--- /dev/null
+++ b/Documentation/devicetree/bindings/usb/samsung-usbphy.txt
@@ -0,0 +1,9 @@
+* Samsung's usb phy transceiver
+
+The Samsung's phy transceiver is used for controlling usb otg phy for
+s3c-hsotg usb device controller.
+
+Required properties:
+- compatible : should be "samsung,exynos4210-usbphy"
+- reg : base physical address of the phy registers and length of memory mapped
+ region.
diff --git a/drivers/usb/phy/Kconfig b/drivers/usb/phy/Kconfig
index 63c339b..313685f 100644
--- a/drivers/usb/phy/Kconfig
+++ b/drivers/usb/phy/Kconfig
@@ -32,3 +32,11 @@ config MV_U3D_PHY
help
Enable this to support Marvell USB 3.0 phy controller for Marvell
SoC.
+
+config SAMSUNG_USBPHY
+ bool "Samsung USB PHY controller Driver"
+ depends on USB_S3C_HSOTG
+ select USB_OTG_UTILS
+ help
+ Enable this to support Samsung USB phy controller for samsung
+ SoCs.
diff --git a/drivers/usb/phy/Makefile b/drivers/usb/phy/Makefile
index b069f29..55dcfc1 100644
--- a/drivers/usb/phy/Makefile
+++ b/drivers/usb/phy/Makefile
@@ -8,3 +8,4 @@ obj-$(CONFIG_OMAP_USB2) += omap-usb2.o
obj-$(CONFIG_USB_ISP1301) += isp1301.o
obj-$(CONFIG_MV_U3D_PHY) += mv_u3d_phy.o
obj-$(CONFIG_USB_EHCI_TEGRA) += tegra_usb_phy.o
+obj-$(CONFIG_SAMSUNG_USBPHY) += samsung-usbphy.o
diff --git a/drivers/usb/phy/samsung-usbphy.c b/drivers/usb/phy/samsung-usbphy.c
new file mode 100644
index 0000000..95ec4d0
--- /dev/null
+++ b/drivers/usb/phy/samsung-usbphy.c
@@ -0,0 +1,360 @@
+/* linux/drivers/usb/phy/samsung-usbphy.c
+ *
+ * Copyright (c) 2012 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
+ *
+ * Author: Praveen Paneri <p.paneri@samsung.com>
+ *
+ * Samsung USB2.0 High-speed OTG transceiver, talks to S3C HS OTG controller
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/module.h>
+#include <linux/platform_device.h>
+#include <linux/clk.h>
+#include <linux/delay.h>
+#include <linux/err.h>
+#include <linux/io.h>
+#include <linux/of.h>
+#include <linux/usb/otg.h>
+#include <linux/platform_data/samsung-usbphy.h>
+
+/* Register definitions */
+
+#define S3C_PHYPWR (0x00)
+
+#define S3C_PHYPWR_NORMAL_MASK (0x19 << 0)
+#define S3C_PHYPWR_OTG_DISABLE (1 << 4)
+#define S3C_PHYPWR_ANALOG_POWERDOWN (1 << 3)
+#define S3C_PHYPWR_FORCE_SUSPEND (1 << 1)
+/* For Exynos4 */
+#define EXYNOS4_PHYPWR_NORMAL_MASK (0x39 << 0)
+#define EXYNOS4_PHYPWR_SLEEP (1 << 5)
+
+#define S3C_PHYCLK (0x04)
+
+#define S3C_PHYCLK_MODE_SERIAL (1 << 6)
+#define S3C_PHYCLK_EXT_OSC (1 << 5)
+#define S3C_PHYCLK_COMMON_ON_N (1 << 4)
+#define S3C_PHYCLK_ID_PULL (1 << 2)
+#define S3C_PHYCLK_CLKSEL_MASK (0x3 << 0)
+#define S3C_PHYCLK_CLKSEL_SHIFT (0)
+#define S3C_PHYCLK_CLKSEL_48M (0x0 << 0)
+#define S3C_PHYCLK_CLKSEL_12M (0x2 << 0)
+#define S3C_PHYCLK_CLKSEL_24M (0x3 << 0)
+
+#define S3C_RSTCON (0x08)
+
+#define S3C_RSTCON_PHYCLK (1 << 2)
+#define S3C_RSTCON_HCLK (1 << 1)
+#define S3C_RSTCON_PHY (1 << 0)
+
+#ifndef MHZ
+#define MHZ (1000*1000)
+#endif
+
+enum samsung_cpu_type {
+ TYPE_S3C64XX,
+ TYPE_EXYNOS4210,
+};
+
+/*
+ * struct samsung_usbphy - transceiver driver state
+ * @phy: transceiver structure
+ * @plat: platform data
+ * @dev: The parent device supplied to the probe function
+ * @clk: usb phy clock
+ * @regs: usb phy register memory base
+ * @ref_clk_freq: reference clock frequency selection
+ * @cpu_type: machine identifier
+ */
+struct samsung_usbphy {
+ struct usb_phy phy;
+ struct samsung_usbphy_data *plat;
+ struct device *dev;
+ struct clk *clk;
+ void __iomem *regs;
+ int ref_clk_freq;
+ int cpu_type;
+};
+
+#define phy_to_sphy(x) container_of((x), struct samsung_usbphy, phy)
+
+/*
+ * Returns reference clock frequency selection value
+ */
+static int samsung_usbphy_get_refclk_freq(struct samsung_usbphy *sphy)
+{
+ struct clk *ref_clk;
+ int refclk_freq = 0;
+
+ ref_clk = clk_get(sphy->dev, "xusbxti");
+ if (IS_ERR(ref_clk)) {
+ dev_err(sphy->dev, "Failed to get reference clock\n");
+ return PTR_ERR(ref_clk);
+ }
+
+ switch (clk_get_rate(ref_clk)) {
+ case 12 * MHZ:
+ refclk_freq |= S3C_PHYCLK_CLKSEL_12M;
+ break;
+ case 24 * MHZ:
+ refclk_freq |= S3C_PHYCLK_CLKSEL_24M;
+ break;
+ default:
+ case 48 * MHZ:
+ /* default reference clock */
+ refclk_freq |= S3C_PHYCLK_CLKSEL_48M;
+ break;
+ }
+ clk_put(ref_clk);
+
+ return refclk_freq;
+}
+
+static void samsung_usbphy_enable(struct samsung_usbphy *sphy)
+{
+ void __iomem *regs = sphy->regs;
+ u32 phypwr;
+ u32 phyclk;
+ u32 rstcon;
+
+ /* set clock frequency for PLL */
+ phyclk = sphy->ref_clk_freq;
+ phypwr = readl(regs + S3C_PHYPWR);
+ rstcon = readl(regs + S3C_RSTCON);
+
+ switch (sphy->cpu_type) {
+ case TYPE_S3C64XX:
+ phyclk &= ~(S3C_PHYCLK_COMMON_ON_N);
+ phypwr &= ~S3C_PHYPWR_NORMAL_MASK;
+ rstcon |= S3C_RSTCON_PHY;
+ break;
+ case TYPE_EXYNOS4210:
+ phypwr &= ~EXYNOS4_PHYPWR_NORMAL_MASK;
+ rstcon |= S3C_RSTCON_PHY;
+ default:
+ break;
+ }
+
+ writel(phyclk, regs + S3C_PHYCLK);
+ /* set to normal of PHY0 */
+ writel(phypwr, regs + S3C_PHYPWR);
+ /* reset all ports of PHY and Link */
+ writel(rstcon, regs + S3C_RSTCON);
+ udelay(10);
+ rstcon &= ~S3C_RSTCON_PHY;
+ writel(rstcon, regs + S3C_RSTCON);
+}
+
+static void samsung_usbphy_disable(struct samsung_usbphy *sphy)
+{
+ void __iomem *regs = sphy->regs;
+ u32 phypwr;
+
+ phypwr = readl(regs + S3C_PHYPWR);
+
+ switch (sphy->cpu_type) {
+ case TYPE_S3C64XX:
+ phypwr |= S3C_PHYPWR_NORMAL_MASK;
+ break;
+ case TYPE_EXYNOS4210:
+ phypwr |= EXYNOS4_PHYPWR_NORMAL_MASK;
+ default:
+ break;
+ }
+
+ /* unset to normal of PHY0 */
+ writel(phypwr, regs + S3C_PHYPWR);
+}
+
+/*
+ * The function passed to the usb driver for phy initialization
+ */
+static int samsung_usbphy_init(struct usb_phy *phy)
+{
+ struct samsung_usbphy *sphy;
+ int ret = 0;
+
+ sphy = phy_to_sphy(phy);
+
+ /* Enable the phy clock */
+ ret = clk_prepare_enable(sphy->clk);
+ if (ret) {
+ dev_err(sphy->dev, "%s: clk_prepare_enable failed\n", __func__);
+ return ret;
+ }
+
+ /* Disable phy isolation */
+ if (sphy->plat && sphy->plat->pmu_isolation)
+ sphy->plat->pmu_isolation(false);
+
+ /* Initialize usb phy registers */
+ samsung_usbphy_enable(sphy);
+
+ /* Disable the phy clock */
+ clk_disable_unprepare(sphy->clk);
+ return ret;
+}
+
+/*
+ * The function passed to the usb driver for phy shutdown
+ */
+static void samsung_usbphy_shutdown(struct usb_phy *phy)
+{
+ struct samsung_usbphy *sphy;
+
+ sphy = phy_to_sphy(phy);
+
+ if (clk_prepare_enable(sphy->clk)) {
+ dev_err(sphy->dev, "%s: clk_prepare_enable failed\n", __func__);
+ return;
+ }
+
+ /* De-initialize usb phy registers */
+ samsung_usbphy_disable(sphy);
+
+ /* Enable phy isolation */
+ if (sphy->plat && sphy->plat->pmu_isolation)
+ sphy->plat->pmu_isolation(true);
+
+ clk_disable_unprepare(sphy->clk);
+}
+
+static const struct of_device_id samsung_usbphy_dt_match[];
+
+static inline int samsung_usbphy_get_driver_data(struct platform_device *pdev)
+{
+ if (IS_ENABLED(CONFIG_OF) && pdev->dev.of_node) {
+ int data;
+ const struct of_device_id *match;
+ match = of_match_node(samsung_usbphy_dt_match,
+ pdev->dev.of_node);
+ data = (int) match->data;
+ return data;
+ }
+
+ return platform_get_device_id(pdev)->driver_data;
+}
+
+static int __devinit samsung_usbphy_probe(struct platform_device *pdev)
+{
+ struct samsung_usbphy *sphy;
+ struct samsung_usbphy_data *pdata;
+ struct device *dev = &pdev->dev;
+ struct resource *phy_mem;
+ void __iomem *phy_base;
+ struct clk *clk;
+ int ret;
+
+ pdata = pdev->dev.platform_data;
+ if (!pdata) {
+ dev_err(&pdev->dev, "%s: no platform data defined\n", __func__);
+ return -EINVAL;
+ }
+
+ phy_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ if (!phy_mem) {
+ dev_err(dev, "%s: missing mem resource\n", __func__);
+ return -ENODEV;
+ }
+
+ phy_base = devm_request_and_ioremap(dev, phy_mem);
+ if (!phy_base) {
+ dev_err(dev, "%s: register mapping failed\n", __func__);
+ return -ENXIO;
+ }
+
+ sphy = devm_kzalloc(dev, sizeof(*sphy), GFP_KERNEL);
+ if (!sphy)
+ return -ENOMEM;
+
+ clk = devm_clk_get(dev, "otg");
+ if (IS_ERR(clk)) {
+ dev_err(dev, "Failed to get otg clock\n");
+ return PTR_ERR(clk);
+ }
+
+ sphy->dev = &pdev->dev;
+ sphy->plat = pdata;
+ sphy->regs = phy_base;
+ sphy->clk = clk;
+ sphy->phy.dev = sphy->dev;
+ sphy->phy.label = "samsung-usbphy";
+ sphy->phy.init = samsung_usbphy_init;
+ sphy->phy.shutdown = samsung_usbphy_shutdown;
+ sphy->cpu_type = samsung_usbphy_get_driver_data(pdev);
+ sphy->ref_clk_freq = samsung_usbphy_get_refclk_freq(sphy);
+
+ ret = usb_add_phy(&sphy->phy, USB_PHY_TYPE_USB2);
+ if (ret)
+ goto err;
+
+ platform_set_drvdata(pdev, sphy);
+err:
+ return ret;
+}
+
+static int __exit samsung_usbphy_remove(struct platform_device *pdev)
+{
+ struct samsung_usbphy *sphy = platform_get_drvdata(pdev);
+
+ usb_remove_phy(&sphy->phy);
+
+ return 0;
+}
+
+#ifdef CONFIG_OF
+static const struct of_device_id samsung_usbphy_dt_match[] = {
+ {
+ .compatible = "samsung,s3c64xx-usbphy",
+ .data = (void *)TYPE_S3C64XX,
+ }, {
+ .compatible = "samsung,exynos4210-usbphy",
+ .data = (void *)TYPE_EXYNOS4210,
+ },
+ {},
+};
+MODULE_DEVICE_TABLE(of, samsung_usbphy_dt_match);
+#else
+#define samsung_usbphy_dt_match NULL
+#endif
+
+static struct platform_device_id samsung_usbphy_driver_ids[] = {
+ {
+ .name = "s3c64xx-usbphy",
+ .driver_data = TYPE_S3C64XX,
+ }, {
+ .name = "exynos4210-usbphy",
+ .driver_data = TYPE_EXYNOS4210,
+ },
+ {},
+};
+
+MODULE_DEVICE_TABLE(platform, samsung_usbphy_driver_ids);
+
+static struct platform_driver samsung_usbphy_driver = {
+ .probe = samsung_usbphy_probe,
+ .remove = __devexit_p(samsung_usbphy_remove),
+ .id_table = samsung_usbphy_driver_ids,
+ .driver = {
+ .name = "samsung-usbphy",
+ .owner = THIS_MODULE,
+ .of_match_table = samsung_usbphy_dt_match,
+ },
+};
+
+module_platform_driver(samsung_usbphy_driver);
+
+MODULE_DESCRIPTION("Samsung USB phy controller");
+MODULE_AUTHOR("Praveen Paneri <p.paneri@samsung.com>");
+MODULE_LICENSE("GPL");
+MODULE_ALIAS("platform:samsung-usbphy");
diff --git a/include/linux/platform_data/samsung-usbphy.h b/include/linux/platform_data/samsung-usbphy.h
new file mode 100644
index 0000000..1bd24cb
--- /dev/null
+++ b/include/linux/platform_data/samsung-usbphy.h
@@ -0,0 +1,27 @@
+/*
+ * Copyright (C) 2012 Samsung Electronics Co.Ltd
+ * http://www.samsung.com/
+ * Author: Praveen Paneri <p.paneri@samsung.com>
+ *
+ * Defines platform data for samsung usb phy driver.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+
+#ifndef __SAMSUNG_USBPHY_PLATFORM_H
+#define __SAMSUNG_USBPHY_PLATFORM_H
+
+/**
+ * samsung_usbphy_data - Platform data for USB PHY driver.
+ * @pmu_isolation: Function to control usb phy isolation in PMU.
+ */
+struct samsung_usbphy_data {
+ void (*pmu_isolation)(int on);
+};
+
+extern void samsung_usbphy_set_pdata(struct samsung_usbphy_data *pd);
+
+#endif /* __SAMSUNG_USBPHY_PLATFORM_H */
--
1.7.1
^ permalink raw reply related [flat|nested] 27+ messages in thread* [PATCH v6 1/5] usb: phy: samsung: Introducing usb phy driver for hsotg
2012-09-17 12:54 ` [PATCH v6 1/5] usb: phy: samsung: Introducing usb phy driver for hsotg Praveen Paneri
@ 2012-09-24 9:38 ` Praveen Paneri
2012-09-24 10:39 ` ABRAHAM, KISHON VIJAY
2012-09-25 11:29 ` Marc Kleine-Budde
2012-09-24 10:41 ` [PATCH v6 1/5] " Kyungmin Park
2012-09-24 13:04 ` Rob Herring
2 siblings, 2 replies; 27+ messages in thread
From: Praveen Paneri @ 2012-09-24 9:38 UTC (permalink / raw)
To: linux-arm-kernel
Hi Kishon, Felipe,
Any further comments on these patches? Can they be merged now?
Thanks,
Praveen
On Mon, Sep 17, 2012 at 6:24 PM, Praveen Paneri <p.paneri@samsung.com> wrote:
> This driver uses usb_phy interface to interact with s3c-hsotg. Supports
> phy_init and phy_shutdown functions to enable/disable phy. Tested with
> smdk6410 and smdkv310. More SoCs can be brought under later.
>
> Signed-off-by: Praveen Paneri <p.paneri@samsung.com>
> Acked-by: Heiko Stuebner <heiko@sntech.de>
> ---
> .../devicetree/bindings/usb/samsung-usbphy.txt | 9 +
> drivers/usb/phy/Kconfig | 8 +
> drivers/usb/phy/Makefile | 1 +
> drivers/usb/phy/samsung-usbphy.c | 360 ++++++++++++++++++++
> include/linux/platform_data/samsung-usbphy.h | 27 ++
> 5 files changed, 405 insertions(+), 0 deletions(-)
> create mode 100644 Documentation/devicetree/bindings/usb/samsung-usbphy.txt
> create mode 100644 drivers/usb/phy/samsung-usbphy.c
> create mode 100644 include/linux/platform_data/samsung-usbphy.h
>
> diff --git a/Documentation/devicetree/bindings/usb/samsung-usbphy.txt b/Documentation/devicetree/bindings/usb/samsung-usbphy.txt
> new file mode 100644
> index 0000000..fefd9c8
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/usb/samsung-usbphy.txt
> @@ -0,0 +1,9 @@
> +* Samsung's usb phy transceiver
> +
> +The Samsung's phy transceiver is used for controlling usb otg phy for
> +s3c-hsotg usb device controller.
> +
> +Required properties:
> +- compatible : should be "samsung,exynos4210-usbphy"
> +- reg : base physical address of the phy registers and length of memory mapped
> + region.
> diff --git a/drivers/usb/phy/Kconfig b/drivers/usb/phy/Kconfig
> index 63c339b..313685f 100644
> --- a/drivers/usb/phy/Kconfig
> +++ b/drivers/usb/phy/Kconfig
> @@ -32,3 +32,11 @@ config MV_U3D_PHY
> help
> Enable this to support Marvell USB 3.0 phy controller for Marvell
> SoC.
> +
> +config SAMSUNG_USBPHY
> + bool "Samsung USB PHY controller Driver"
> + depends on USB_S3C_HSOTG
> + select USB_OTG_UTILS
> + help
> + Enable this to support Samsung USB phy controller for samsung
> + SoCs.
> diff --git a/drivers/usb/phy/Makefile b/drivers/usb/phy/Makefile
> index b069f29..55dcfc1 100644
> --- a/drivers/usb/phy/Makefile
> +++ b/drivers/usb/phy/Makefile
> @@ -8,3 +8,4 @@ obj-$(CONFIG_OMAP_USB2) += omap-usb2.o
> obj-$(CONFIG_USB_ISP1301) += isp1301.o
> obj-$(CONFIG_MV_U3D_PHY) += mv_u3d_phy.o
> obj-$(CONFIG_USB_EHCI_TEGRA) += tegra_usb_phy.o
> +obj-$(CONFIG_SAMSUNG_USBPHY) += samsung-usbphy.o
> diff --git a/drivers/usb/phy/samsung-usbphy.c b/drivers/usb/phy/samsung-usbphy.c
> new file mode 100644
> index 0000000..95ec4d0
> --- /dev/null
> +++ b/drivers/usb/phy/samsung-usbphy.c
> @@ -0,0 +1,360 @@
> +/* linux/drivers/usb/phy/samsung-usbphy.c
> + *
> + * Copyright (c) 2012 Samsung Electronics Co., Ltd.
> + * http://www.samsung.com
> + *
> + * Author: Praveen Paneri <p.paneri@samsung.com>
> + *
> + * Samsung USB2.0 High-speed OTG transceiver, talks to S3C HS OTG controller
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + */
> +
> +#include <linux/module.h>
> +#include <linux/platform_device.h>
> +#include <linux/clk.h>
> +#include <linux/delay.h>
> +#include <linux/err.h>
> +#include <linux/io.h>
> +#include <linux/of.h>
> +#include <linux/usb/otg.h>
> +#include <linux/platform_data/samsung-usbphy.h>
> +
> +/* Register definitions */
> +
> +#define S3C_PHYPWR (0x00)
> +
> +#define S3C_PHYPWR_NORMAL_MASK (0x19 << 0)
> +#define S3C_PHYPWR_OTG_DISABLE (1 << 4)
> +#define S3C_PHYPWR_ANALOG_POWERDOWN (1 << 3)
> +#define S3C_PHYPWR_FORCE_SUSPEND (1 << 1)
> +/* For Exynos4 */
> +#define EXYNOS4_PHYPWR_NORMAL_MASK (0x39 << 0)
> +#define EXYNOS4_PHYPWR_SLEEP (1 << 5)
> +
> +#define S3C_PHYCLK (0x04)
> +
> +#define S3C_PHYCLK_MODE_SERIAL (1 << 6)
> +#define S3C_PHYCLK_EXT_OSC (1 << 5)
> +#define S3C_PHYCLK_COMMON_ON_N (1 << 4)
> +#define S3C_PHYCLK_ID_PULL (1 << 2)
> +#define S3C_PHYCLK_CLKSEL_MASK (0x3 << 0)
> +#define S3C_PHYCLK_CLKSEL_SHIFT (0)
> +#define S3C_PHYCLK_CLKSEL_48M (0x0 << 0)
> +#define S3C_PHYCLK_CLKSEL_12M (0x2 << 0)
> +#define S3C_PHYCLK_CLKSEL_24M (0x3 << 0)
> +
> +#define S3C_RSTCON (0x08)
> +
> +#define S3C_RSTCON_PHYCLK (1 << 2)
> +#define S3C_RSTCON_HCLK (1 << 1)
> +#define S3C_RSTCON_PHY (1 << 0)
> +
> +#ifndef MHZ
> +#define MHZ (1000*1000)
> +#endif
> +
> +enum samsung_cpu_type {
> + TYPE_S3C64XX,
> + TYPE_EXYNOS4210,
> +};
> +
> +/*
> + * struct samsung_usbphy - transceiver driver state
> + * @phy: transceiver structure
> + * @plat: platform data
> + * @dev: The parent device supplied to the probe function
> + * @clk: usb phy clock
> + * @regs: usb phy register memory base
> + * @ref_clk_freq: reference clock frequency selection
> + * @cpu_type: machine identifier
> + */
> +struct samsung_usbphy {
> + struct usb_phy phy;
> + struct samsung_usbphy_data *plat;
> + struct device *dev;
> + struct clk *clk;
> + void __iomem *regs;
> + int ref_clk_freq;
> + int cpu_type;
> +};
> +
> +#define phy_to_sphy(x) container_of((x), struct samsung_usbphy, phy)
> +
> +/*
> + * Returns reference clock frequency selection value
> + */
> +static int samsung_usbphy_get_refclk_freq(struct samsung_usbphy *sphy)
> +{
> + struct clk *ref_clk;
> + int refclk_freq = 0;
> +
> + ref_clk = clk_get(sphy->dev, "xusbxti");
> + if (IS_ERR(ref_clk)) {
> + dev_err(sphy->dev, "Failed to get reference clock\n");
> + return PTR_ERR(ref_clk);
> + }
> +
> + switch (clk_get_rate(ref_clk)) {
> + case 12 * MHZ:
> + refclk_freq |= S3C_PHYCLK_CLKSEL_12M;
> + break;
> + case 24 * MHZ:
> + refclk_freq |= S3C_PHYCLK_CLKSEL_24M;
> + break;
> + default:
> + case 48 * MHZ:
> + /* default reference clock */
> + refclk_freq |= S3C_PHYCLK_CLKSEL_48M;
> + break;
> + }
> + clk_put(ref_clk);
> +
> + return refclk_freq;
> +}
> +
> +static void samsung_usbphy_enable(struct samsung_usbphy *sphy)
> +{
> + void __iomem *regs = sphy->regs;
> + u32 phypwr;
> + u32 phyclk;
> + u32 rstcon;
> +
> + /* set clock frequency for PLL */
> + phyclk = sphy->ref_clk_freq;
> + phypwr = readl(regs + S3C_PHYPWR);
> + rstcon = readl(regs + S3C_RSTCON);
> +
> + switch (sphy->cpu_type) {
> + case TYPE_S3C64XX:
> + phyclk &= ~(S3C_PHYCLK_COMMON_ON_N);
> + phypwr &= ~S3C_PHYPWR_NORMAL_MASK;
> + rstcon |= S3C_RSTCON_PHY;
> + break;
> + case TYPE_EXYNOS4210:
> + phypwr &= ~EXYNOS4_PHYPWR_NORMAL_MASK;
> + rstcon |= S3C_RSTCON_PHY;
> + default:
> + break;
> + }
> +
> + writel(phyclk, regs + S3C_PHYCLK);
> + /* set to normal of PHY0 */
> + writel(phypwr, regs + S3C_PHYPWR);
> + /* reset all ports of PHY and Link */
> + writel(rstcon, regs + S3C_RSTCON);
> + udelay(10);
> + rstcon &= ~S3C_RSTCON_PHY;
> + writel(rstcon, regs + S3C_RSTCON);
> +}
> +
> +static void samsung_usbphy_disable(struct samsung_usbphy *sphy)
> +{
> + void __iomem *regs = sphy->regs;
> + u32 phypwr;
> +
> + phypwr = readl(regs + S3C_PHYPWR);
> +
> + switch (sphy->cpu_type) {
> + case TYPE_S3C64XX:
> + phypwr |= S3C_PHYPWR_NORMAL_MASK;
> + break;
> + case TYPE_EXYNOS4210:
> + phypwr |= EXYNOS4_PHYPWR_NORMAL_MASK;
> + default:
> + break;
> + }
> +
> + /* unset to normal of PHY0 */
> + writel(phypwr, regs + S3C_PHYPWR);
> +}
> +
> +/*
> + * The function passed to the usb driver for phy initialization
> + */
> +static int samsung_usbphy_init(struct usb_phy *phy)
> +{
> + struct samsung_usbphy *sphy;
> + int ret = 0;
> +
> + sphy = phy_to_sphy(phy);
> +
> + /* Enable the phy clock */
> + ret = clk_prepare_enable(sphy->clk);
> + if (ret) {
> + dev_err(sphy->dev, "%s: clk_prepare_enable failed\n", __func__);
> + return ret;
> + }
> +
> + /* Disable phy isolation */
> + if (sphy->plat && sphy->plat->pmu_isolation)
> + sphy->plat->pmu_isolation(false);
> +
> + /* Initialize usb phy registers */
> + samsung_usbphy_enable(sphy);
> +
> + /* Disable the phy clock */
> + clk_disable_unprepare(sphy->clk);
> + return ret;
> +}
> +
> +/*
> + * The function passed to the usb driver for phy shutdown
> + */
> +static void samsung_usbphy_shutdown(struct usb_phy *phy)
> +{
> + struct samsung_usbphy *sphy;
> +
> + sphy = phy_to_sphy(phy);
> +
> + if (clk_prepare_enable(sphy->clk)) {
> + dev_err(sphy->dev, "%s: clk_prepare_enable failed\n", __func__);
> + return;
> + }
> +
> + /* De-initialize usb phy registers */
> + samsung_usbphy_disable(sphy);
> +
> + /* Enable phy isolation */
> + if (sphy->plat && sphy->plat->pmu_isolation)
> + sphy->plat->pmu_isolation(true);
> +
> + clk_disable_unprepare(sphy->clk);
> +}
> +
> +static const struct of_device_id samsung_usbphy_dt_match[];
> +
> +static inline int samsung_usbphy_get_driver_data(struct platform_device *pdev)
> +{
> + if (IS_ENABLED(CONFIG_OF) && pdev->dev.of_node) {
> + int data;
> + const struct of_device_id *match;
> + match = of_match_node(samsung_usbphy_dt_match,
> + pdev->dev.of_node);
> + data = (int) match->data;
> + return data;
> + }
> +
> + return platform_get_device_id(pdev)->driver_data;
> +}
> +
> +static int __devinit samsung_usbphy_probe(struct platform_device *pdev)
> +{
> + struct samsung_usbphy *sphy;
> + struct samsung_usbphy_data *pdata;
> + struct device *dev = &pdev->dev;
> + struct resource *phy_mem;
> + void __iomem *phy_base;
> + struct clk *clk;
> + int ret;
> +
> + pdata = pdev->dev.platform_data;
> + if (!pdata) {
> + dev_err(&pdev->dev, "%s: no platform data defined\n", __func__);
> + return -EINVAL;
> + }
> +
> + phy_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
> + if (!phy_mem) {
> + dev_err(dev, "%s: missing mem resource\n", __func__);
> + return -ENODEV;
> + }
> +
> + phy_base = devm_request_and_ioremap(dev, phy_mem);
> + if (!phy_base) {
> + dev_err(dev, "%s: register mapping failed\n", __func__);
> + return -ENXIO;
> + }
> +
> + sphy = devm_kzalloc(dev, sizeof(*sphy), GFP_KERNEL);
> + if (!sphy)
> + return -ENOMEM;
> +
> + clk = devm_clk_get(dev, "otg");
> + if (IS_ERR(clk)) {
> + dev_err(dev, "Failed to get otg clock\n");
> + return PTR_ERR(clk);
> + }
> +
> + sphy->dev = &pdev->dev;
> + sphy->plat = pdata;
> + sphy->regs = phy_base;
> + sphy->clk = clk;
> + sphy->phy.dev = sphy->dev;
> + sphy->phy.label = "samsung-usbphy";
> + sphy->phy.init = samsung_usbphy_init;
> + sphy->phy.shutdown = samsung_usbphy_shutdown;
> + sphy->cpu_type = samsung_usbphy_get_driver_data(pdev);
> + sphy->ref_clk_freq = samsung_usbphy_get_refclk_freq(sphy);
> +
> + ret = usb_add_phy(&sphy->phy, USB_PHY_TYPE_USB2);
> + if (ret)
> + goto err;
> +
> + platform_set_drvdata(pdev, sphy);
> +err:
> + return ret;
> +}
> +
> +static int __exit samsung_usbphy_remove(struct platform_device *pdev)
> +{
> + struct samsung_usbphy *sphy = platform_get_drvdata(pdev);
> +
> + usb_remove_phy(&sphy->phy);
> +
> + return 0;
> +}
> +
> +#ifdef CONFIG_OF
> +static const struct of_device_id samsung_usbphy_dt_match[] = {
> + {
> + .compatible = "samsung,s3c64xx-usbphy",
> + .data = (void *)TYPE_S3C64XX,
> + }, {
> + .compatible = "samsung,exynos4210-usbphy",
> + .data = (void *)TYPE_EXYNOS4210,
> + },
> + {},
> +};
> +MODULE_DEVICE_TABLE(of, samsung_usbphy_dt_match);
> +#else
> +#define samsung_usbphy_dt_match NULL
> +#endif
> +
> +static struct platform_device_id samsung_usbphy_driver_ids[] = {
> + {
> + .name = "s3c64xx-usbphy",
> + .driver_data = TYPE_S3C64XX,
> + }, {
> + .name = "exynos4210-usbphy",
> + .driver_data = TYPE_EXYNOS4210,
> + },
> + {},
> +};
> +
> +MODULE_DEVICE_TABLE(platform, samsung_usbphy_driver_ids);
> +
> +static struct platform_driver samsung_usbphy_driver = {
> + .probe = samsung_usbphy_probe,
> + .remove = __devexit_p(samsung_usbphy_remove),
> + .id_table = samsung_usbphy_driver_ids,
> + .driver = {
> + .name = "samsung-usbphy",
> + .owner = THIS_MODULE,
> + .of_match_table = samsung_usbphy_dt_match,
> + },
> +};
> +
> +module_platform_driver(samsung_usbphy_driver);
> +
> +MODULE_DESCRIPTION("Samsung USB phy controller");
> +MODULE_AUTHOR("Praveen Paneri <p.paneri@samsung.com>");
> +MODULE_LICENSE("GPL");
> +MODULE_ALIAS("platform:samsung-usbphy");
> diff --git a/include/linux/platform_data/samsung-usbphy.h b/include/linux/platform_data/samsung-usbphy.h
> new file mode 100644
> index 0000000..1bd24cb
> --- /dev/null
> +++ b/include/linux/platform_data/samsung-usbphy.h
> @@ -0,0 +1,27 @@
> +/*
> + * Copyright (C) 2012 Samsung Electronics Co.Ltd
> + * http://www.samsung.com/
> + * Author: Praveen Paneri <p.paneri@samsung.com>
> + *
> + * Defines platform data for samsung usb phy driver.
> + *
> + * This program is free software; you can redistribute it and/or modify it
> + * under the terms of the GNU General Public License as published by the
> + * Free Software Foundation; either version 2 of the License, or (at your
> + * option) any later version.
> + */
> +
> +#ifndef __SAMSUNG_USBPHY_PLATFORM_H
> +#define __SAMSUNG_USBPHY_PLATFORM_H
> +
> +/**
> + * samsung_usbphy_data - Platform data for USB PHY driver.
> + * @pmu_isolation: Function to control usb phy isolation in PMU.
> + */
> +struct samsung_usbphy_data {
> + void (*pmu_isolation)(int on);
> +};
> +
> +extern void samsung_usbphy_set_pdata(struct samsung_usbphy_data *pd);
> +
> +#endif /* __SAMSUNG_USBPHY_PLATFORM_H */
> --
> 1.7.1
>
> --
> To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in
> the body of a message to majordomo at vger.kernel.org
> More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply [flat|nested] 27+ messages in thread* [PATCH v6 1/5] usb: phy: samsung: Introducing usb phy driver for hsotg
2012-09-24 9:38 ` Praveen Paneri
@ 2012-09-24 10:39 ` ABRAHAM, KISHON VIJAY
2012-09-25 11:29 ` Marc Kleine-Budde
1 sibling, 0 replies; 27+ messages in thread
From: ABRAHAM, KISHON VIJAY @ 2012-09-24 10:39 UTC (permalink / raw)
To: linux-arm-kernel
Hi,
On Mon, Sep 24, 2012 at 3:08 PM, Praveen Paneri <p.paneri@samsung.com> wrote:
> Hi Kishon, Felipe,
>
> Any further comments on these patches? Can they be merged now?
I don't have any other comments.
Thanks
Kishon
^ permalink raw reply [flat|nested] 27+ messages in thread
* [PATCH v6 1/5] usb: phy: samsung: Introducing usb phy driver for hsotg
2012-09-24 9:38 ` Praveen Paneri
2012-09-24 10:39 ` ABRAHAM, KISHON VIJAY
@ 2012-09-25 11:29 ` Marc Kleine-Budde
2012-09-26 7:22 ` Praveen Paneri
1 sibling, 1 reply; 27+ messages in thread
From: Marc Kleine-Budde @ 2012-09-25 11:29 UTC (permalink / raw)
To: linux-arm-kernel
On 09/24/2012 11:38 AM, Praveen Paneri wrote:
> Hi Kishon, Felipe,
>
> Any further comments on these patches? Can they be merged now?
One nitpick inline.
Marc
>
> Thanks,
> Praveen
>
> On Mon, Sep 17, 2012 at 6:24 PM, Praveen Paneri <p.paneri@samsung.com> wrote:
>> This driver uses usb_phy interface to interact with s3c-hsotg. Supports
>> phy_init and phy_shutdown functions to enable/disable phy. Tested with
>> smdk6410 and smdkv310. More SoCs can be brought under later.
>>
>> Signed-off-by: Praveen Paneri <p.paneri@samsung.com>
>> Acked-by: Heiko Stuebner <heiko@sntech.de>
>> ---
>> .../devicetree/bindings/usb/samsung-usbphy.txt | 9 +
>> drivers/usb/phy/Kconfig | 8 +
>> drivers/usb/phy/Makefile | 1 +
>> drivers/usb/phy/samsung-usbphy.c | 360 ++++++++++++++++++++
>> include/linux/platform_data/samsung-usbphy.h | 27 ++
>> 5 files changed, 405 insertions(+), 0 deletions(-)
>> create mode 100644 Documentation/devicetree/bindings/usb/samsung-usbphy.txt
>> create mode 100644 drivers/usb/phy/samsung-usbphy.c
>> create mode 100644 include/linux/platform_data/samsung-usbphy.h
>>
>> diff --git a/Documentation/devicetree/bindings/usb/samsung-usbphy.txt b/Documentation/devicetree/bindings/usb/samsung-usbphy.txt
>> new file mode 100644
>> index 0000000..fefd9c8
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/usb/samsung-usbphy.txt
>> @@ -0,0 +1,9 @@
>> +* Samsung's usb phy transceiver
>> +
>> +The Samsung's phy transceiver is used for controlling usb otg phy for
>> +s3c-hsotg usb device controller.
>> +
>> +Required properties:
>> +- compatible : should be "samsung,exynos4210-usbphy"
>> +- reg : base physical address of the phy registers and length of memory mapped
>> + region.
>> diff --git a/drivers/usb/phy/Kconfig b/drivers/usb/phy/Kconfig
>> index 63c339b..313685f 100644
>> --- a/drivers/usb/phy/Kconfig
>> +++ b/drivers/usb/phy/Kconfig
>> @@ -32,3 +32,11 @@ config MV_U3D_PHY
>> help
>> Enable this to support Marvell USB 3.0 phy controller for Marvell
>> SoC.
>> +
>> +config SAMSUNG_USBPHY
>> + bool "Samsung USB PHY controller Driver"
>> + depends on USB_S3C_HSOTG
>> + select USB_OTG_UTILS
>> + help
>> + Enable this to support Samsung USB phy controller for samsung
>> + SoCs.
>> diff --git a/drivers/usb/phy/Makefile b/drivers/usb/phy/Makefile
>> index b069f29..55dcfc1 100644
>> --- a/drivers/usb/phy/Makefile
>> +++ b/drivers/usb/phy/Makefile
>> @@ -8,3 +8,4 @@ obj-$(CONFIG_OMAP_USB2) += omap-usb2.o
>> obj-$(CONFIG_USB_ISP1301) += isp1301.o
>> obj-$(CONFIG_MV_U3D_PHY) += mv_u3d_phy.o
>> obj-$(CONFIG_USB_EHCI_TEGRA) += tegra_usb_phy.o
>> +obj-$(CONFIG_SAMSUNG_USBPHY) += samsung-usbphy.o
>> diff --git a/drivers/usb/phy/samsung-usbphy.c b/drivers/usb/phy/samsung-usbphy.c
>> new file mode 100644
>> index 0000000..95ec4d0
>> --- /dev/null
>> +++ b/drivers/usb/phy/samsung-usbphy.c
>> @@ -0,0 +1,360 @@
>> +/* linux/drivers/usb/phy/samsung-usbphy.c
>> + *
>> + * Copyright (c) 2012 Samsung Electronics Co., Ltd.
>> + * http://www.samsung.com
>> + *
>> + * Author: Praveen Paneri <p.paneri@samsung.com>
>> + *
>> + * Samsung USB2.0 High-speed OTG transceiver, talks to S3C HS OTG controller
>> + *
>> + * This program is free software; you can redistribute it and/or modify
>> + * it under the terms of the GNU General Public License version 2 as
>> + * published by the Free Software Foundation.
>> + *
>> + * This program is distributed in the hope that it will be useful,
>> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
>> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
>> + * GNU General Public License for more details.
>> + */
>> +
>> +#include <linux/module.h>
>> +#include <linux/platform_device.h>
>> +#include <linux/clk.h>
>> +#include <linux/delay.h>
>> +#include <linux/err.h>
>> +#include <linux/io.h>
>> +#include <linux/of.h>
>> +#include <linux/usb/otg.h>
>> +#include <linux/platform_data/samsung-usbphy.h>
>> +
>> +/* Register definitions */
>> +
>> +#define S3C_PHYPWR (0x00)
>> +
>> +#define S3C_PHYPWR_NORMAL_MASK (0x19 << 0)
>> +#define S3C_PHYPWR_OTG_DISABLE (1 << 4)
>> +#define S3C_PHYPWR_ANALOG_POWERDOWN (1 << 3)
>> +#define S3C_PHYPWR_FORCE_SUSPEND (1 << 1)
>> +/* For Exynos4 */
>> +#define EXYNOS4_PHYPWR_NORMAL_MASK (0x39 << 0)
>> +#define EXYNOS4_PHYPWR_SLEEP (1 << 5)
>> +
>> +#define S3C_PHYCLK (0x04)
>> +
>> +#define S3C_PHYCLK_MODE_SERIAL (1 << 6)
>> +#define S3C_PHYCLK_EXT_OSC (1 << 5)
>> +#define S3C_PHYCLK_COMMON_ON_N (1 << 4)
>> +#define S3C_PHYCLK_ID_PULL (1 << 2)
>> +#define S3C_PHYCLK_CLKSEL_MASK (0x3 << 0)
>> +#define S3C_PHYCLK_CLKSEL_SHIFT (0)
>> +#define S3C_PHYCLK_CLKSEL_48M (0x0 << 0)
>> +#define S3C_PHYCLK_CLKSEL_12M (0x2 << 0)
>> +#define S3C_PHYCLK_CLKSEL_24M (0x3 << 0)
>> +
>> +#define S3C_RSTCON (0x08)
>> +
>> +#define S3C_RSTCON_PHYCLK (1 << 2)
>> +#define S3C_RSTCON_HCLK (1 << 1)
>> +#define S3C_RSTCON_PHY (1 << 0)
>> +
>> +#ifndef MHZ
>> +#define MHZ (1000*1000)
>> +#endif
>> +
>> +enum samsung_cpu_type {
>> + TYPE_S3C64XX,
>> + TYPE_EXYNOS4210,
>> +};
>> +
>> +/*
>> + * struct samsung_usbphy - transceiver driver state
>> + * @phy: transceiver structure
>> + * @plat: platform data
>> + * @dev: The parent device supplied to the probe function
>> + * @clk: usb phy clock
>> + * @regs: usb phy register memory base
>> + * @ref_clk_freq: reference clock frequency selection
>> + * @cpu_type: machine identifier
>> + */
>> +struct samsung_usbphy {
>> + struct usb_phy phy;
>> + struct samsung_usbphy_data *plat;
>> + struct device *dev;
>> + struct clk *clk;
>> + void __iomem *regs;
>> + int ref_clk_freq;
>> + int cpu_type;
>> +};
>> +
>> +#define phy_to_sphy(x) container_of((x), struct samsung_usbphy, phy)
>> +
>> +/*
>> + * Returns reference clock frequency selection value
>> + */
>> +static int samsung_usbphy_get_refclk_freq(struct samsung_usbphy *sphy)
>> +{
>> + struct clk *ref_clk;
>> + int refclk_freq = 0;
>> +
>> + ref_clk = clk_get(sphy->dev, "xusbxti");
>> + if (IS_ERR(ref_clk)) {
>> + dev_err(sphy->dev, "Failed to get reference clock\n");
>> + return PTR_ERR(ref_clk);
>> + }
>> +
>> + switch (clk_get_rate(ref_clk)) {
>> + case 12 * MHZ:
>> + refclk_freq |= S3C_PHYCLK_CLKSEL_12M;
>> + break;
>> + case 24 * MHZ:
>> + refclk_freq |= S3C_PHYCLK_CLKSEL_24M;
>> + break;
>> + default:
>> + case 48 * MHZ:
>> + /* default reference clock */
>> + refclk_freq |= S3C_PHYCLK_CLKSEL_48M;
>> + break;
>> + }
>> + clk_put(ref_clk);
>> +
>> + return refclk_freq;
>> +}
>> +
>> +static void samsung_usbphy_enable(struct samsung_usbphy *sphy)
>> +{
>> + void __iomem *regs = sphy->regs;
>> + u32 phypwr;
>> + u32 phyclk;
>> + u32 rstcon;
>> +
>> + /* set clock frequency for PLL */
>> + phyclk = sphy->ref_clk_freq;
>> + phypwr = readl(regs + S3C_PHYPWR);
>> + rstcon = readl(regs + S3C_RSTCON);
>> +
>> + switch (sphy->cpu_type) {
>> + case TYPE_S3C64XX:
>> + phyclk &= ~(S3C_PHYCLK_COMMON_ON_N);
>> + phypwr &= ~S3C_PHYPWR_NORMAL_MASK;
>> + rstcon |= S3C_RSTCON_PHY;
>> + break;
>> + case TYPE_EXYNOS4210:
>> + phypwr &= ~EXYNOS4_PHYPWR_NORMAL_MASK;
>> + rstcon |= S3C_RSTCON_PHY;
>> + default:
>> + break;
>> + }
>> +
>> + writel(phyclk, regs + S3C_PHYCLK);
>> + /* set to normal of PHY0 */
>> + writel(phypwr, regs + S3C_PHYPWR);
>> + /* reset all ports of PHY and Link */
>> + writel(rstcon, regs + S3C_RSTCON);
>> + udelay(10);
>> + rstcon &= ~S3C_RSTCON_PHY;
>> + writel(rstcon, regs + S3C_RSTCON);
>> +}
>> +
>> +static void samsung_usbphy_disable(struct samsung_usbphy *sphy)
>> +{
>> + void __iomem *regs = sphy->regs;
>> + u32 phypwr;
>> +
>> + phypwr = readl(regs + S3C_PHYPWR);
>> +
>> + switch (sphy->cpu_type) {
>> + case TYPE_S3C64XX:
>> + phypwr |= S3C_PHYPWR_NORMAL_MASK;
>> + break;
>> + case TYPE_EXYNOS4210:
>> + phypwr |= EXYNOS4_PHYPWR_NORMAL_MASK;
>> + default:
>> + break;
>> + }
>> +
>> + /* unset to normal of PHY0 */
>> + writel(phypwr, regs + S3C_PHYPWR);
>> +}
>> +
>> +/*
>> + * The function passed to the usb driver for phy initialization
>> + */
>> +static int samsung_usbphy_init(struct usb_phy *phy)
>> +{
>> + struct samsung_usbphy *sphy;
>> + int ret = 0;
>> +
>> + sphy = phy_to_sphy(phy);
>> +
>> + /* Enable the phy clock */
>> + ret = clk_prepare_enable(sphy->clk);
>> + if (ret) {
>> + dev_err(sphy->dev, "%s: clk_prepare_enable failed\n", __func__);
>> + return ret;
>> + }
>> +
>> + /* Disable phy isolation */
>> + if (sphy->plat && sphy->plat->pmu_isolation)
>> + sphy->plat->pmu_isolation(false);
>> +
>> + /* Initialize usb phy registers */
>> + samsung_usbphy_enable(sphy);
>> +
>> + /* Disable the phy clock */
>> + clk_disable_unprepare(sphy->clk);
>> + return ret;
>> +}
>> +
>> +/*
>> + * The function passed to the usb driver for phy shutdown
>> + */
>> +static void samsung_usbphy_shutdown(struct usb_phy *phy)
>> +{
>> + struct samsung_usbphy *sphy;
>> +
>> + sphy = phy_to_sphy(phy);
>> +
>> + if (clk_prepare_enable(sphy->clk)) {
>> + dev_err(sphy->dev, "%s: clk_prepare_enable failed\n", __func__);
>> + return;
>> + }
>> +
>> + /* De-initialize usb phy registers */
>> + samsung_usbphy_disable(sphy);
>> +
>> + /* Enable phy isolation */
>> + if (sphy->plat && sphy->plat->pmu_isolation)
>> + sphy->plat->pmu_isolation(true);
>> +
>> + clk_disable_unprepare(sphy->clk);
>> +}
>> +
>> +static const struct of_device_id samsung_usbphy_dt_match[];
>> +
>> +static inline int samsung_usbphy_get_driver_data(struct platform_device *pdev)
>> +{
>> + if (IS_ENABLED(CONFIG_OF) && pdev->dev.of_node) {
>> + int data;
>> + const struct of_device_id *match;
>> + match = of_match_node(samsung_usbphy_dt_match,
>> + pdev->dev.of_node);
>> + data = (int) match->data;
>> + return data;
>> + }
>> +
>> + return platform_get_device_id(pdev)->driver_data;
>> +}
>> +
>> +static int __devinit samsung_usbphy_probe(struct platform_device *pdev)
>> +{
>> + struct samsung_usbphy *sphy;
>> + struct samsung_usbphy_data *pdata;
>> + struct device *dev = &pdev->dev;
>> + struct resource *phy_mem;
>> + void __iomem *phy_base;
>> + struct clk *clk;
>> + int ret;
>> +
>> + pdata = pdev->dev.platform_data;
>> + if (!pdata) {
>> + dev_err(&pdev->dev, "%s: no platform data defined\n", __func__);
>> + return -EINVAL;
>> + }
>> +
>> + phy_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
>> + if (!phy_mem) {
>> + dev_err(dev, "%s: missing mem resource\n", __func__);
>> + return -ENODEV;
>> + }
>> +
>> + phy_base = devm_request_and_ioremap(dev, phy_mem);
>> + if (!phy_base) {
>> + dev_err(dev, "%s: register mapping failed\n", __func__);
>> + return -ENXIO;
>> + }
>> +
>> + sphy = devm_kzalloc(dev, sizeof(*sphy), GFP_KERNEL);
>> + if (!sphy)
>> + return -ENOMEM;
>> +
>> + clk = devm_clk_get(dev, "otg");
>> + if (IS_ERR(clk)) {
>> + dev_err(dev, "Failed to get otg clock\n");
>> + return PTR_ERR(clk);
>> + }
>> +
>> + sphy->dev = &pdev->dev;
>> + sphy->plat = pdata;
>> + sphy->regs = phy_base;
>> + sphy->clk = clk;
>> + sphy->phy.dev = sphy->dev;
>> + sphy->phy.label = "samsung-usbphy";
>> + sphy->phy.init = samsung_usbphy_init;
>> + sphy->phy.shutdown = samsung_usbphy_shutdown;
>> + sphy->cpu_type = samsung_usbphy_get_driver_data(pdev);
>> + sphy->ref_clk_freq = samsung_usbphy_get_refclk_freq(sphy);
>> +
>> + ret = usb_add_phy(&sphy->phy, USB_PHY_TYPE_USB2);
>> + if (ret)
>> + goto err;
>> +
>> + platform_set_drvdata(pdev, sphy);
To avoid potential race conditions, you should first setup
platform_set_drvdata(), then add the phy.
>> +err:
>> + return ret;
>> +}
>> +
>> +static int __exit samsung_usbphy_remove(struct platform_device *pdev)
>> +{
>> + struct samsung_usbphy *sphy = platform_get_drvdata(pdev);
>> +
>> + usb_remove_phy(&sphy->phy);
>> +
>> + return 0;
>> +}
>> +
>> +#ifdef CONFIG_OF
>> +static const struct of_device_id samsung_usbphy_dt_match[] = {
>> + {
>> + .compatible = "samsung,s3c64xx-usbphy",
>> + .data = (void *)TYPE_S3C64XX,
>> + }, {
>> + .compatible = "samsung,exynos4210-usbphy",
>> + .data = (void *)TYPE_EXYNOS4210,
>> + },
>> + {},
>> +};
>> +MODULE_DEVICE_TABLE(of, samsung_usbphy_dt_match);
>> +#else
>> +#define samsung_usbphy_dt_match NULL
>> +#endif
>> +
>> +static struct platform_device_id samsung_usbphy_driver_ids[] = {
>> + {
>> + .name = "s3c64xx-usbphy",
>> + .driver_data = TYPE_S3C64XX,
>> + }, {
>> + .name = "exynos4210-usbphy",
>> + .driver_data = TYPE_EXYNOS4210,
>> + },
>> + {},
>> +};
>> +
>> +MODULE_DEVICE_TABLE(platform, samsung_usbphy_driver_ids);
>> +
>> +static struct platform_driver samsung_usbphy_driver = {
>> + .probe = samsung_usbphy_probe,
>> + .remove = __devexit_p(samsung_usbphy_remove),
>> + .id_table = samsung_usbphy_driver_ids,
>> + .driver = {
>> + .name = "samsung-usbphy",
>> + .owner = THIS_MODULE,
>> + .of_match_table = samsung_usbphy_dt_match,
>> + },
>> +};
>> +
>> +module_platform_driver(samsung_usbphy_driver);
>> +
>> +MODULE_DESCRIPTION("Samsung USB phy controller");
>> +MODULE_AUTHOR("Praveen Paneri <p.paneri@samsung.com>");
>> +MODULE_LICENSE("GPL");
>> +MODULE_ALIAS("platform:samsung-usbphy");
>> diff --git a/include/linux/platform_data/samsung-usbphy.h b/include/linux/platform_data/samsung-usbphy.h
>> new file mode 100644
>> index 0000000..1bd24cb
>> --- /dev/null
>> +++ b/include/linux/platform_data/samsung-usbphy.h
>> @@ -0,0 +1,27 @@
>> +/*
>> + * Copyright (C) 2012 Samsung Electronics Co.Ltd
>> + * http://www.samsung.com/
>> + * Author: Praveen Paneri <p.paneri@samsung.com>
>> + *
>> + * Defines platform data for samsung usb phy driver.
>> + *
>> + * This program is free software; you can redistribute it and/or modify it
>> + * under the terms of the GNU General Public License as published by the
>> + * Free Software Foundation; either version 2 of the License, or (at your
>> + * option) any later version.
>> + */
>> +
>> +#ifndef __SAMSUNG_USBPHY_PLATFORM_H
>> +#define __SAMSUNG_USBPHY_PLATFORM_H
>> +
>> +/**
>> + * samsung_usbphy_data - Platform data for USB PHY driver.
>> + * @pmu_isolation: Function to control usb phy isolation in PMU.
>> + */
>> +struct samsung_usbphy_data {
>> + void (*pmu_isolation)(int on);
>> +};
>> +
>> +extern void samsung_usbphy_set_pdata(struct samsung_usbphy_data *pd);
>> +
>> +#endif /* __SAMSUNG_USBPHY_PLATFORM_H */
>> --
>> 1.7.1
>>
>> --
>> To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in
>> the body of a message to majordomo at vger.kernel.org
>> More majordomo info at http://vger.kernel.org/majordomo-info.html
> --
> To unsubscribe from this list: send the line "unsubscribe linux-usb" in
> the body of a message to majordomo at vger.kernel.org
> More majordomo info at http://vger.kernel.org/majordomo-info.html
>
--
Pengutronix e.K. | Marc Kleine-Budde |
Industrial Linux Solutions | Phone: +49-231-2826-924 |
Vertretung West/Dortmund | Fax: +49-5121-206917-5555 |
Amtsgericht Hildesheim, HRA 2686 | http://www.pengutronix.de |
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^ permalink raw reply [flat|nested] 27+ messages in thread* [PATCH v6 1/5] usb: phy: samsung: Introducing usb phy driver for hsotg
2012-09-25 11:29 ` Marc Kleine-Budde
@ 2012-09-26 7:22 ` Praveen Paneri
2012-10-03 9:26 ` [PATCH " Praveen Paneri
0 siblings, 1 reply; 27+ messages in thread
From: Praveen Paneri @ 2012-09-26 7:22 UTC (permalink / raw)
To: linux-arm-kernel
On Tue, Sep 25, 2012 at 4:59 PM, Marc Kleine-Budde <mkl@pengutronix.de> wrote:
> On 09/24/2012 11:38 AM, Praveen Paneri wrote:
>> Hi Kishon, Felipe,
>>
>> Any further comments on these patches? Can they be merged now?
>
> One nitpick inline.
>
> Marc
>>
>> Thanks,
>> Praveen
>>
>> On Mon, Sep 17, 2012 at 6:24 PM, Praveen Paneri <p.paneri@samsung.com> wrote:
>>> This driver uses usb_phy interface to interact with s3c-hsotg. Supports
>>> phy_init and phy_shutdown functions to enable/disable phy. Tested with
>>> smdk6410 and smdkv310. More SoCs can be brought under later.
>>>
>>> Signed-off-by: Praveen Paneri <p.paneri@samsung.com>
>>> Acked-by: Heiko Stuebner <heiko@sntech.de>
>>> ---
>>> .../devicetree/bindings/usb/samsung-usbphy.txt | 9 +
>>> drivers/usb/phy/Kconfig | 8 +
>>> drivers/usb/phy/Makefile | 1 +
>>> drivers/usb/phy/samsung-usbphy.c | 360 ++++++++++++++++++++
>>> include/linux/platform_data/samsung-usbphy.h | 27 ++
>>> 5 files changed, 405 insertions(+), 0 deletions(-)
>>> create mode 100644 Documentation/devicetree/bindings/usb/samsung-usbphy.txt
>>> create mode 100644 drivers/usb/phy/samsung-usbphy.c
>>> create mode 100644 include/linux/platform_data/samsung-usbphy.h
>>>
>>> diff --git a/Documentation/devicetree/bindings/usb/samsung-usbphy.txt b/Documentation/devicetree/bindings/usb/samsung-usbphy.txt
>>> new file mode 100644
>>> index 0000000..fefd9c8
>>> --- /dev/null
>>> +++ b/Documentation/devicetree/bindings/usb/samsung-usbphy.txt
>>> @@ -0,0 +1,9 @@
>>> +* Samsung's usb phy transceiver
>>> +
>>> +The Samsung's phy transceiver is used for controlling usb otg phy for
>>> +s3c-hsotg usb device controller.
>>> +
>>> +Required properties:
>>> +- compatible : should be "samsung,exynos4210-usbphy"
>>> +- reg : base physical address of the phy registers and length of memory mapped
>>> + region.
>>> diff --git a/drivers/usb/phy/Kconfig b/drivers/usb/phy/Kconfig
>>> index 63c339b..313685f 100644
>>> --- a/drivers/usb/phy/Kconfig
>>> +++ b/drivers/usb/phy/Kconfig
>>> @@ -32,3 +32,11 @@ config MV_U3D_PHY
>>> help
>>> Enable this to support Marvell USB 3.0 phy controller for Marvell
>>> SoC.
>>> +
>>> +config SAMSUNG_USBPHY
>>> + bool "Samsung USB PHY controller Driver"
>>> + depends on USB_S3C_HSOTG
>>> + select USB_OTG_UTILS
>>> + help
>>> + Enable this to support Samsung USB phy controller for samsung
>>> + SoCs.
>>> diff --git a/drivers/usb/phy/Makefile b/drivers/usb/phy/Makefile
>>> index b069f29..55dcfc1 100644
>>> --- a/drivers/usb/phy/Makefile
>>> +++ b/drivers/usb/phy/Makefile
>>> @@ -8,3 +8,4 @@ obj-$(CONFIG_OMAP_USB2) += omap-usb2.o
>>> obj-$(CONFIG_USB_ISP1301) += isp1301.o
>>> obj-$(CONFIG_MV_U3D_PHY) += mv_u3d_phy.o
>>> obj-$(CONFIG_USB_EHCI_TEGRA) += tegra_usb_phy.o
>>> +obj-$(CONFIG_SAMSUNG_USBPHY) += samsung-usbphy.o
>>> diff --git a/drivers/usb/phy/samsung-usbphy.c b/drivers/usb/phy/samsung-usbphy.c
>>> new file mode 100644
>>> index 0000000..95ec4d0
>>> --- /dev/null
>>> +++ b/drivers/usb/phy/samsung-usbphy.c
>>> @@ -0,0 +1,360 @@
>>> +/* linux/drivers/usb/phy/samsung-usbphy.c
>>> + *
>>> + * Copyright (c) 2012 Samsung Electronics Co., Ltd.
>>> + * http://www.samsung.com
>>> + *
>>> + * Author: Praveen Paneri <p.paneri@samsung.com>
>>> + *
>>> + * Samsung USB2.0 High-speed OTG transceiver, talks to S3C HS OTG controller
>>> + *
>>> + * This program is free software; you can redistribute it and/or modify
>>> + * it under the terms of the GNU General Public License version 2 as
>>> + * published by the Free Software Foundation.
>>> + *
>>> + * This program is distributed in the hope that it will be useful,
>>> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
>>> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
>>> + * GNU General Public License for more details.
>>> + */
>>> +
>>> +#include <linux/module.h>
>>> +#include <linux/platform_device.h>
>>> +#include <linux/clk.h>
>>> +#include <linux/delay.h>
>>> +#include <linux/err.h>
>>> +#include <linux/io.h>
>>> +#include <linux/of.h>
>>> +#include <linux/usb/otg.h>
>>> +#include <linux/platform_data/samsung-usbphy.h>
>>> +
>>> +/* Register definitions */
>>> +
>>> +#define S3C_PHYPWR (0x00)
>>> +
>>> +#define S3C_PHYPWR_NORMAL_MASK (0x19 << 0)
>>> +#define S3C_PHYPWR_OTG_DISABLE (1 << 4)
>>> +#define S3C_PHYPWR_ANALOG_POWERDOWN (1 << 3)
>>> +#define S3C_PHYPWR_FORCE_SUSPEND (1 << 1)
>>> +/* For Exynos4 */
>>> +#define EXYNOS4_PHYPWR_NORMAL_MASK (0x39 << 0)
>>> +#define EXYNOS4_PHYPWR_SLEEP (1 << 5)
>>> +
>>> +#define S3C_PHYCLK (0x04)
>>> +
>>> +#define S3C_PHYCLK_MODE_SERIAL (1 << 6)
>>> +#define S3C_PHYCLK_EXT_OSC (1 << 5)
>>> +#define S3C_PHYCLK_COMMON_ON_N (1 << 4)
>>> +#define S3C_PHYCLK_ID_PULL (1 << 2)
>>> +#define S3C_PHYCLK_CLKSEL_MASK (0x3 << 0)
>>> +#define S3C_PHYCLK_CLKSEL_SHIFT (0)
>>> +#define S3C_PHYCLK_CLKSEL_48M (0x0 << 0)
>>> +#define S3C_PHYCLK_CLKSEL_12M (0x2 << 0)
>>> +#define S3C_PHYCLK_CLKSEL_24M (0x3 << 0)
>>> +
>>> +#define S3C_RSTCON (0x08)
>>> +
>>> +#define S3C_RSTCON_PHYCLK (1 << 2)
>>> +#define S3C_RSTCON_HCLK (1 << 1)
>>> +#define S3C_RSTCON_PHY (1 << 0)
>>> +
>>> +#ifndef MHZ
>>> +#define MHZ (1000*1000)
>>> +#endif
>>> +
>>> +enum samsung_cpu_type {
>>> + TYPE_S3C64XX,
>>> + TYPE_EXYNOS4210,
>>> +};
>>> +
>>> +/*
>>> + * struct samsung_usbphy - transceiver driver state
>>> + * @phy: transceiver structure
>>> + * @plat: platform data
>>> + * @dev: The parent device supplied to the probe function
>>> + * @clk: usb phy clock
>>> + * @regs: usb phy register memory base
>>> + * @ref_clk_freq: reference clock frequency selection
>>> + * @cpu_type: machine identifier
>>> + */
>>> +struct samsung_usbphy {
>>> + struct usb_phy phy;
>>> + struct samsung_usbphy_data *plat;
>>> + struct device *dev;
>>> + struct clk *clk;
>>> + void __iomem *regs;
>>> + int ref_clk_freq;
>>> + int cpu_type;
>>> +};
>>> +
>>> +#define phy_to_sphy(x) container_of((x), struct samsung_usbphy, phy)
>>> +
>>> +/*
>>> + * Returns reference clock frequency selection value
>>> + */
>>> +static int samsung_usbphy_get_refclk_freq(struct samsung_usbphy *sphy)
>>> +{
>>> + struct clk *ref_clk;
>>> + int refclk_freq = 0;
>>> +
>>> + ref_clk = clk_get(sphy->dev, "xusbxti");
>>> + if (IS_ERR(ref_clk)) {
>>> + dev_err(sphy->dev, "Failed to get reference clock\n");
>>> + return PTR_ERR(ref_clk);
>>> + }
>>> +
>>> + switch (clk_get_rate(ref_clk)) {
>>> + case 12 * MHZ:
>>> + refclk_freq |= S3C_PHYCLK_CLKSEL_12M;
>>> + break;
>>> + case 24 * MHZ:
>>> + refclk_freq |= S3C_PHYCLK_CLKSEL_24M;
>>> + break;
>>> + default:
>>> + case 48 * MHZ:
>>> + /* default reference clock */
>>> + refclk_freq |= S3C_PHYCLK_CLKSEL_48M;
>>> + break;
>>> + }
>>> + clk_put(ref_clk);
>>> +
>>> + return refclk_freq;
>>> +}
>>> +
>>> +static void samsung_usbphy_enable(struct samsung_usbphy *sphy)
>>> +{
>>> + void __iomem *regs = sphy->regs;
>>> + u32 phypwr;
>>> + u32 phyclk;
>>> + u32 rstcon;
>>> +
>>> + /* set clock frequency for PLL */
>>> + phyclk = sphy->ref_clk_freq;
>>> + phypwr = readl(regs + S3C_PHYPWR);
>>> + rstcon = readl(regs + S3C_RSTCON);
>>> +
>>> + switch (sphy->cpu_type) {
>>> + case TYPE_S3C64XX:
>>> + phyclk &= ~(S3C_PHYCLK_COMMON_ON_N);
>>> + phypwr &= ~S3C_PHYPWR_NORMAL_MASK;
>>> + rstcon |= S3C_RSTCON_PHY;
>>> + break;
>>> + case TYPE_EXYNOS4210:
>>> + phypwr &= ~EXYNOS4_PHYPWR_NORMAL_MASK;
>>> + rstcon |= S3C_RSTCON_PHY;
>>> + default:
>>> + break;
>>> + }
>>> +
>>> + writel(phyclk, regs + S3C_PHYCLK);
>>> + /* set to normal of PHY0 */
>>> + writel(phypwr, regs + S3C_PHYPWR);
>>> + /* reset all ports of PHY and Link */
>>> + writel(rstcon, regs + S3C_RSTCON);
>>> + udelay(10);
>>> + rstcon &= ~S3C_RSTCON_PHY;
>>> + writel(rstcon, regs + S3C_RSTCON);
>>> +}
>>> +
>>> +static void samsung_usbphy_disable(struct samsung_usbphy *sphy)
>>> +{
>>> + void __iomem *regs = sphy->regs;
>>> + u32 phypwr;
>>> +
>>> + phypwr = readl(regs + S3C_PHYPWR);
>>> +
>>> + switch (sphy->cpu_type) {
>>> + case TYPE_S3C64XX:
>>> + phypwr |= S3C_PHYPWR_NORMAL_MASK;
>>> + break;
>>> + case TYPE_EXYNOS4210:
>>> + phypwr |= EXYNOS4_PHYPWR_NORMAL_MASK;
>>> + default:
>>> + break;
>>> + }
>>> +
>>> + /* unset to normal of PHY0 */
>>> + writel(phypwr, regs + S3C_PHYPWR);
>>> +}
>>> +
>>> +/*
>>> + * The function passed to the usb driver for phy initialization
>>> + */
>>> +static int samsung_usbphy_init(struct usb_phy *phy)
>>> +{
>>> + struct samsung_usbphy *sphy;
>>> + int ret = 0;
>>> +
>>> + sphy = phy_to_sphy(phy);
>>> +
>>> + /* Enable the phy clock */
>>> + ret = clk_prepare_enable(sphy->clk);
>>> + if (ret) {
>>> + dev_err(sphy->dev, "%s: clk_prepare_enable failed\n", __func__);
>>> + return ret;
>>> + }
>>> +
>>> + /* Disable phy isolation */
>>> + if (sphy->plat && sphy->plat->pmu_isolation)
>>> + sphy->plat->pmu_isolation(false);
>>> +
>>> + /* Initialize usb phy registers */
>>> + samsung_usbphy_enable(sphy);
>>> +
>>> + /* Disable the phy clock */
>>> + clk_disable_unprepare(sphy->clk);
>>> + return ret;
>>> +}
>>> +
>>> +/*
>>> + * The function passed to the usb driver for phy shutdown
>>> + */
>>> +static void samsung_usbphy_shutdown(struct usb_phy *phy)
>>> +{
>>> + struct samsung_usbphy *sphy;
>>> +
>>> + sphy = phy_to_sphy(phy);
>>> +
>>> + if (clk_prepare_enable(sphy->clk)) {
>>> + dev_err(sphy->dev, "%s: clk_prepare_enable failed\n", __func__);
>>> + return;
>>> + }
>>> +
>>> + /* De-initialize usb phy registers */
>>> + samsung_usbphy_disable(sphy);
>>> +
>>> + /* Enable phy isolation */
>>> + if (sphy->plat && sphy->plat->pmu_isolation)
>>> + sphy->plat->pmu_isolation(true);
>>> +
>>> + clk_disable_unprepare(sphy->clk);
>>> +}
>>> +
>>> +static const struct of_device_id samsung_usbphy_dt_match[];
>>> +
>>> +static inline int samsung_usbphy_get_driver_data(struct platform_device *pdev)
>>> +{
>>> + if (IS_ENABLED(CONFIG_OF) && pdev->dev.of_node) {
>>> + int data;
>>> + const struct of_device_id *match;
>>> + match = of_match_node(samsung_usbphy_dt_match,
>>> + pdev->dev.of_node);
>>> + data = (int) match->data;
>>> + return data;
>>> + }
>>> +
>>> + return platform_get_device_id(pdev)->driver_data;
>>> +}
>>> +
>>> +static int __devinit samsung_usbphy_probe(struct platform_device *pdev)
>>> +{
>>> + struct samsung_usbphy *sphy;
>>> + struct samsung_usbphy_data *pdata;
>>> + struct device *dev = &pdev->dev;
>>> + struct resource *phy_mem;
>>> + void __iomem *phy_base;
>>> + struct clk *clk;
>>> + int ret;
>>> +
>>> + pdata = pdev->dev.platform_data;
>>> + if (!pdata) {
>>> + dev_err(&pdev->dev, "%s: no platform data defined\n", __func__);
>>> + return -EINVAL;
>>> + }
>>> +
>>> + phy_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
>>> + if (!phy_mem) {
>>> + dev_err(dev, "%s: missing mem resource\n", __func__);
>>> + return -ENODEV;
>>> + }
>>> +
>>> + phy_base = devm_request_and_ioremap(dev, phy_mem);
>>> + if (!phy_base) {
>>> + dev_err(dev, "%s: register mapping failed\n", __func__);
>>> + return -ENXIO;
>>> + }
>>> +
>>> + sphy = devm_kzalloc(dev, sizeof(*sphy), GFP_KERNEL);
>>> + if (!sphy)
>>> + return -ENOMEM;
>>> +
>>> + clk = devm_clk_get(dev, "otg");
>>> + if (IS_ERR(clk)) {
>>> + dev_err(dev, "Failed to get otg clock\n");
>>> + return PTR_ERR(clk);
>>> + }
>>> +
>>> + sphy->dev = &pdev->dev;
>>> + sphy->plat = pdata;
>>> + sphy->regs = phy_base;
>>> + sphy->clk = clk;
>>> + sphy->phy.dev = sphy->dev;
>>> + sphy->phy.label = "samsung-usbphy";
>>> + sphy->phy.init = samsung_usbphy_init;
>>> + sphy->phy.shutdown = samsung_usbphy_shutdown;
>>> + sphy->cpu_type = samsung_usbphy_get_driver_data(pdev);
>>> + sphy->ref_clk_freq = samsung_usbphy_get_refclk_freq(sphy);
>>> +
>>> + ret = usb_add_phy(&sphy->phy, USB_PHY_TYPE_USB2);
>>> + if (ret)
>>> + goto err;
>>> +
>>> + platform_set_drvdata(pdev, sphy);
>
> To avoid potential race conditions, you should first setup
> platform_set_drvdata(), then add the phy.
It will not be the case as driver_data is not used as of now, may be I
can just remove the platform_set_drvdata() call from here.
>
>>> +err:
>>> + return ret;
>>> +}
>>> +
>>> +static int __exit samsung_usbphy_remove(struct platform_device *pdev)
>>> +{
>>> + struct samsung_usbphy *sphy = platform_get_drvdata(pdev);
>>> +
>>> + usb_remove_phy(&sphy->phy);
>>> +
>>> + return 0;
>>> +}
>>> +
>>> +#ifdef CONFIG_OF
>>> +static const struct of_device_id samsung_usbphy_dt_match[] = {
>>> + {
>>> + .compatible = "samsung,s3c64xx-usbphy",
>>> + .data = (void *)TYPE_S3C64XX,
>>> + }, {
>>> + .compatible = "samsung,exynos4210-usbphy",
>>> + .data = (void *)TYPE_EXYNOS4210,
>>> + },
>>> + {},
>>> +};
>>> +MODULE_DEVICE_TABLE(of, samsung_usbphy_dt_match);
>>> +#else
>>> +#define samsung_usbphy_dt_match NULL
>>> +#endif
>>> +
>>> +static struct platform_device_id samsung_usbphy_driver_ids[] = {
>>> + {
>>> + .name = "s3c64xx-usbphy",
>>> + .driver_data = TYPE_S3C64XX,
>>> + }, {
>>> + .name = "exynos4210-usbphy",
>>> + .driver_data = TYPE_EXYNOS4210,
>>> + },
>>> + {},
>>> +};
>>> +
>>> +MODULE_DEVICE_TABLE(platform, samsung_usbphy_driver_ids);
>>> +
>>> +static struct platform_driver samsung_usbphy_driver = {
>>> + .probe = samsung_usbphy_probe,
>>> + .remove = __devexit_p(samsung_usbphy_remove),
>>> + .id_table = samsung_usbphy_driver_ids,
>>> + .driver = {
>>> + .name = "samsung-usbphy",
>>> + .owner = THIS_MODULE,
>>> + .of_match_table = samsung_usbphy_dt_match,
>>> + },
>>> +};
>>> +
>>> +module_platform_driver(samsung_usbphy_driver);
>>> +
>>> +MODULE_DESCRIPTION("Samsung USB phy controller");
>>> +MODULE_AUTHOR("Praveen Paneri <p.paneri@samsung.com>");
>>> +MODULE_LICENSE("GPL");
>>> +MODULE_ALIAS("platform:samsung-usbphy");
>>> diff --git a/include/linux/platform_data/samsung-usbphy.h b/include/linux/platform_data/samsung-usbphy.h
>>> new file mode 100644
>>> index 0000000..1bd24cb
>>> --- /dev/null
>>> +++ b/include/linux/platform_data/samsung-usbphy.h
>>> @@ -0,0 +1,27 @@
>>> +/*
>>> + * Copyright (C) 2012 Samsung Electronics Co.Ltd
>>> + * http://www.samsung.com/
>>> + * Author: Praveen Paneri <p.paneri@samsung.com>
>>> + *
>>> + * Defines platform data for samsung usb phy driver.
>>> + *
>>> + * This program is free software; you can redistribute it and/or modify it
>>> + * under the terms of the GNU General Public License as published by the
>>> + * Free Software Foundation; either version 2 of the License, or (at your
>>> + * option) any later version.
>>> + */
>>> +
>>> +#ifndef __SAMSUNG_USBPHY_PLATFORM_H
>>> +#define __SAMSUNG_USBPHY_PLATFORM_H
>>> +
>>> +/**
>>> + * samsung_usbphy_data - Platform data for USB PHY driver.
>>> + * @pmu_isolation: Function to control usb phy isolation in PMU.
>>> + */
>>> +struct samsung_usbphy_data {
>>> + void (*pmu_isolation)(int on);
>>> +};
>>> +
>>> +extern void samsung_usbphy_set_pdata(struct samsung_usbphy_data *pd);
>>> +
>>> +#endif /* __SAMSUNG_USBPHY_PLATFORM_H */
>>> --
>>> 1.7.1
>>>
>>> --
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>>> the body of a message to majordomo at vger.kernel.org
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>> --
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>>
>
>
> --
> Pengutronix e.K. | Marc Kleine-Budde |
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>
^ permalink raw reply [flat|nested] 27+ messages in thread* [PATCH 1/5] usb: phy: samsung: Introducing usb phy driver for hsotg
2012-09-26 7:22 ` Praveen Paneri
@ 2012-10-03 9:26 ` Praveen Paneri
2012-10-12 10:15 ` [PATCH] " Praveen Paneri
0 siblings, 1 reply; 27+ messages in thread
From: Praveen Paneri @ 2012-10-03 9:26 UTC (permalink / raw)
To: linux-arm-kernel
>From v6:
Added TODO for phy bindings with controller
Dropped platform_set_drvdata() from driver probe
This driver uses usb_phy interface to interact with s3c-hsotg. Supports
phy_init and phy_shutdown functions to enable/disable phy. Tested with
smdk6410 and smdkv310. More SoCs can be brought under later.
Signed-off-by: Praveen Paneri <p.paneri@samsung.com>
Acked-by: Heiko Stuebner <heiko@sntech.de>
---
.../devicetree/bindings/usb/samsung-usbphy.txt | 11 +
drivers/usb/phy/Kconfig | 8 +
drivers/usb/phy/Makefile | 1 +
drivers/usb/phy/samsung-usbphy.c | 355 ++++++++++++++++++++
include/linux/platform_data/samsung-usbphy.h | 27 ++
5 files changed, 402 insertions(+), 0 deletions(-)
create mode 100644 Documentation/devicetree/bindings/usb/samsung-usbphy.txt
create mode 100644 drivers/usb/phy/samsung-usbphy.c
create mode 100644 include/linux/platform_data/samsung-usbphy.h
diff --git a/Documentation/devicetree/bindings/usb/samsung-usbphy.txt b/Documentation/devicetree/bindings/usb/samsung-usbphy.txt
new file mode 100644
index 0000000..7d54d59
--- /dev/null
+++ b/Documentation/devicetree/bindings/usb/samsung-usbphy.txt
@@ -0,0 +1,11 @@
+* Samsung's usb phy transceiver
+
+The Samsung's phy transceiver is used for controlling usb otg phy for
+s3c-hsotg usb device controller.
+TODO: Adding the PHY binding with controller(s) according to the under
+developement generic PHY driver.
+
+Required properties:
+- compatible : should be "samsung,exynos4210-usbphy"
+- reg : base physical address of the phy registers and length of memory mapped
+ region.
diff --git a/drivers/usb/phy/Kconfig b/drivers/usb/phy/Kconfig
index 63c339b..313685f 100644
--- a/drivers/usb/phy/Kconfig
+++ b/drivers/usb/phy/Kconfig
@@ -32,3 +32,11 @@ config MV_U3D_PHY
help
Enable this to support Marvell USB 3.0 phy controller for Marvell
SoC.
+
+config SAMSUNG_USBPHY
+ bool "Samsung USB PHY controller Driver"
+ depends on USB_S3C_HSOTG
+ select USB_OTG_UTILS
+ help
+ Enable this to support Samsung USB phy controller for samsung
+ SoCs.
diff --git a/drivers/usb/phy/Makefile b/drivers/usb/phy/Makefile
index b069f29..55dcfc1 100644
--- a/drivers/usb/phy/Makefile
+++ b/drivers/usb/phy/Makefile
@@ -8,3 +8,4 @@ obj-$(CONFIG_OMAP_USB2) += omap-usb2.o
obj-$(CONFIG_USB_ISP1301) += isp1301.o
obj-$(CONFIG_MV_U3D_PHY) += mv_u3d_phy.o
obj-$(CONFIG_USB_EHCI_TEGRA) += tegra_usb_phy.o
+obj-$(CONFIG_SAMSUNG_USBPHY) += samsung-usbphy.o
diff --git a/drivers/usb/phy/samsung-usbphy.c b/drivers/usb/phy/samsung-usbphy.c
new file mode 100644
index 0000000..ee2dee0
--- /dev/null
+++ b/drivers/usb/phy/samsung-usbphy.c
@@ -0,0 +1,355 @@
+/* linux/drivers/usb/phy/samsung-usbphy.c
+ *
+ * Copyright (c) 2012 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
+ *
+ * Author: Praveen Paneri <p.paneri@samsung.com>
+ *
+ * Samsung USB2.0 High-speed OTG transceiver, talks to S3C HS OTG controller
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/module.h>
+#include <linux/platform_device.h>
+#include <linux/clk.h>
+#include <linux/delay.h>
+#include <linux/err.h>
+#include <linux/io.h>
+#include <linux/of.h>
+#include <linux/usb/otg.h>
+#include <linux/platform_data/samsung-usbphy.h>
+
+/* Register definitions */
+
+#define S3C_PHYPWR (0x00)
+
+#define S3C_PHYPWR_NORMAL_MASK (0x19 << 0)
+#define S3C_PHYPWR_OTG_DISABLE (1 << 4)
+#define S3C_PHYPWR_ANALOG_POWERDOWN (1 << 3)
+#define S3C_PHYPWR_FORCE_SUSPEND (1 << 1)
+/* For Exynos4 */
+#define EXYNOS4_PHYPWR_NORMAL_MASK (0x39 << 0)
+#define EXYNOS4_PHYPWR_SLEEP (1 << 5)
+
+#define S3C_PHYCLK (0x04)
+
+#define S3C_PHYCLK_MODE_SERIAL (1 << 6)
+#define S3C_PHYCLK_EXT_OSC (1 << 5)
+#define S3C_PHYCLK_COMMON_ON_N (1 << 4)
+#define S3C_PHYCLK_ID_PULL (1 << 2)
+#define S3C_PHYCLK_CLKSEL_MASK (0x3 << 0)
+#define S3C_PHYCLK_CLKSEL_SHIFT (0)
+#define S3C_PHYCLK_CLKSEL_48M (0x0 << 0)
+#define S3C_PHYCLK_CLKSEL_12M (0x2 << 0)
+#define S3C_PHYCLK_CLKSEL_24M (0x3 << 0)
+
+#define S3C_RSTCON (0x08)
+
+#define S3C_RSTCON_PHYCLK (1 << 2)
+#define S3C_RSTCON_HCLK (1 << 1)
+#define S3C_RSTCON_PHY (1 << 0)
+
+#ifndef MHZ
+#define MHZ (1000*1000)
+#endif
+
+enum samsung_cpu_type {
+ TYPE_S3C64XX,
+ TYPE_EXYNOS4210,
+};
+
+/*
+ * struct samsung_usbphy - transceiver driver state
+ * @phy: transceiver structure
+ * @plat: platform data
+ * @dev: The parent device supplied to the probe function
+ * @clk: usb phy clock
+ * @regs: usb phy register memory base
+ * @ref_clk_freq: reference clock frequency selection
+ * @cpu_type: machine identifier
+ */
+struct samsung_usbphy {
+ struct usb_phy phy;
+ struct samsung_usbphy_data *plat;
+ struct device *dev;
+ struct clk *clk;
+ void __iomem *regs;
+ int ref_clk_freq;
+ int cpu_type;
+};
+
+#define phy_to_sphy(x) container_of((x), struct samsung_usbphy, phy)
+
+/*
+ * Returns reference clock frequency selection value
+ */
+static int samsung_usbphy_get_refclk_freq(struct samsung_usbphy *sphy)
+{
+ struct clk *ref_clk;
+ int refclk_freq = 0;
+
+ ref_clk = clk_get(sphy->dev, "xusbxti");
+ if (IS_ERR(ref_clk)) {
+ dev_err(sphy->dev, "Failed to get reference clock\n");
+ return PTR_ERR(ref_clk);
+ }
+
+ switch (clk_get_rate(ref_clk)) {
+ case 12 * MHZ:
+ refclk_freq |= S3C_PHYCLK_CLKSEL_12M;
+ break;
+ case 24 * MHZ:
+ refclk_freq |= S3C_PHYCLK_CLKSEL_24M;
+ break;
+ default:
+ case 48 * MHZ:
+ /* default reference clock */
+ refclk_freq |= S3C_PHYCLK_CLKSEL_48M;
+ break;
+ }
+ clk_put(ref_clk);
+
+ return refclk_freq;
+}
+
+static void samsung_usbphy_enable(struct samsung_usbphy *sphy)
+{
+ void __iomem *regs = sphy->regs;
+ u32 phypwr;
+ u32 phyclk;
+ u32 rstcon;
+
+ /* set clock frequency for PLL */
+ phyclk = sphy->ref_clk_freq;
+ phypwr = readl(regs + S3C_PHYPWR);
+ rstcon = readl(regs + S3C_RSTCON);
+
+ switch (sphy->cpu_type) {
+ case TYPE_S3C64XX:
+ phyclk &= ~(S3C_PHYCLK_COMMON_ON_N);
+ phypwr &= ~S3C_PHYPWR_NORMAL_MASK;
+ rstcon |= S3C_RSTCON_PHY;
+ break;
+ case TYPE_EXYNOS4210:
+ phypwr &= ~EXYNOS4_PHYPWR_NORMAL_MASK;
+ rstcon |= S3C_RSTCON_PHY;
+ default:
+ break;
+ }
+
+ writel(phyclk, regs + S3C_PHYCLK);
+ /* set to normal of PHY0 */
+ writel(phypwr, regs + S3C_PHYPWR);
+ /* reset all ports of PHY and Link */
+ writel(rstcon, regs + S3C_RSTCON);
+ udelay(10);
+ rstcon &= ~S3C_RSTCON_PHY;
+ writel(rstcon, regs + S3C_RSTCON);
+}
+
+static void samsung_usbphy_disable(struct samsung_usbphy *sphy)
+{
+ void __iomem *regs = sphy->regs;
+ u32 phypwr;
+
+ phypwr = readl(regs + S3C_PHYPWR);
+
+ switch (sphy->cpu_type) {
+ case TYPE_S3C64XX:
+ phypwr |= S3C_PHYPWR_NORMAL_MASK;
+ break;
+ case TYPE_EXYNOS4210:
+ phypwr |= EXYNOS4_PHYPWR_NORMAL_MASK;
+ default:
+ break;
+ }
+
+ /* unset to normal of PHY0 */
+ writel(phypwr, regs + S3C_PHYPWR);
+}
+
+/*
+ * The function passed to the usb driver for phy initialization
+ */
+static int samsung_usbphy_init(struct usb_phy *phy)
+{
+ struct samsung_usbphy *sphy;
+ int ret = 0;
+
+ sphy = phy_to_sphy(phy);
+
+ /* Enable the phy clock */
+ ret = clk_prepare_enable(sphy->clk);
+ if (ret) {
+ dev_err(sphy->dev, "%s: clk_prepare_enable failed\n", __func__);
+ return ret;
+ }
+
+ /* Disable phy isolation */
+ if (sphy->plat && sphy->plat->pmu_isolation)
+ sphy->plat->pmu_isolation(false);
+
+ /* Initialize usb phy registers */
+ samsung_usbphy_enable(sphy);
+
+ /* Disable the phy clock */
+ clk_disable_unprepare(sphy->clk);
+ return ret;
+}
+
+/*
+ * The function passed to the usb driver for phy shutdown
+ */
+static void samsung_usbphy_shutdown(struct usb_phy *phy)
+{
+ struct samsung_usbphy *sphy;
+
+ sphy = phy_to_sphy(phy);
+
+ if (clk_prepare_enable(sphy->clk)) {
+ dev_err(sphy->dev, "%s: clk_prepare_enable failed\n", __func__);
+ return;
+ }
+
+ /* De-initialize usb phy registers */
+ samsung_usbphy_disable(sphy);
+
+ /* Enable phy isolation */
+ if (sphy->plat && sphy->plat->pmu_isolation)
+ sphy->plat->pmu_isolation(true);
+
+ clk_disable_unprepare(sphy->clk);
+}
+
+static const struct of_device_id samsung_usbphy_dt_match[];
+
+static inline int samsung_usbphy_get_driver_data(struct platform_device *pdev)
+{
+ if (IS_ENABLED(CONFIG_OF) && pdev->dev.of_node) {
+ int data;
+ const struct of_device_id *match;
+ match = of_match_node(samsung_usbphy_dt_match,
+ pdev->dev.of_node);
+ data = (int) match->data;
+ return data;
+ }
+
+ return platform_get_device_id(pdev)->driver_data;
+}
+
+static int __devinit samsung_usbphy_probe(struct platform_device *pdev)
+{
+ struct samsung_usbphy *sphy;
+ struct samsung_usbphy_data *pdata;
+ struct device *dev = &pdev->dev;
+ struct resource *phy_mem;
+ void __iomem *phy_base;
+ struct clk *clk;
+ int ret = 0;
+
+ pdata = pdev->dev.platform_data;
+ if (!pdata) {
+ dev_err(&pdev->dev, "%s: no platform data defined\n", __func__);
+ return -EINVAL;
+ }
+
+ phy_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ if (!phy_mem) {
+ dev_err(dev, "%s: missing mem resource\n", __func__);
+ return -ENODEV;
+ }
+
+ phy_base = devm_request_and_ioremap(dev, phy_mem);
+ if (!phy_base) {
+ dev_err(dev, "%s: register mapping failed\n", __func__);
+ return -ENXIO;
+ }
+
+ sphy = devm_kzalloc(dev, sizeof(*sphy), GFP_KERNEL);
+ if (!sphy)
+ return -ENOMEM;
+
+ clk = devm_clk_get(dev, "otg");
+ if (IS_ERR(clk)) {
+ dev_err(dev, "Failed to get otg clock\n");
+ return PTR_ERR(clk);
+ }
+
+ sphy->dev = &pdev->dev;
+ sphy->plat = pdata;
+ sphy->regs = phy_base;
+ sphy->clk = clk;
+ sphy->phy.dev = sphy->dev;
+ sphy->phy.label = "samsung-usbphy";
+ sphy->phy.init = samsung_usbphy_init;
+ sphy->phy.shutdown = samsung_usbphy_shutdown;
+ sphy->cpu_type = samsung_usbphy_get_driver_data(pdev);
+ sphy->ref_clk_freq = samsung_usbphy_get_refclk_freq(sphy);
+
+ ret = usb_add_phy(&sphy->phy, USB_PHY_TYPE_USB2);
+ return ret;
+}
+
+static int __exit samsung_usbphy_remove(struct platform_device *pdev)
+{
+ struct samsung_usbphy *sphy = platform_get_drvdata(pdev);
+
+ usb_remove_phy(&sphy->phy);
+
+ return 0;
+}
+
+#ifdef CONFIG_OF
+static const struct of_device_id samsung_usbphy_dt_match[] = {
+ {
+ .compatible = "samsung,s3c64xx-usbphy",
+ .data = (void *)TYPE_S3C64XX,
+ }, {
+ .compatible = "samsung,exynos4210-usbphy",
+ .data = (void *)TYPE_EXYNOS4210,
+ },
+ {},
+};
+MODULE_DEVICE_TABLE(of, samsung_usbphy_dt_match);
+#else
+#define samsung_usbphy_dt_match NULL
+#endif
+
+static struct platform_device_id samsung_usbphy_driver_ids[] = {
+ {
+ .name = "s3c64xx-usbphy",
+ .driver_data = TYPE_S3C64XX,
+ }, {
+ .name = "exynos4210-usbphy",
+ .driver_data = TYPE_EXYNOS4210,
+ },
+ {},
+};
+
+MODULE_DEVICE_TABLE(platform, samsung_usbphy_driver_ids);
+
+static struct platform_driver samsung_usbphy_driver = {
+ .probe = samsung_usbphy_probe,
+ .remove = __devexit_p(samsung_usbphy_remove),
+ .id_table = samsung_usbphy_driver_ids,
+ .driver = {
+ .name = "samsung-usbphy",
+ .owner = THIS_MODULE,
+ .of_match_table = samsung_usbphy_dt_match,
+ },
+};
+
+module_platform_driver(samsung_usbphy_driver);
+
+MODULE_DESCRIPTION("Samsung USB phy controller");
+MODULE_AUTHOR("Praveen Paneri <p.paneri@samsung.com>");
+MODULE_LICENSE("GPL");
+MODULE_ALIAS("platform:samsung-usbphy");
diff --git a/include/linux/platform_data/samsung-usbphy.h b/include/linux/platform_data/samsung-usbphy.h
new file mode 100644
index 0000000..1bd24cb
--- /dev/null
+++ b/include/linux/platform_data/samsung-usbphy.h
@@ -0,0 +1,27 @@
+/*
+ * Copyright (C) 2012 Samsung Electronics Co.Ltd
+ * http://www.samsung.com/
+ * Author: Praveen Paneri <p.paneri@samsung.com>
+ *
+ * Defines platform data for samsung usb phy driver.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+
+#ifndef __SAMSUNG_USBPHY_PLATFORM_H
+#define __SAMSUNG_USBPHY_PLATFORM_H
+
+/**
+ * samsung_usbphy_data - Platform data for USB PHY driver.
+ * @pmu_isolation: Function to control usb phy isolation in PMU.
+ */
+struct samsung_usbphy_data {
+ void (*pmu_isolation)(int on);
+};
+
+extern void samsung_usbphy_set_pdata(struct samsung_usbphy_data *pd);
+
+#endif /* __SAMSUNG_USBPHY_PLATFORM_H */
--
1.7.1
^ permalink raw reply related [flat|nested] 27+ messages in thread* [PATCH] usb: phy: samsung: Introducing usb phy driver for hsotg
2012-10-03 9:26 ` [PATCH " Praveen Paneri
@ 2012-10-12 10:15 ` Praveen Paneri
2012-10-15 13:28 ` Felipe Balbi
2012-10-17 11:00 ` Kukjin Kim
0 siblings, 2 replies; 27+ messages in thread
From: Praveen Paneri @ 2012-10-12 10:15 UTC (permalink / raw)
To: linux-arm-kernel
platform_set_drvdata() required for driver's remove function, so adding
it back.
>From v6:
Added TODO for phy bindings with controller
Dropped platform_set_drvdata() from driver probe
This driver uses usb_phy interface to interact with s3c-hsotg. Supports
phy_init and phy_shutdown functions to enable/disable phy. Tested with
smdk6410 and smdkv310. More SoCs can be brought under later.
Signed-off-by: Praveen Paneri <p.paneri@samsung.com>
Acked-by: Heiko Stuebner <heiko@sntech.de>
---
.../devicetree/bindings/usb/samsung-usbphy.txt | 11 +
drivers/usb/phy/Kconfig | 8 +
drivers/usb/phy/Makefile | 1 +
drivers/usb/phy/samsung-usbphy.c | 357 ++++++++++++++++++++
include/linux/platform_data/samsung-usbphy.h | 27 ++
5 files changed, 404 insertions(+), 0 deletions(-)
create mode 100644 Documentation/devicetree/bindings/usb/samsung-usbphy.txt
create mode 100644 drivers/usb/phy/samsung-usbphy.c
create mode 100644 include/linux/platform_data/samsung-usbphy.h
diff --git a/Documentation/devicetree/bindings/usb/samsung-usbphy.txt b/Documentation/devicetree/bindings/usb/samsung-usbphy.txt
new file mode 100644
index 0000000..7b26e2d
--- /dev/null
+++ b/Documentation/devicetree/bindings/usb/samsung-usbphy.txt
@@ -0,0 +1,11 @@
+* Samsung's usb phy transceiver
+
+The Samsung's phy transceiver is used for controlling usb otg phy for
+s3c-hsotg usb device controller.
+TODO: Adding the PHY binding with controller(s) according to the under
+developement generic PHY driver.
+
+Required properties:
+- compatible : should be "samsung,exynos4210-usbphy"
+- reg : base physical address of the phy registers and length of memory mapped
+ region.
diff --git a/drivers/usb/phy/Kconfig b/drivers/usb/phy/Kconfig
index 63c339b..313685f 100644
--- a/drivers/usb/phy/Kconfig
+++ b/drivers/usb/phy/Kconfig
@@ -32,3 +32,11 @@ config MV_U3D_PHY
help
Enable this to support Marvell USB 3.0 phy controller for Marvell
SoC.
+
+config SAMSUNG_USBPHY
+ bool "Samsung USB PHY controller Driver"
+ depends on USB_S3C_HSOTG
+ select USB_OTG_UTILS
+ help
+ Enable this to support Samsung USB phy controller for samsung
+ SoCs.
diff --git a/drivers/usb/phy/Makefile b/drivers/usb/phy/Makefile
index b069f29..55dcfc1 100644
--- a/drivers/usb/phy/Makefile
+++ b/drivers/usb/phy/Makefile
@@ -8,3 +8,4 @@ obj-$(CONFIG_OMAP_USB2) += omap-usb2.o
obj-$(CONFIG_USB_ISP1301) += isp1301.o
obj-$(CONFIG_MV_U3D_PHY) += mv_u3d_phy.o
obj-$(CONFIG_USB_EHCI_TEGRA) += tegra_usb_phy.o
+obj-$(CONFIG_SAMSUNG_USBPHY) += samsung-usbphy.o
diff --git a/drivers/usb/phy/samsung-usbphy.c b/drivers/usb/phy/samsung-usbphy.c
new file mode 100644
index 0000000..14c182f
--- /dev/null
+++ b/drivers/usb/phy/samsung-usbphy.c
@@ -0,0 +1,357 @@
+/* linux/drivers/usb/phy/samsung-usbphy.c
+ *
+ * Copyright (c) 2012 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
+ *
+ * Author: Praveen Paneri <p.paneri@samsung.com>
+ *
+ * Samsung USB2.0 High-speed OTG transceiver, talks to S3C HS OTG controller
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/module.h>
+#include <linux/platform_device.h>
+#include <linux/clk.h>
+#include <linux/delay.h>
+#include <linux/err.h>
+#include <linux/io.h>
+#include <linux/of.h>
+#include <linux/usb/otg.h>
+#include <linux/platform_data/samsung-usbphy.h>
+
+/* Register definitions */
+
+#define S3C_PHYPWR (0x00)
+
+#define S3C_PHYPWR_NORMAL_MASK (0x19 << 0)
+#define S3C_PHYPWR_OTG_DISABLE (1 << 4)
+#define S3C_PHYPWR_ANALOG_POWERDOWN (1 << 3)
+#define S3C_PHYPWR_FORCE_SUSPEND (1 << 1)
+/* For Exynos4 */
+#define EXYNOS4_PHYPWR_NORMAL_MASK (0x39 << 0)
+#define EXYNOS4_PHYPWR_SLEEP (1 << 5)
+
+#define S3C_PHYCLK (0x04)
+
+#define S3C_PHYCLK_MODE_SERIAL (1 << 6)
+#define S3C_PHYCLK_EXT_OSC (1 << 5)
+#define S3C_PHYCLK_COMMON_ON_N (1 << 4)
+#define S3C_PHYCLK_ID_PULL (1 << 2)
+#define S3C_PHYCLK_CLKSEL_MASK (0x3 << 0)
+#define S3C_PHYCLK_CLKSEL_SHIFT (0)
+#define S3C_PHYCLK_CLKSEL_48M (0x0 << 0)
+#define S3C_PHYCLK_CLKSEL_12M (0x2 << 0)
+#define S3C_PHYCLK_CLKSEL_24M (0x3 << 0)
+
+#define S3C_RSTCON (0x08)
+
+#define S3C_RSTCON_PHYCLK (1 << 2)
+#define S3C_RSTCON_HCLK (1 << 1)
+#define S3C_RSTCON_PHY (1 << 0)
+
+#ifndef MHZ
+#define MHZ (1000*1000)
+#endif
+
+enum samsung_cpu_type {
+ TYPE_S3C64XX,
+ TYPE_EXYNOS4210,
+};
+
+/*
+ * struct samsung_usbphy - transceiver driver state
+ * @phy: transceiver structure
+ * @plat: platform data
+ * @dev: The parent device supplied to the probe function
+ * @clk: usb phy clock
+ * @regs: usb phy register memory base
+ * @ref_clk_freq: reference clock frequency selection
+ * @cpu_type: machine identifier
+ */
+struct samsung_usbphy {
+ struct usb_phy phy;
+ struct samsung_usbphy_data *plat;
+ struct device *dev;
+ struct clk *clk;
+ void __iomem *regs;
+ int ref_clk_freq;
+ int cpu_type;
+};
+
+#define phy_to_sphy(x) container_of((x), struct samsung_usbphy, phy)
+
+/*
+ * Returns reference clock frequency selection value
+ */
+static int samsung_usbphy_get_refclk_freq(struct samsung_usbphy *sphy)
+{
+ struct clk *ref_clk;
+ int refclk_freq = 0;
+
+ ref_clk = clk_get(sphy->dev, "xusbxti");
+ if (IS_ERR(ref_clk)) {
+ dev_err(sphy->dev, "Failed to get reference clock\n");
+ return PTR_ERR(ref_clk);
+ }
+
+ switch (clk_get_rate(ref_clk)) {
+ case 12 * MHZ:
+ refclk_freq |= S3C_PHYCLK_CLKSEL_12M;
+ break;
+ case 24 * MHZ:
+ refclk_freq |= S3C_PHYCLK_CLKSEL_24M;
+ break;
+ default:
+ case 48 * MHZ:
+ /* default reference clock */
+ refclk_freq |= S3C_PHYCLK_CLKSEL_48M;
+ break;
+ }
+ clk_put(ref_clk);
+
+ return refclk_freq;
+}
+
+static void samsung_usbphy_enable(struct samsung_usbphy *sphy)
+{
+ void __iomem *regs = sphy->regs;
+ u32 phypwr;
+ u32 phyclk;
+ u32 rstcon;
+
+ /* set clock frequency for PLL */
+ phyclk = sphy->ref_clk_freq;
+ phypwr = readl(regs + S3C_PHYPWR);
+ rstcon = readl(regs + S3C_RSTCON);
+
+ switch (sphy->cpu_type) {
+ case TYPE_S3C64XX:
+ phyclk &= ~(S3C_PHYCLK_COMMON_ON_N);
+ phypwr &= ~S3C_PHYPWR_NORMAL_MASK;
+ rstcon |= S3C_RSTCON_PHY;
+ break;
+ case TYPE_EXYNOS4210:
+ phypwr &= ~EXYNOS4_PHYPWR_NORMAL_MASK;
+ rstcon |= S3C_RSTCON_PHY;
+ default:
+ break;
+ }
+
+ writel(phyclk, regs + S3C_PHYCLK);
+ /* set to normal of PHY0 */
+ writel(phypwr, regs + S3C_PHYPWR);
+ /* reset all ports of PHY and Link */
+ writel(rstcon, regs + S3C_RSTCON);
+ udelay(10);
+ rstcon &= ~S3C_RSTCON_PHY;
+ writel(rstcon, regs + S3C_RSTCON);
+}
+
+static void samsung_usbphy_disable(struct samsung_usbphy *sphy)
+{
+ void __iomem *regs = sphy->regs;
+ u32 phypwr;
+
+ phypwr = readl(regs + S3C_PHYPWR);
+
+ switch (sphy->cpu_type) {
+ case TYPE_S3C64XX:
+ phypwr |= S3C_PHYPWR_NORMAL_MASK;
+ break;
+ case TYPE_EXYNOS4210:
+ phypwr |= EXYNOS4_PHYPWR_NORMAL_MASK;
+ default:
+ break;
+ }
+
+ /* unset to normal of PHY0 */
+ writel(phypwr, regs + S3C_PHYPWR);
+}
+
+/*
+ * The function passed to the usb driver for phy initialization
+ */
+static int samsung_usbphy_init(struct usb_phy *phy)
+{
+ struct samsung_usbphy *sphy;
+ int ret = 0;
+
+ sphy = phy_to_sphy(phy);
+
+ /* Enable the phy clock */
+ ret = clk_prepare_enable(sphy->clk);
+ if (ret) {
+ dev_err(sphy->dev, "%s: clk_prepare_enable failed\n", __func__);
+ return ret;
+ }
+
+ /* Disable phy isolation */
+ if (sphy->plat && sphy->plat->pmu_isolation)
+ sphy->plat->pmu_isolation(false);
+
+ /* Initialize usb phy registers */
+ samsung_usbphy_enable(sphy);
+
+ /* Disable the phy clock */
+ clk_disable_unprepare(sphy->clk);
+ return ret;
+}
+
+/*
+ * The function passed to the usb driver for phy shutdown
+ */
+static void samsung_usbphy_shutdown(struct usb_phy *phy)
+{
+ struct samsung_usbphy *sphy;
+
+ sphy = phy_to_sphy(phy);
+
+ if (clk_prepare_enable(sphy->clk)) {
+ dev_err(sphy->dev, "%s: clk_prepare_enable failed\n", __func__);
+ return;
+ }
+
+ /* De-initialize usb phy registers */
+ samsung_usbphy_disable(sphy);
+
+ /* Enable phy isolation */
+ if (sphy->plat && sphy->plat->pmu_isolation)
+ sphy->plat->pmu_isolation(true);
+
+ clk_disable_unprepare(sphy->clk);
+}
+
+static const struct of_device_id samsung_usbphy_dt_match[];
+
+static inline int samsung_usbphy_get_driver_data(struct platform_device *pdev)
+{
+ if (IS_ENABLED(CONFIG_OF) && pdev->dev.of_node) {
+ int data;
+ const struct of_device_id *match;
+ match = of_match_node(samsung_usbphy_dt_match,
+ pdev->dev.of_node);
+ data = (int) match->data;
+ return data;
+ }
+
+ return platform_get_device_id(pdev)->driver_data;
+}
+
+static int __devinit samsung_usbphy_probe(struct platform_device *pdev)
+{
+ struct samsung_usbphy *sphy;
+ struct samsung_usbphy_data *pdata;
+ struct device *dev = &pdev->dev;
+ struct resource *phy_mem;
+ void __iomem *phy_base;
+ struct clk *clk;
+ int ret = 0;
+
+ pdata = pdev->dev.platform_data;
+ if (!pdata) {
+ dev_err(&pdev->dev, "%s: no platform data defined\n", __func__);
+ return -EINVAL;
+ }
+
+ phy_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ if (!phy_mem) {
+ dev_err(dev, "%s: missing mem resource\n", __func__);
+ return -ENODEV;
+ }
+
+ phy_base = devm_request_and_ioremap(dev, phy_mem);
+ if (!phy_base) {
+ dev_err(dev, "%s: register mapping failed\n", __func__);
+ return -ENXIO;
+ }
+
+ sphy = devm_kzalloc(dev, sizeof(*sphy), GFP_KERNEL);
+ if (!sphy)
+ return -ENOMEM;
+
+ clk = devm_clk_get(dev, "otg");
+ if (IS_ERR(clk)) {
+ dev_err(dev, "Failed to get otg clock\n");
+ return PTR_ERR(clk);
+ }
+
+ sphy->dev = &pdev->dev;
+ sphy->plat = pdata;
+ sphy->regs = phy_base;
+ sphy->clk = clk;
+ sphy->phy.dev = sphy->dev;
+ sphy->phy.label = "samsung-usbphy";
+ sphy->phy.init = samsung_usbphy_init;
+ sphy->phy.shutdown = samsung_usbphy_shutdown;
+ sphy->cpu_type = samsung_usbphy_get_driver_data(pdev);
+ sphy->ref_clk_freq = samsung_usbphy_get_refclk_freq(sphy);
+
+ platform_set_drvdata(pdev, sphy);
+
+ ret = usb_add_phy(&sphy->phy, USB_PHY_TYPE_USB2);
+ return ret;
+}
+
+static int __exit samsung_usbphy_remove(struct platform_device *pdev)
+{
+ struct samsung_usbphy *sphy = platform_get_drvdata(pdev);
+
+ usb_remove_phy(&sphy->phy);
+
+ return 0;
+}
+
+#ifdef CONFIG_OF
+static const struct of_device_id samsung_usbphy_dt_match[] = {
+ {
+ .compatible = "samsung,s3c64xx-usbphy",
+ .data = (void *)TYPE_S3C64XX,
+ }, {
+ .compatible = "samsung,exynos4210-usbphy",
+ .data = (void *)TYPE_EXYNOS4210,
+ },
+ {},
+};
+MODULE_DEVICE_TABLE(of, samsung_usbphy_dt_match);
+#else
+#define samsung_usbphy_dt_match NULL
+#endif
+
+static struct platform_device_id samsung_usbphy_driver_ids[] = {
+ {
+ .name = "s3c64xx-usbphy",
+ .driver_data = TYPE_S3C64XX,
+ }, {
+ .name = "exynos4210-usbphy",
+ .driver_data = TYPE_EXYNOS4210,
+ },
+ {},
+};
+
+MODULE_DEVICE_TABLE(platform, samsung_usbphy_driver_ids);
+
+static struct platform_driver samsung_usbphy_driver = {
+ .probe = samsung_usbphy_probe,
+ .remove = __devexit_p(samsung_usbphy_remove),
+ .id_table = samsung_usbphy_driver_ids,
+ .driver = {
+ .name = "samsung-usbphy",
+ .owner = THIS_MODULE,
+ .of_match_table = samsung_usbphy_dt_match,
+ },
+};
+
+module_platform_driver(samsung_usbphy_driver);
+
+MODULE_DESCRIPTION("Samsung USB phy controller");
+MODULE_AUTHOR("Praveen Paneri <p.paneri@samsung.com>");
+MODULE_LICENSE("GPL");
+MODULE_ALIAS("platform:samsung-usbphy");
diff --git a/include/linux/platform_data/samsung-usbphy.h b/include/linux/platform_data/samsung-usbphy.h
new file mode 100644
index 0000000..1bd24cb
--- /dev/null
+++ b/include/linux/platform_data/samsung-usbphy.h
@@ -0,0 +1,27 @@
+/*
+ * Copyright (C) 2012 Samsung Electronics Co.Ltd
+ * http://www.samsung.com/
+ * Author: Praveen Paneri <p.paneri@samsung.com>
+ *
+ * Defines platform data for samsung usb phy driver.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+
+#ifndef __SAMSUNG_USBPHY_PLATFORM_H
+#define __SAMSUNG_USBPHY_PLATFORM_H
+
+/**
+ * samsung_usbphy_data - Platform data for USB PHY driver.
+ * @pmu_isolation: Function to control usb phy isolation in PMU.
+ */
+struct samsung_usbphy_data {
+ void (*pmu_isolation)(int on);
+};
+
+extern void samsung_usbphy_set_pdata(struct samsung_usbphy_data *pd);
+
+#endif /* __SAMSUNG_USBPHY_PLATFORM_H */
--
1.7.1
^ permalink raw reply related [flat|nested] 27+ messages in thread* [PATCH] usb: phy: samsung: Introducing usb phy driver for hsotg
2012-10-12 10:15 ` [PATCH] " Praveen Paneri
@ 2012-10-15 13:28 ` Felipe Balbi
2012-10-15 13:44 ` Kyungmin Park
` (2 more replies)
2012-10-17 11:00 ` Kukjin Kim
1 sibling, 3 replies; 27+ messages in thread
From: Felipe Balbi @ 2012-10-15 13:28 UTC (permalink / raw)
To: linux-arm-kernel
On Fri, Oct 12, 2012 at 03:45:34PM +0530, Praveen Paneri wrote:
> platform_set_drvdata() required for driver's remove function, so adding
> it back.
>
> From v6:
> Added TODO for phy bindings with controller
> Dropped platform_set_drvdata() from driver probe
>
> This driver uses usb_phy interface to interact with s3c-hsotg. Supports
> phy_init and phy_shutdown functions to enable/disable phy. Tested with
> smdk6410 and smdkv310. More SoCs can be brought under later.
>
this commit log needs improvement. There are stuff there which shouldn't
go to git's history.
I would like to get Tested-bys and Acked-by from DT maintainers.
> Signed-off-by: Praveen Paneri <p.paneri@samsung.com>
> Acked-by: Heiko Stuebner <heiko@sntech.de>
> ---
> .../devicetree/bindings/usb/samsung-usbphy.txt | 11 +
> drivers/usb/phy/Kconfig | 8 +
> drivers/usb/phy/Makefile | 1 +
> drivers/usb/phy/samsung-usbphy.c | 357 ++++++++++++++++++++
> include/linux/platform_data/samsung-usbphy.h | 27 ++
> 5 files changed, 404 insertions(+), 0 deletions(-)
> create mode 100644 Documentation/devicetree/bindings/usb/samsung-usbphy.txt
> create mode 100644 drivers/usb/phy/samsung-usbphy.c
> create mode 100644 include/linux/platform_data/samsung-usbphy.h
>
> diff --git a/Documentation/devicetree/bindings/usb/samsung-usbphy.txt b/Documentation/devicetree/bindings/usb/samsung-usbphy.txt
> new file mode 100644
> index 0000000..7b26e2d
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/usb/samsung-usbphy.txt
> @@ -0,0 +1,11 @@
> +* Samsung's usb phy transceiver
> +
> +The Samsung's phy transceiver is used for controlling usb otg phy for
> +s3c-hsotg usb device controller.
> +TODO: Adding the PHY binding with controller(s) according to the under
> +developement generic PHY driver.
> +
> +Required properties:
> +- compatible : should be "samsung,exynos4210-usbphy"
> +- reg : base physical address of the phy registers and length of memory mapped
> + region.
> diff --git a/drivers/usb/phy/Kconfig b/drivers/usb/phy/Kconfig
> index 63c339b..313685f 100644
> --- a/drivers/usb/phy/Kconfig
> +++ b/drivers/usb/phy/Kconfig
> @@ -32,3 +32,11 @@ config MV_U3D_PHY
> help
> Enable this to support Marvell USB 3.0 phy controller for Marvell
> SoC.
> +
> +config SAMSUNG_USBPHY
> + bool "Samsung USB PHY controller Driver"
> + depends on USB_S3C_HSOTG
> + select USB_OTG_UTILS
> + help
> + Enable this to support Samsung USB phy controller for samsung
> + SoCs.
> diff --git a/drivers/usb/phy/Makefile b/drivers/usb/phy/Makefile
> index b069f29..55dcfc1 100644
> --- a/drivers/usb/phy/Makefile
> +++ b/drivers/usb/phy/Makefile
> @@ -8,3 +8,4 @@ obj-$(CONFIG_OMAP_USB2) += omap-usb2.o
> obj-$(CONFIG_USB_ISP1301) += isp1301.o
> obj-$(CONFIG_MV_U3D_PHY) += mv_u3d_phy.o
> obj-$(CONFIG_USB_EHCI_TEGRA) += tegra_usb_phy.o
> +obj-$(CONFIG_SAMSUNG_USBPHY) += samsung-usbphy.o
> diff --git a/drivers/usb/phy/samsung-usbphy.c b/drivers/usb/phy/samsung-usbphy.c
> new file mode 100644
> index 0000000..14c182f
> --- /dev/null
> +++ b/drivers/usb/phy/samsung-usbphy.c
> @@ -0,0 +1,357 @@
> +/* linux/drivers/usb/phy/samsung-usbphy.c
> + *
> + * Copyright (c) 2012 Samsung Electronics Co., Ltd.
> + * http://www.samsung.com
> + *
> + * Author: Praveen Paneri <p.paneri@samsung.com>
> + *
> + * Samsung USB2.0 High-speed OTG transceiver, talks to S3C HS OTG controller
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + */
> +
> +#include <linux/module.h>
> +#include <linux/platform_device.h>
> +#include <linux/clk.h>
> +#include <linux/delay.h>
> +#include <linux/err.h>
> +#include <linux/io.h>
> +#include <linux/of.h>
> +#include <linux/usb/otg.h>
> +#include <linux/platform_data/samsung-usbphy.h>
> +
> +/* Register definitions */
> +
> +#define S3C_PHYPWR (0x00)
> +
> +#define S3C_PHYPWR_NORMAL_MASK (0x19 << 0)
> +#define S3C_PHYPWR_OTG_DISABLE (1 << 4)
> +#define S3C_PHYPWR_ANALOG_POWERDOWN (1 << 3)
> +#define S3C_PHYPWR_FORCE_SUSPEND (1 << 1)
> +/* For Exynos4 */
> +#define EXYNOS4_PHYPWR_NORMAL_MASK (0x39 << 0)
> +#define EXYNOS4_PHYPWR_SLEEP (1 << 5)
> +
> +#define S3C_PHYCLK (0x04)
> +
> +#define S3C_PHYCLK_MODE_SERIAL (1 << 6)
> +#define S3C_PHYCLK_EXT_OSC (1 << 5)
> +#define S3C_PHYCLK_COMMON_ON_N (1 << 4)
> +#define S3C_PHYCLK_ID_PULL (1 << 2)
> +#define S3C_PHYCLK_CLKSEL_MASK (0x3 << 0)
> +#define S3C_PHYCLK_CLKSEL_SHIFT (0)
> +#define S3C_PHYCLK_CLKSEL_48M (0x0 << 0)
> +#define S3C_PHYCLK_CLKSEL_12M (0x2 << 0)
> +#define S3C_PHYCLK_CLKSEL_24M (0x3 << 0)
> +
> +#define S3C_RSTCON (0x08)
> +
> +#define S3C_RSTCON_PHYCLK (1 << 2)
> +#define S3C_RSTCON_HCLK (1 << 1)
> +#define S3C_RSTCON_PHY (1 << 0)
> +
> +#ifndef MHZ
> +#define MHZ (1000*1000)
> +#endif
> +
> +enum samsung_cpu_type {
> + TYPE_S3C64XX,
> + TYPE_EXYNOS4210,
> +};
> +
> +/*
> + * struct samsung_usbphy - transceiver driver state
> + * @phy: transceiver structure
> + * @plat: platform data
> + * @dev: The parent device supplied to the probe function
> + * @clk: usb phy clock
> + * @regs: usb phy register memory base
> + * @ref_clk_freq: reference clock frequency selection
> + * @cpu_type: machine identifier
> + */
> +struct samsung_usbphy {
> + struct usb_phy phy;
> + struct samsung_usbphy_data *plat;
> + struct device *dev;
> + struct clk *clk;
> + void __iomem *regs;
> + int ref_clk_freq;
> + int cpu_type;
> +};
> +
> +#define phy_to_sphy(x) container_of((x), struct samsung_usbphy, phy)
> +
> +/*
> + * Returns reference clock frequency selection value
> + */
> +static int samsung_usbphy_get_refclk_freq(struct samsung_usbphy *sphy)
> +{
> + struct clk *ref_clk;
> + int refclk_freq = 0;
> +
> + ref_clk = clk_get(sphy->dev, "xusbxti");
> + if (IS_ERR(ref_clk)) {
> + dev_err(sphy->dev, "Failed to get reference clock\n");
> + return PTR_ERR(ref_clk);
> + }
> +
> + switch (clk_get_rate(ref_clk)) {
> + case 12 * MHZ:
> + refclk_freq |= S3C_PHYCLK_CLKSEL_12M;
> + break;
> + case 24 * MHZ:
> + refclk_freq |= S3C_PHYCLK_CLKSEL_24M;
> + break;
> + default:
> + case 48 * MHZ:
> + /* default reference clock */
> + refclk_freq |= S3C_PHYCLK_CLKSEL_48M;
> + break;
> + }
> + clk_put(ref_clk);
> +
> + return refclk_freq;
> +}
> +
> +static void samsung_usbphy_enable(struct samsung_usbphy *sphy)
> +{
> + void __iomem *regs = sphy->regs;
> + u32 phypwr;
> + u32 phyclk;
> + u32 rstcon;
> +
> + /* set clock frequency for PLL */
> + phyclk = sphy->ref_clk_freq;
> + phypwr = readl(regs + S3C_PHYPWR);
> + rstcon = readl(regs + S3C_RSTCON);
> +
> + switch (sphy->cpu_type) {
> + case TYPE_S3C64XX:
> + phyclk &= ~(S3C_PHYCLK_COMMON_ON_N);
> + phypwr &= ~S3C_PHYPWR_NORMAL_MASK;
> + rstcon |= S3C_RSTCON_PHY;
> + break;
> + case TYPE_EXYNOS4210:
> + phypwr &= ~EXYNOS4_PHYPWR_NORMAL_MASK;
> + rstcon |= S3C_RSTCON_PHY;
> + default:
> + break;
> + }
> +
> + writel(phyclk, regs + S3C_PHYCLK);
> + /* set to normal of PHY0 */
> + writel(phypwr, regs + S3C_PHYPWR);
> + /* reset all ports of PHY and Link */
> + writel(rstcon, regs + S3C_RSTCON);
> + udelay(10);
> + rstcon &= ~S3C_RSTCON_PHY;
> + writel(rstcon, regs + S3C_RSTCON);
> +}
> +
> +static void samsung_usbphy_disable(struct samsung_usbphy *sphy)
> +{
> + void __iomem *regs = sphy->regs;
> + u32 phypwr;
> +
> + phypwr = readl(regs + S3C_PHYPWR);
> +
> + switch (sphy->cpu_type) {
> + case TYPE_S3C64XX:
> + phypwr |= S3C_PHYPWR_NORMAL_MASK;
> + break;
> + case TYPE_EXYNOS4210:
> + phypwr |= EXYNOS4_PHYPWR_NORMAL_MASK;
> + default:
> + break;
> + }
> +
> + /* unset to normal of PHY0 */
> + writel(phypwr, regs + S3C_PHYPWR);
> +}
> +
> +/*
> + * The function passed to the usb driver for phy initialization
> + */
> +static int samsung_usbphy_init(struct usb_phy *phy)
> +{
> + struct samsung_usbphy *sphy;
> + int ret = 0;
> +
> + sphy = phy_to_sphy(phy);
> +
> + /* Enable the phy clock */
> + ret = clk_prepare_enable(sphy->clk);
> + if (ret) {
> + dev_err(sphy->dev, "%s: clk_prepare_enable failed\n", __func__);
> + return ret;
> + }
> +
> + /* Disable phy isolation */
> + if (sphy->plat && sphy->plat->pmu_isolation)
> + sphy->plat->pmu_isolation(false);
> +
> + /* Initialize usb phy registers */
> + samsung_usbphy_enable(sphy);
> +
> + /* Disable the phy clock */
> + clk_disable_unprepare(sphy->clk);
> + return ret;
> +}
> +
> +/*
> + * The function passed to the usb driver for phy shutdown
> + */
> +static void samsung_usbphy_shutdown(struct usb_phy *phy)
> +{
> + struct samsung_usbphy *sphy;
> +
> + sphy = phy_to_sphy(phy);
> +
> + if (clk_prepare_enable(sphy->clk)) {
> + dev_err(sphy->dev, "%s: clk_prepare_enable failed\n", __func__);
> + return;
> + }
> +
> + /* De-initialize usb phy registers */
> + samsung_usbphy_disable(sphy);
> +
> + /* Enable phy isolation */
> + if (sphy->plat && sphy->plat->pmu_isolation)
> + sphy->plat->pmu_isolation(true);
> +
> + clk_disable_unprepare(sphy->clk);
> +}
> +
> +static const struct of_device_id samsung_usbphy_dt_match[];
> +
> +static inline int samsung_usbphy_get_driver_data(struct platform_device *pdev)
> +{
> + if (IS_ENABLED(CONFIG_OF) && pdev->dev.of_node) {
> + int data;
> + const struct of_device_id *match;
> + match = of_match_node(samsung_usbphy_dt_match,
> + pdev->dev.of_node);
> + data = (int) match->data;
> + return data;
> + }
> +
> + return platform_get_device_id(pdev)->driver_data;
> +}
> +
> +static int __devinit samsung_usbphy_probe(struct platform_device *pdev)
> +{
> + struct samsung_usbphy *sphy;
> + struct samsung_usbphy_data *pdata;
> + struct device *dev = &pdev->dev;
> + struct resource *phy_mem;
> + void __iomem *phy_base;
> + struct clk *clk;
> + int ret = 0;
> +
> + pdata = pdev->dev.platform_data;
> + if (!pdata) {
> + dev_err(&pdev->dev, "%s: no platform data defined\n", __func__);
> + return -EINVAL;
> + }
> +
> + phy_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
> + if (!phy_mem) {
> + dev_err(dev, "%s: missing mem resource\n", __func__);
> + return -ENODEV;
> + }
> +
> + phy_base = devm_request_and_ioremap(dev, phy_mem);
> + if (!phy_base) {
> + dev_err(dev, "%s: register mapping failed\n", __func__);
> + return -ENXIO;
> + }
> +
> + sphy = devm_kzalloc(dev, sizeof(*sphy), GFP_KERNEL);
> + if (!sphy)
> + return -ENOMEM;
> +
> + clk = devm_clk_get(dev, "otg");
> + if (IS_ERR(clk)) {
> + dev_err(dev, "Failed to get otg clock\n");
> + return PTR_ERR(clk);
> + }
> +
> + sphy->dev = &pdev->dev;
> + sphy->plat = pdata;
> + sphy->regs = phy_base;
> + sphy->clk = clk;
> + sphy->phy.dev = sphy->dev;
> + sphy->phy.label = "samsung-usbphy";
> + sphy->phy.init = samsung_usbphy_init;
> + sphy->phy.shutdown = samsung_usbphy_shutdown;
> + sphy->cpu_type = samsung_usbphy_get_driver_data(pdev);
> + sphy->ref_clk_freq = samsung_usbphy_get_refclk_freq(sphy);
> +
> + platform_set_drvdata(pdev, sphy);
> +
> + ret = usb_add_phy(&sphy->phy, USB_PHY_TYPE_USB2);
> + return ret;
> +}
> +
> +static int __exit samsung_usbphy_remove(struct platform_device *pdev)
> +{
> + struct samsung_usbphy *sphy = platform_get_drvdata(pdev);
> +
> + usb_remove_phy(&sphy->phy);
> +
> + return 0;
> +}
> +
> +#ifdef CONFIG_OF
> +static const struct of_device_id samsung_usbphy_dt_match[] = {
> + {
> + .compatible = "samsung,s3c64xx-usbphy",
> + .data = (void *)TYPE_S3C64XX,
> + }, {
> + .compatible = "samsung,exynos4210-usbphy",
> + .data = (void *)TYPE_EXYNOS4210,
> + },
> + {},
> +};
> +MODULE_DEVICE_TABLE(of, samsung_usbphy_dt_match);
> +#else
> +#define samsung_usbphy_dt_match NULL
> +#endif
> +
> +static struct platform_device_id samsung_usbphy_driver_ids[] = {
> + {
> + .name = "s3c64xx-usbphy",
> + .driver_data = TYPE_S3C64XX,
> + }, {
> + .name = "exynos4210-usbphy",
> + .driver_data = TYPE_EXYNOS4210,
> + },
> + {},
> +};
> +
> +MODULE_DEVICE_TABLE(platform, samsung_usbphy_driver_ids);
> +
> +static struct platform_driver samsung_usbphy_driver = {
> + .probe = samsung_usbphy_probe,
> + .remove = __devexit_p(samsung_usbphy_remove),
> + .id_table = samsung_usbphy_driver_ids,
> + .driver = {
> + .name = "samsung-usbphy",
> + .owner = THIS_MODULE,
> + .of_match_table = samsung_usbphy_dt_match,
> + },
> +};
> +
> +module_platform_driver(samsung_usbphy_driver);
> +
> +MODULE_DESCRIPTION("Samsung USB phy controller");
> +MODULE_AUTHOR("Praveen Paneri <p.paneri@samsung.com>");
> +MODULE_LICENSE("GPL");
> +MODULE_ALIAS("platform:samsung-usbphy");
> diff --git a/include/linux/platform_data/samsung-usbphy.h b/include/linux/platform_data/samsung-usbphy.h
> new file mode 100644
> index 0000000..1bd24cb
> --- /dev/null
> +++ b/include/linux/platform_data/samsung-usbphy.h
> @@ -0,0 +1,27 @@
> +/*
> + * Copyright (C) 2012 Samsung Electronics Co.Ltd
> + * http://www.samsung.com/
> + * Author: Praveen Paneri <p.paneri@samsung.com>
> + *
> + * Defines platform data for samsung usb phy driver.
> + *
> + * This program is free software; you can redistribute it and/or modify it
> + * under the terms of the GNU General Public License as published by the
> + * Free Software Foundation; either version 2 of the License, or (at your
> + * option) any later version.
> + */
> +
> +#ifndef __SAMSUNG_USBPHY_PLATFORM_H
> +#define __SAMSUNG_USBPHY_PLATFORM_H
> +
> +/**
> + * samsung_usbphy_data - Platform data for USB PHY driver.
> + * @pmu_isolation: Function to control usb phy isolation in PMU.
> + */
> +struct samsung_usbphy_data {
> + void (*pmu_isolation)(int on);
> +};
> +
> +extern void samsung_usbphy_set_pdata(struct samsung_usbphy_data *pd);
> +
> +#endif /* __SAMSUNG_USBPHY_PLATFORM_H */
> --
> 1.7.1
>
--
balbi
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^ permalink raw reply [flat|nested] 27+ messages in thread* [PATCH] usb: phy: samsung: Introducing usb phy driver for hsotg
2012-10-15 13:28 ` Felipe Balbi
@ 2012-10-15 13:44 ` Kyungmin Park
2012-10-16 5:39 ` Praveen Paneri
2012-10-20 19:19 ` Pavel Machek
2 siblings, 0 replies; 27+ messages in thread
From: Kyungmin Park @ 2012-10-15 13:44 UTC (permalink / raw)
To: linux-arm-kernel
+ Tomasz Figa,
Acked-by: Kyungmin Park <kyungmin.park@samsung.com>
On Mon, Oct 15, 2012 at 10:28 PM, Felipe Balbi <balbi@ti.com> wrote:
> On Fri, Oct 12, 2012 at 03:45:34PM +0530, Praveen Paneri wrote:
>> platform_set_drvdata() required for driver's remove function, so adding
>> it back.
>>
>> From v6:
>> Added TODO for phy bindings with controller
>> Dropped platform_set_drvdata() from driver probe
>>
>> This driver uses usb_phy interface to interact with s3c-hsotg. Supports
>> phy_init and phy_shutdown functions to enable/disable phy. Tested with
>> smdk6410 and smdkv310. More SoCs can be brought under later.
>>
>
> this commit log needs improvement. There are stuff there which shouldn't
> go to git's history.
>
> I would like to get Tested-bys and Acked-by from DT maintainers.
>
>> Signed-off-by: Praveen Paneri <p.paneri@samsung.com>
>> Acked-by: Heiko Stuebner <heiko@sntech.de>
>> ---
>> .../devicetree/bindings/usb/samsung-usbphy.txt | 11 +
>> drivers/usb/phy/Kconfig | 8 +
>> drivers/usb/phy/Makefile | 1 +
>> drivers/usb/phy/samsung-usbphy.c | 357 ++++++++++++++++++++
>> include/linux/platform_data/samsung-usbphy.h | 27 ++
>> 5 files changed, 404 insertions(+), 0 deletions(-)
>> create mode 100644 Documentation/devicetree/bindings/usb/samsung-usbphy.txt
>> create mode 100644 drivers/usb/phy/samsung-usbphy.c
>> create mode 100644 include/linux/platform_data/samsung-usbphy.h
>>
>> diff --git a/Documentation/devicetree/bindings/usb/samsung-usbphy.txt b/Documentation/devicetree/bindings/usb/samsung-usbphy.txt
>> new file mode 100644
>> index 0000000..7b26e2d
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/usb/samsung-usbphy.txt
>> @@ -0,0 +1,11 @@
>> +* Samsung's usb phy transceiver
>> +
>> +The Samsung's phy transceiver is used for controlling usb otg phy for
>> +s3c-hsotg usb device controller.
>> +TODO: Adding the PHY binding with controller(s) according to the under
>> +developement generic PHY driver.
>> +
>> +Required properties:
>> +- compatible : should be "samsung,exynos4210-usbphy"
>> +- reg : base physical address of the phy registers and length of memory mapped
>> + region.
>> diff --git a/drivers/usb/phy/Kconfig b/drivers/usb/phy/Kconfig
>> index 63c339b..313685f 100644
>> --- a/drivers/usb/phy/Kconfig
>> +++ b/drivers/usb/phy/Kconfig
>> @@ -32,3 +32,11 @@ config MV_U3D_PHY
>> help
>> Enable this to support Marvell USB 3.0 phy controller for Marvell
>> SoC.
>> +
>> +config SAMSUNG_USBPHY
>> + bool "Samsung USB PHY controller Driver"
>> + depends on USB_S3C_HSOTG
>> + select USB_OTG_UTILS
>> + help
>> + Enable this to support Samsung USB phy controller for samsung
>> + SoCs.
>> diff --git a/drivers/usb/phy/Makefile b/drivers/usb/phy/Makefile
>> index b069f29..55dcfc1 100644
>> --- a/drivers/usb/phy/Makefile
>> +++ b/drivers/usb/phy/Makefile
>> @@ -8,3 +8,4 @@ obj-$(CONFIG_OMAP_USB2) += omap-usb2.o
>> obj-$(CONFIG_USB_ISP1301) += isp1301.o
>> obj-$(CONFIG_MV_U3D_PHY) += mv_u3d_phy.o
>> obj-$(CONFIG_USB_EHCI_TEGRA) += tegra_usb_phy.o
>> +obj-$(CONFIG_SAMSUNG_USBPHY) += samsung-usbphy.o
>> diff --git a/drivers/usb/phy/samsung-usbphy.c b/drivers/usb/phy/samsung-usbphy.c
>> new file mode 100644
>> index 0000000..14c182f
>> --- /dev/null
>> +++ b/drivers/usb/phy/samsung-usbphy.c
>> @@ -0,0 +1,357 @@
>> +/* linux/drivers/usb/phy/samsung-usbphy.c
>> + *
>> + * Copyright (c) 2012 Samsung Electronics Co., Ltd.
>> + * http://www.samsung.com
>> + *
>> + * Author: Praveen Paneri <p.paneri@samsung.com>
>> + *
>> + * Samsung USB2.0 High-speed OTG transceiver, talks to S3C HS OTG controller
>> + *
>> + * This program is free software; you can redistribute it and/or modify
>> + * it under the terms of the GNU General Public License version 2 as
>> + * published by the Free Software Foundation.
>> + *
>> + * This program is distributed in the hope that it will be useful,
>> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
>> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
>> + * GNU General Public License for more details.
>> + */
>> +
>> +#include <linux/module.h>
>> +#include <linux/platform_device.h>
>> +#include <linux/clk.h>
>> +#include <linux/delay.h>
>> +#include <linux/err.h>
>> +#include <linux/io.h>
>> +#include <linux/of.h>
>> +#include <linux/usb/otg.h>
>> +#include <linux/platform_data/samsung-usbphy.h>
>> +
>> +/* Register definitions */
>> +
>> +#define S3C_PHYPWR (0x00)
>> +
>> +#define S3C_PHYPWR_NORMAL_MASK (0x19 << 0)
>> +#define S3C_PHYPWR_OTG_DISABLE (1 << 4)
>> +#define S3C_PHYPWR_ANALOG_POWERDOWN (1 << 3)
>> +#define S3C_PHYPWR_FORCE_SUSPEND (1 << 1)
>> +/* For Exynos4 */
>> +#define EXYNOS4_PHYPWR_NORMAL_MASK (0x39 << 0)
>> +#define EXYNOS4_PHYPWR_SLEEP (1 << 5)
>> +
>> +#define S3C_PHYCLK (0x04)
>> +
>> +#define S3C_PHYCLK_MODE_SERIAL (1 << 6)
>> +#define S3C_PHYCLK_EXT_OSC (1 << 5)
>> +#define S3C_PHYCLK_COMMON_ON_N (1 << 4)
>> +#define S3C_PHYCLK_ID_PULL (1 << 2)
>> +#define S3C_PHYCLK_CLKSEL_MASK (0x3 << 0)
>> +#define S3C_PHYCLK_CLKSEL_SHIFT (0)
>> +#define S3C_PHYCLK_CLKSEL_48M (0x0 << 0)
>> +#define S3C_PHYCLK_CLKSEL_12M (0x2 << 0)
>> +#define S3C_PHYCLK_CLKSEL_24M (0x3 << 0)
>> +
>> +#define S3C_RSTCON (0x08)
>> +
>> +#define S3C_RSTCON_PHYCLK (1 << 2)
>> +#define S3C_RSTCON_HCLK (1 << 1)
>> +#define S3C_RSTCON_PHY (1 << 0)
>> +
>> +#ifndef MHZ
>> +#define MHZ (1000*1000)
>> +#endif
>> +
>> +enum samsung_cpu_type {
>> + TYPE_S3C64XX,
>> + TYPE_EXYNOS4210,
>> +};
>> +
>> +/*
>> + * struct samsung_usbphy - transceiver driver state
>> + * @phy: transceiver structure
>> + * @plat: platform data
>> + * @dev: The parent device supplied to the probe function
>> + * @clk: usb phy clock
>> + * @regs: usb phy register memory base
>> + * @ref_clk_freq: reference clock frequency selection
>> + * @cpu_type: machine identifier
>> + */
>> +struct samsung_usbphy {
>> + struct usb_phy phy;
>> + struct samsung_usbphy_data *plat;
>> + struct device *dev;
>> + struct clk *clk;
>> + void __iomem *regs;
>> + int ref_clk_freq;
>> + int cpu_type;
>> +};
>> +
>> +#define phy_to_sphy(x) container_of((x), struct samsung_usbphy, phy)
>> +
>> +/*
>> + * Returns reference clock frequency selection value
>> + */
>> +static int samsung_usbphy_get_refclk_freq(struct samsung_usbphy *sphy)
>> +{
>> + struct clk *ref_clk;
>> + int refclk_freq = 0;
>> +
>> + ref_clk = clk_get(sphy->dev, "xusbxti");
>> + if (IS_ERR(ref_clk)) {
>> + dev_err(sphy->dev, "Failed to get reference clock\n");
>> + return PTR_ERR(ref_clk);
>> + }
>> +
>> + switch (clk_get_rate(ref_clk)) {
>> + case 12 * MHZ:
>> + refclk_freq |= S3C_PHYCLK_CLKSEL_12M;
>> + break;
>> + case 24 * MHZ:
>> + refclk_freq |= S3C_PHYCLK_CLKSEL_24M;
>> + break;
>> + default:
>> + case 48 * MHZ:
>> + /* default reference clock */
>> + refclk_freq |= S3C_PHYCLK_CLKSEL_48M;
>> + break;
>> + }
>> + clk_put(ref_clk);
>> +
>> + return refclk_freq;
>> +}
>> +
>> +static void samsung_usbphy_enable(struct samsung_usbphy *sphy)
>> +{
>> + void __iomem *regs = sphy->regs;
>> + u32 phypwr;
>> + u32 phyclk;
>> + u32 rstcon;
>> +
>> + /* set clock frequency for PLL */
>> + phyclk = sphy->ref_clk_freq;
>> + phypwr = readl(regs + S3C_PHYPWR);
>> + rstcon = readl(regs + S3C_RSTCON);
>> +
>> + switch (sphy->cpu_type) {
>> + case TYPE_S3C64XX:
>> + phyclk &= ~(S3C_PHYCLK_COMMON_ON_N);
>> + phypwr &= ~S3C_PHYPWR_NORMAL_MASK;
>> + rstcon |= S3C_RSTCON_PHY;
>> + break;
>> + case TYPE_EXYNOS4210:
>> + phypwr &= ~EXYNOS4_PHYPWR_NORMAL_MASK;
>> + rstcon |= S3C_RSTCON_PHY;
>> + default:
>> + break;
>> + }
>> +
>> + writel(phyclk, regs + S3C_PHYCLK);
>> + /* set to normal of PHY0 */
>> + writel(phypwr, regs + S3C_PHYPWR);
>> + /* reset all ports of PHY and Link */
>> + writel(rstcon, regs + S3C_RSTCON);
>> + udelay(10);
>> + rstcon &= ~S3C_RSTCON_PHY;
>> + writel(rstcon, regs + S3C_RSTCON);
>> +}
>> +
>> +static void samsung_usbphy_disable(struct samsung_usbphy *sphy)
>> +{
>> + void __iomem *regs = sphy->regs;
>> + u32 phypwr;
>> +
>> + phypwr = readl(regs + S3C_PHYPWR);
>> +
>> + switch (sphy->cpu_type) {
>> + case TYPE_S3C64XX:
>> + phypwr |= S3C_PHYPWR_NORMAL_MASK;
>> + break;
>> + case TYPE_EXYNOS4210:
>> + phypwr |= EXYNOS4_PHYPWR_NORMAL_MASK;
>> + default:
>> + break;
>> + }
>> +
>> + /* unset to normal of PHY0 */
>> + writel(phypwr, regs + S3C_PHYPWR);
>> +}
>> +
>> +/*
>> + * The function passed to the usb driver for phy initialization
>> + */
>> +static int samsung_usbphy_init(struct usb_phy *phy)
>> +{
>> + struct samsung_usbphy *sphy;
>> + int ret = 0;
>> +
>> + sphy = phy_to_sphy(phy);
>> +
>> + /* Enable the phy clock */
>> + ret = clk_prepare_enable(sphy->clk);
>> + if (ret) {
>> + dev_err(sphy->dev, "%s: clk_prepare_enable failed\n", __func__);
>> + return ret;
>> + }
>> +
>> + /* Disable phy isolation */
>> + if (sphy->plat && sphy->plat->pmu_isolation)
>> + sphy->plat->pmu_isolation(false);
>> +
>> + /* Initialize usb phy registers */
>> + samsung_usbphy_enable(sphy);
>> +
>> + /* Disable the phy clock */
>> + clk_disable_unprepare(sphy->clk);
>> + return ret;
>> +}
>> +
>> +/*
>> + * The function passed to the usb driver for phy shutdown
>> + */
>> +static void samsung_usbphy_shutdown(struct usb_phy *phy)
>> +{
>> + struct samsung_usbphy *sphy;
>> +
>> + sphy = phy_to_sphy(phy);
>> +
>> + if (clk_prepare_enable(sphy->clk)) {
>> + dev_err(sphy->dev, "%s: clk_prepare_enable failed\n", __func__);
>> + return;
>> + }
>> +
>> + /* De-initialize usb phy registers */
>> + samsung_usbphy_disable(sphy);
>> +
>> + /* Enable phy isolation */
>> + if (sphy->plat && sphy->plat->pmu_isolation)
>> + sphy->plat->pmu_isolation(true);
>> +
>> + clk_disable_unprepare(sphy->clk);
>> +}
>> +
>> +static const struct of_device_id samsung_usbphy_dt_match[];
>> +
>> +static inline int samsung_usbphy_get_driver_data(struct platform_device *pdev)
>> +{
>> + if (IS_ENABLED(CONFIG_OF) && pdev->dev.of_node) {
>> + int data;
>> + const struct of_device_id *match;
>> + match = of_match_node(samsung_usbphy_dt_match,
>> + pdev->dev.of_node);
>> + data = (int) match->data;
>> + return data;
>> + }
>> +
>> + return platform_get_device_id(pdev)->driver_data;
>> +}
>> +
>> +static int __devinit samsung_usbphy_probe(struct platform_device *pdev)
>> +{
>> + struct samsung_usbphy *sphy;
>> + struct samsung_usbphy_data *pdata;
>> + struct device *dev = &pdev->dev;
>> + struct resource *phy_mem;
>> + void __iomem *phy_base;
>> + struct clk *clk;
>> + int ret = 0;
>> +
>> + pdata = pdev->dev.platform_data;
>> + if (!pdata) {
>> + dev_err(&pdev->dev, "%s: no platform data defined\n", __func__);
>> + return -EINVAL;
>> + }
>> +
>> + phy_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
>> + if (!phy_mem) {
>> + dev_err(dev, "%s: missing mem resource\n", __func__);
>> + return -ENODEV;
>> + }
>> +
>> + phy_base = devm_request_and_ioremap(dev, phy_mem);
>> + if (!phy_base) {
>> + dev_err(dev, "%s: register mapping failed\n", __func__);
>> + return -ENXIO;
>> + }
>> +
>> + sphy = devm_kzalloc(dev, sizeof(*sphy), GFP_KERNEL);
>> + if (!sphy)
>> + return -ENOMEM;
>> +
>> + clk = devm_clk_get(dev, "otg");
>> + if (IS_ERR(clk)) {
>> + dev_err(dev, "Failed to get otg clock\n");
>> + return PTR_ERR(clk);
>> + }
>> +
>> + sphy->dev = &pdev->dev;
>> + sphy->plat = pdata;
>> + sphy->regs = phy_base;
>> + sphy->clk = clk;
>> + sphy->phy.dev = sphy->dev;
>> + sphy->phy.label = "samsung-usbphy";
>> + sphy->phy.init = samsung_usbphy_init;
>> + sphy->phy.shutdown = samsung_usbphy_shutdown;
>> + sphy->cpu_type = samsung_usbphy_get_driver_data(pdev);
>> + sphy->ref_clk_freq = samsung_usbphy_get_refclk_freq(sphy);
>> +
>> + platform_set_drvdata(pdev, sphy);
>> +
>> + ret = usb_add_phy(&sphy->phy, USB_PHY_TYPE_USB2);
>> + return ret;
>> +}
>> +
>> +static int __exit samsung_usbphy_remove(struct platform_device *pdev)
>> +{
>> + struct samsung_usbphy *sphy = platform_get_drvdata(pdev);
>> +
>> + usb_remove_phy(&sphy->phy);
>> +
>> + return 0;
>> +}
>> +
>> +#ifdef CONFIG_OF
>> +static const struct of_device_id samsung_usbphy_dt_match[] = {
>> + {
>> + .compatible = "samsung,s3c64xx-usbphy",
>> + .data = (void *)TYPE_S3C64XX,
>> + }, {
>> + .compatible = "samsung,exynos4210-usbphy",
>> + .data = (void *)TYPE_EXYNOS4210,
>> + },
>> + {},
>> +};
>> +MODULE_DEVICE_TABLE(of, samsung_usbphy_dt_match);
>> +#else
>> +#define samsung_usbphy_dt_match NULL
>> +#endif
>> +
>> +static struct platform_device_id samsung_usbphy_driver_ids[] = {
>> + {
>> + .name = "s3c64xx-usbphy",
>> + .driver_data = TYPE_S3C64XX,
>> + }, {
>> + .name = "exynos4210-usbphy",
>> + .driver_data = TYPE_EXYNOS4210,
>> + },
>> + {},
>> +};
>> +
>> +MODULE_DEVICE_TABLE(platform, samsung_usbphy_driver_ids);
>> +
>> +static struct platform_driver samsung_usbphy_driver = {
>> + .probe = samsung_usbphy_probe,
>> + .remove = __devexit_p(samsung_usbphy_remove),
>> + .id_table = samsung_usbphy_driver_ids,
>> + .driver = {
>> + .name = "samsung-usbphy",
>> + .owner = THIS_MODULE,
>> + .of_match_table = samsung_usbphy_dt_match,
>> + },
>> +};
>> +
>> +module_platform_driver(samsung_usbphy_driver);
>> +
>> +MODULE_DESCRIPTION("Samsung USB phy controller");
>> +MODULE_AUTHOR("Praveen Paneri <p.paneri@samsung.com>");
>> +MODULE_LICENSE("GPL");
>> +MODULE_ALIAS("platform:samsung-usbphy");
>> diff --git a/include/linux/platform_data/samsung-usbphy.h b/include/linux/platform_data/samsung-usbphy.h
>> new file mode 100644
>> index 0000000..1bd24cb
>> --- /dev/null
>> +++ b/include/linux/platform_data/samsung-usbphy.h
>> @@ -0,0 +1,27 @@
>> +/*
>> + * Copyright (C) 2012 Samsung Electronics Co.Ltd
>> + * http://www.samsung.com/
>> + * Author: Praveen Paneri <p.paneri@samsung.com>
>> + *
>> + * Defines platform data for samsung usb phy driver.
>> + *
>> + * This program is free software; you can redistribute it and/or modify it
>> + * under the terms of the GNU General Public License as published by the
>> + * Free Software Foundation; either version 2 of the License, or (at your
>> + * option) any later version.
>> + */
>> +
>> +#ifndef __SAMSUNG_USBPHY_PLATFORM_H
>> +#define __SAMSUNG_USBPHY_PLATFORM_H
>> +
>> +/**
>> + * samsung_usbphy_data - Platform data for USB PHY driver.
>> + * @pmu_isolation: Function to control usb phy isolation in PMU.
>> + */
>> +struct samsung_usbphy_data {
>> + void (*pmu_isolation)(int on);
>> +};
>> +
>> +extern void samsung_usbphy_set_pdata(struct samsung_usbphy_data *pd);
>> +
>> +#endif /* __SAMSUNG_USBPHY_PLATFORM_H */
>> --
>> 1.7.1
>>
>
> --
> balbi
^ permalink raw reply [flat|nested] 27+ messages in thread* [PATCH] usb: phy: samsung: Introducing usb phy driver for hsotg
2012-10-15 13:28 ` Felipe Balbi
2012-10-15 13:44 ` Kyungmin Park
@ 2012-10-16 5:39 ` Praveen Paneri
2012-10-20 19:19 ` Pavel Machek
2 siblings, 0 replies; 27+ messages in thread
From: Praveen Paneri @ 2012-10-16 5:39 UTC (permalink / raw)
To: linux-arm-kernel
On Mon, Oct 15, 2012 at 6:58 PM, Felipe Balbi <balbi@ti.com> wrote:
> On Fri, Oct 12, 2012 at 03:45:34PM +0530, Praveen Paneri wrote:
>> platform_set_drvdata() required for driver's remove function, so adding
>> it back.
>>
>> From v6:
>> Added TODO for phy bindings with controller
>> Dropped platform_set_drvdata() from driver probe
>>
>> This driver uses usb_phy interface to interact with s3c-hsotg. Supports
>> phy_init and phy_shutdown functions to enable/disable phy. Tested with
>> smdk6410 and smdkv310. More SoCs can be brought under later.
>>
>
> this commit log needs improvement. There are stuff there which shouldn't
> go to git's history.
I will resend the patches with improved commit log.
Thanks,
Praveen
>
> I would like to get Tested-bys and Acked-by from DT maintainers.
>
>> Signed-off-by: Praveen Paneri <p.paneri@samsung.com>
>> Acked-by: Heiko Stuebner <heiko@sntech.de>
>> ---
>> .../devicetree/bindings/usb/samsung-usbphy.txt | 11 +
>> drivers/usb/phy/Kconfig | 8 +
>> drivers/usb/phy/Makefile | 1 +
>> drivers/usb/phy/samsung-usbphy.c | 357 ++++++++++++++++++++
>> include/linux/platform_data/samsung-usbphy.h | 27 ++
>> 5 files changed, 404 insertions(+), 0 deletions(-)
>> create mode 100644 Documentation/devicetree/bindings/usb/samsung-usbphy.txt
>> create mode 100644 drivers/usb/phy/samsung-usbphy.c
>> create mode 100644 include/linux/platform_data/samsung-usbphy.h
>>
>> diff --git a/Documentation/devicetree/bindings/usb/samsung-usbphy.txt b/Documentation/devicetree/bindings/usb/samsung-usbphy.txt
>> new file mode 100644
>> index 0000000..7b26e2d
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/usb/samsung-usbphy.txt
>> @@ -0,0 +1,11 @@
>> +* Samsung's usb phy transceiver
>> +
>> +The Samsung's phy transceiver is used for controlling usb otg phy for
>> +s3c-hsotg usb device controller.
>> +TODO: Adding the PHY binding with controller(s) according to the under
>> +developement generic PHY driver.
>> +
>> +Required properties:
>> +- compatible : should be "samsung,exynos4210-usbphy"
>> +- reg : base physical address of the phy registers and length of memory mapped
>> + region.
>> diff --git a/drivers/usb/phy/Kconfig b/drivers/usb/phy/Kconfig
>> index 63c339b..313685f 100644
>> --- a/drivers/usb/phy/Kconfig
>> +++ b/drivers/usb/phy/Kconfig
>> @@ -32,3 +32,11 @@ config MV_U3D_PHY
>> help
>> Enable this to support Marvell USB 3.0 phy controller for Marvell
>> SoC.
>> +
>> +config SAMSUNG_USBPHY
>> + bool "Samsung USB PHY controller Driver"
>> + depends on USB_S3C_HSOTG
>> + select USB_OTG_UTILS
>> + help
>> + Enable this to support Samsung USB phy controller for samsung
>> + SoCs.
>> diff --git a/drivers/usb/phy/Makefile b/drivers/usb/phy/Makefile
>> index b069f29..55dcfc1 100644
>> --- a/drivers/usb/phy/Makefile
>> +++ b/drivers/usb/phy/Makefile
>> @@ -8,3 +8,4 @@ obj-$(CONFIG_OMAP_USB2) += omap-usb2.o
>> obj-$(CONFIG_USB_ISP1301) += isp1301.o
>> obj-$(CONFIG_MV_U3D_PHY) += mv_u3d_phy.o
>> obj-$(CONFIG_USB_EHCI_TEGRA) += tegra_usb_phy.o
>> +obj-$(CONFIG_SAMSUNG_USBPHY) += samsung-usbphy.o
>> diff --git a/drivers/usb/phy/samsung-usbphy.c b/drivers/usb/phy/samsung-usbphy.c
>> new file mode 100644
>> index 0000000..14c182f
>> --- /dev/null
>> +++ b/drivers/usb/phy/samsung-usbphy.c
>> @@ -0,0 +1,357 @@
>> +/* linux/drivers/usb/phy/samsung-usbphy.c
>> + *
>> + * Copyright (c) 2012 Samsung Electronics Co., Ltd.
>> + * http://www.samsung.com
>> + *
>> + * Author: Praveen Paneri <p.paneri@samsung.com>
>> + *
>> + * Samsung USB2.0 High-speed OTG transceiver, talks to S3C HS OTG controller
>> + *
>> + * This program is free software; you can redistribute it and/or modify
>> + * it under the terms of the GNU General Public License version 2 as
>> + * published by the Free Software Foundation.
>> + *
>> + * This program is distributed in the hope that it will be useful,
>> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
>> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
>> + * GNU General Public License for more details.
>> + */
>> +
>> +#include <linux/module.h>
>> +#include <linux/platform_device.h>
>> +#include <linux/clk.h>
>> +#include <linux/delay.h>
>> +#include <linux/err.h>
>> +#include <linux/io.h>
>> +#include <linux/of.h>
>> +#include <linux/usb/otg.h>
>> +#include <linux/platform_data/samsung-usbphy.h>
>> +
>> +/* Register definitions */
>> +
>> +#define S3C_PHYPWR (0x00)
>> +
>> +#define S3C_PHYPWR_NORMAL_MASK (0x19 << 0)
>> +#define S3C_PHYPWR_OTG_DISABLE (1 << 4)
>> +#define S3C_PHYPWR_ANALOG_POWERDOWN (1 << 3)
>> +#define S3C_PHYPWR_FORCE_SUSPEND (1 << 1)
>> +/* For Exynos4 */
>> +#define EXYNOS4_PHYPWR_NORMAL_MASK (0x39 << 0)
>> +#define EXYNOS4_PHYPWR_SLEEP (1 << 5)
>> +
>> +#define S3C_PHYCLK (0x04)
>> +
>> +#define S3C_PHYCLK_MODE_SERIAL (1 << 6)
>> +#define S3C_PHYCLK_EXT_OSC (1 << 5)
>> +#define S3C_PHYCLK_COMMON_ON_N (1 << 4)
>> +#define S3C_PHYCLK_ID_PULL (1 << 2)
>> +#define S3C_PHYCLK_CLKSEL_MASK (0x3 << 0)
>> +#define S3C_PHYCLK_CLKSEL_SHIFT (0)
>> +#define S3C_PHYCLK_CLKSEL_48M (0x0 << 0)
>> +#define S3C_PHYCLK_CLKSEL_12M (0x2 << 0)
>> +#define S3C_PHYCLK_CLKSEL_24M (0x3 << 0)
>> +
>> +#define S3C_RSTCON (0x08)
>> +
>> +#define S3C_RSTCON_PHYCLK (1 << 2)
>> +#define S3C_RSTCON_HCLK (1 << 1)
>> +#define S3C_RSTCON_PHY (1 << 0)
>> +
>> +#ifndef MHZ
>> +#define MHZ (1000*1000)
>> +#endif
>> +
>> +enum samsung_cpu_type {
>> + TYPE_S3C64XX,
>> + TYPE_EXYNOS4210,
>> +};
>> +
>> +/*
>> + * struct samsung_usbphy - transceiver driver state
>> + * @phy: transceiver structure
>> + * @plat: platform data
>> + * @dev: The parent device supplied to the probe function
>> + * @clk: usb phy clock
>> + * @regs: usb phy register memory base
>> + * @ref_clk_freq: reference clock frequency selection
>> + * @cpu_type: machine identifier
>> + */
>> +struct samsung_usbphy {
>> + struct usb_phy phy;
>> + struct samsung_usbphy_data *plat;
>> + struct device *dev;
>> + struct clk *clk;
>> + void __iomem *regs;
>> + int ref_clk_freq;
>> + int cpu_type;
>> +};
>> +
>> +#define phy_to_sphy(x) container_of((x), struct samsung_usbphy, phy)
>> +
>> +/*
>> + * Returns reference clock frequency selection value
>> + */
>> +static int samsung_usbphy_get_refclk_freq(struct samsung_usbphy *sphy)
>> +{
>> + struct clk *ref_clk;
>> + int refclk_freq = 0;
>> +
>> + ref_clk = clk_get(sphy->dev, "xusbxti");
>> + if (IS_ERR(ref_clk)) {
>> + dev_err(sphy->dev, "Failed to get reference clock\n");
>> + return PTR_ERR(ref_clk);
>> + }
>> +
>> + switch (clk_get_rate(ref_clk)) {
>> + case 12 * MHZ:
>> + refclk_freq |= S3C_PHYCLK_CLKSEL_12M;
>> + break;
>> + case 24 * MHZ:
>> + refclk_freq |= S3C_PHYCLK_CLKSEL_24M;
>> + break;
>> + default:
>> + case 48 * MHZ:
>> + /* default reference clock */
>> + refclk_freq |= S3C_PHYCLK_CLKSEL_48M;
>> + break;
>> + }
>> + clk_put(ref_clk);
>> +
>> + return refclk_freq;
>> +}
>> +
>> +static void samsung_usbphy_enable(struct samsung_usbphy *sphy)
>> +{
>> + void __iomem *regs = sphy->regs;
>> + u32 phypwr;
>> + u32 phyclk;
>> + u32 rstcon;
>> +
>> + /* set clock frequency for PLL */
>> + phyclk = sphy->ref_clk_freq;
>> + phypwr = readl(regs + S3C_PHYPWR);
>> + rstcon = readl(regs + S3C_RSTCON);
>> +
>> + switch (sphy->cpu_type) {
>> + case TYPE_S3C64XX:
>> + phyclk &= ~(S3C_PHYCLK_COMMON_ON_N);
>> + phypwr &= ~S3C_PHYPWR_NORMAL_MASK;
>> + rstcon |= S3C_RSTCON_PHY;
>> + break;
>> + case TYPE_EXYNOS4210:
>> + phypwr &= ~EXYNOS4_PHYPWR_NORMAL_MASK;
>> + rstcon |= S3C_RSTCON_PHY;
>> + default:
>> + break;
>> + }
>> +
>> + writel(phyclk, regs + S3C_PHYCLK);
>> + /* set to normal of PHY0 */
>> + writel(phypwr, regs + S3C_PHYPWR);
>> + /* reset all ports of PHY and Link */
>> + writel(rstcon, regs + S3C_RSTCON);
>> + udelay(10);
>> + rstcon &= ~S3C_RSTCON_PHY;
>> + writel(rstcon, regs + S3C_RSTCON);
>> +}
>> +
>> +static void samsung_usbphy_disable(struct samsung_usbphy *sphy)
>> +{
>> + void __iomem *regs = sphy->regs;
>> + u32 phypwr;
>> +
>> + phypwr = readl(regs + S3C_PHYPWR);
>> +
>> + switch (sphy->cpu_type) {
>> + case TYPE_S3C64XX:
>> + phypwr |= S3C_PHYPWR_NORMAL_MASK;
>> + break;
>> + case TYPE_EXYNOS4210:
>> + phypwr |= EXYNOS4_PHYPWR_NORMAL_MASK;
>> + default:
>> + break;
>> + }
>> +
>> + /* unset to normal of PHY0 */
>> + writel(phypwr, regs + S3C_PHYPWR);
>> +}
>> +
>> +/*
>> + * The function passed to the usb driver for phy initialization
>> + */
>> +static int samsung_usbphy_init(struct usb_phy *phy)
>> +{
>> + struct samsung_usbphy *sphy;
>> + int ret = 0;
>> +
>> + sphy = phy_to_sphy(phy);
>> +
>> + /* Enable the phy clock */
>> + ret = clk_prepare_enable(sphy->clk);
>> + if (ret) {
>> + dev_err(sphy->dev, "%s: clk_prepare_enable failed\n", __func__);
>> + return ret;
>> + }
>> +
>> + /* Disable phy isolation */
>> + if (sphy->plat && sphy->plat->pmu_isolation)
>> + sphy->plat->pmu_isolation(false);
>> +
>> + /* Initialize usb phy registers */
>> + samsung_usbphy_enable(sphy);
>> +
>> + /* Disable the phy clock */
>> + clk_disable_unprepare(sphy->clk);
>> + return ret;
>> +}
>> +
>> +/*
>> + * The function passed to the usb driver for phy shutdown
>> + */
>> +static void samsung_usbphy_shutdown(struct usb_phy *phy)
>> +{
>> + struct samsung_usbphy *sphy;
>> +
>> + sphy = phy_to_sphy(phy);
>> +
>> + if (clk_prepare_enable(sphy->clk)) {
>> + dev_err(sphy->dev, "%s: clk_prepare_enable failed\n", __func__);
>> + return;
>> + }
>> +
>> + /* De-initialize usb phy registers */
>> + samsung_usbphy_disable(sphy);
>> +
>> + /* Enable phy isolation */
>> + if (sphy->plat && sphy->plat->pmu_isolation)
>> + sphy->plat->pmu_isolation(true);
>> +
>> + clk_disable_unprepare(sphy->clk);
>> +}
>> +
>> +static const struct of_device_id samsung_usbphy_dt_match[];
>> +
>> +static inline int samsung_usbphy_get_driver_data(struct platform_device *pdev)
>> +{
>> + if (IS_ENABLED(CONFIG_OF) && pdev->dev.of_node) {
>> + int data;
>> + const struct of_device_id *match;
>> + match = of_match_node(samsung_usbphy_dt_match,
>> + pdev->dev.of_node);
>> + data = (int) match->data;
>> + return data;
>> + }
>> +
>> + return platform_get_device_id(pdev)->driver_data;
>> +}
>> +
>> +static int __devinit samsung_usbphy_probe(struct platform_device *pdev)
>> +{
>> + struct samsung_usbphy *sphy;
>> + struct samsung_usbphy_data *pdata;
>> + struct device *dev = &pdev->dev;
>> + struct resource *phy_mem;
>> + void __iomem *phy_base;
>> + struct clk *clk;
>> + int ret = 0;
>> +
>> + pdata = pdev->dev.platform_data;
>> + if (!pdata) {
>> + dev_err(&pdev->dev, "%s: no platform data defined\n", __func__);
>> + return -EINVAL;
>> + }
>> +
>> + phy_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
>> + if (!phy_mem) {
>> + dev_err(dev, "%s: missing mem resource\n", __func__);
>> + return -ENODEV;
>> + }
>> +
>> + phy_base = devm_request_and_ioremap(dev, phy_mem);
>> + if (!phy_base) {
>> + dev_err(dev, "%s: register mapping failed\n", __func__);
>> + return -ENXIO;
>> + }
>> +
>> + sphy = devm_kzalloc(dev, sizeof(*sphy), GFP_KERNEL);
>> + if (!sphy)
>> + return -ENOMEM;
>> +
>> + clk = devm_clk_get(dev, "otg");
>> + if (IS_ERR(clk)) {
>> + dev_err(dev, "Failed to get otg clock\n");
>> + return PTR_ERR(clk);
>> + }
>> +
>> + sphy->dev = &pdev->dev;
>> + sphy->plat = pdata;
>> + sphy->regs = phy_base;
>> + sphy->clk = clk;
>> + sphy->phy.dev = sphy->dev;
>> + sphy->phy.label = "samsung-usbphy";
>> + sphy->phy.init = samsung_usbphy_init;
>> + sphy->phy.shutdown = samsung_usbphy_shutdown;
>> + sphy->cpu_type = samsung_usbphy_get_driver_data(pdev);
>> + sphy->ref_clk_freq = samsung_usbphy_get_refclk_freq(sphy);
>> +
>> + platform_set_drvdata(pdev, sphy);
>> +
>> + ret = usb_add_phy(&sphy->phy, USB_PHY_TYPE_USB2);
>> + return ret;
>> +}
>> +
>> +static int __exit samsung_usbphy_remove(struct platform_device *pdev)
>> +{
>> + struct samsung_usbphy *sphy = platform_get_drvdata(pdev);
>> +
>> + usb_remove_phy(&sphy->phy);
>> +
>> + return 0;
>> +}
>> +
>> +#ifdef CONFIG_OF
>> +static const struct of_device_id samsung_usbphy_dt_match[] = {
>> + {
>> + .compatible = "samsung,s3c64xx-usbphy",
>> + .data = (void *)TYPE_S3C64XX,
>> + }, {
>> + .compatible = "samsung,exynos4210-usbphy",
>> + .data = (void *)TYPE_EXYNOS4210,
>> + },
>> + {},
>> +};
>> +MODULE_DEVICE_TABLE(of, samsung_usbphy_dt_match);
>> +#else
>> +#define samsung_usbphy_dt_match NULL
>> +#endif
>> +
>> +static struct platform_device_id samsung_usbphy_driver_ids[] = {
>> + {
>> + .name = "s3c64xx-usbphy",
>> + .driver_data = TYPE_S3C64XX,
>> + }, {
>> + .name = "exynos4210-usbphy",
>> + .driver_data = TYPE_EXYNOS4210,
>> + },
>> + {},
>> +};
>> +
>> +MODULE_DEVICE_TABLE(platform, samsung_usbphy_driver_ids);
>> +
>> +static struct platform_driver samsung_usbphy_driver = {
>> + .probe = samsung_usbphy_probe,
>> + .remove = __devexit_p(samsung_usbphy_remove),
>> + .id_table = samsung_usbphy_driver_ids,
>> + .driver = {
>> + .name = "samsung-usbphy",
>> + .owner = THIS_MODULE,
>> + .of_match_table = samsung_usbphy_dt_match,
>> + },
>> +};
>> +
>> +module_platform_driver(samsung_usbphy_driver);
>> +
>> +MODULE_DESCRIPTION("Samsung USB phy controller");
>> +MODULE_AUTHOR("Praveen Paneri <p.paneri@samsung.com>");
>> +MODULE_LICENSE("GPL");
>> +MODULE_ALIAS("platform:samsung-usbphy");
>> diff --git a/include/linux/platform_data/samsung-usbphy.h b/include/linux/platform_data/samsung-usbphy.h
>> new file mode 100644
>> index 0000000..1bd24cb
>> --- /dev/null
>> +++ b/include/linux/platform_data/samsung-usbphy.h
>> @@ -0,0 +1,27 @@
>> +/*
>> + * Copyright (C) 2012 Samsung Electronics Co.Ltd
>> + * http://www.samsung.com/
>> + * Author: Praveen Paneri <p.paneri@samsung.com>
>> + *
>> + * Defines platform data for samsung usb phy driver.
>> + *
>> + * This program is free software; you can redistribute it and/or modify it
>> + * under the terms of the GNU General Public License as published by the
>> + * Free Software Foundation; either version 2 of the License, or (at your
>> + * option) any later version.
>> + */
>> +
>> +#ifndef __SAMSUNG_USBPHY_PLATFORM_H
>> +#define __SAMSUNG_USBPHY_PLATFORM_H
>> +
>> +/**
>> + * samsung_usbphy_data - Platform data for USB PHY driver.
>> + * @pmu_isolation: Function to control usb phy isolation in PMU.
>> + */
>> +struct samsung_usbphy_data {
>> + void (*pmu_isolation)(int on);
>> +};
>> +
>> +extern void samsung_usbphy_set_pdata(struct samsung_usbphy_data *pd);
>> +
>> +#endif /* __SAMSUNG_USBPHY_PLATFORM_H */
>> --
>> 1.7.1
>>
>
> --
> balbi
^ permalink raw reply [flat|nested] 27+ messages in thread* [PATCH] usb: phy: samsung: Introducing usb phy driver for hsotg
2012-10-15 13:28 ` Felipe Balbi
2012-10-15 13:44 ` Kyungmin Park
2012-10-16 5:39 ` Praveen Paneri
@ 2012-10-20 19:19 ` Pavel Machek
2012-10-22 5:43 ` Praveen Paneri
2 siblings, 1 reply; 27+ messages in thread
From: Pavel Machek @ 2012-10-20 19:19 UTC (permalink / raw)
To: linux-arm-kernel
Hi!
> > +#define S3C_PHYPWR (0x00)
...
> > +#define S3C_PHYCLK (0x04)
> > +
> > +#define S3C_PHYCLK_MODE_SERIAL (1 << 6)
> > +#define S3C_PHYCLK_EXT_OSC (1 << 5)
> > +#define S3C_PHYCLK_COMMON_ON_N (1 << 4)
> > +#define S3C_PHYCLK_ID_PULL (1 << 2)
> > +#define S3C_PHYCLK_CLKSEL_MASK (0x3 << 0)
> > +#define S3C_PHYCLK_CLKSEL_SHIFT (0)
> > +#define S3C_PHYCLK_CLKSEL_48M (0x0 << 0)
> > +#define S3C_PHYCLK_CLKSEL_12M (0x2 << 0)
> > +#define S3C_PHYCLK_CLKSEL_24M (0x3 << 0)
I believe these 0x 's should be removed. Ouch and << 0 is interesting,
too, just remove it.
Pavel
--
(english) http://www.livejournal.com/~pavelmachek
(cesky, pictures) http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html
^ permalink raw reply [flat|nested] 27+ messages in thread
* [PATCH] usb: phy: samsung: Introducing usb phy driver for hsotg
2012-10-20 19:19 ` Pavel Machek
@ 2012-10-22 5:43 ` Praveen Paneri
0 siblings, 0 replies; 27+ messages in thread
From: Praveen Paneri @ 2012-10-22 5:43 UTC (permalink / raw)
To: linux-arm-kernel
Hi,
On Sun, Oct 21, 2012 at 12:49 AM, Pavel Machek <pavel@ucw.cz> wrote:
> Hi!
>
>> > +#define S3C_PHYPWR (0x00)
> ...
>> > +#define S3C_PHYCLK (0x04)
>> > +
>> > +#define S3C_PHYCLK_MODE_SERIAL (1 << 6)
>> > +#define S3C_PHYCLK_EXT_OSC (1 << 5)
>> > +#define S3C_PHYCLK_COMMON_ON_N (1 << 4)
>> > +#define S3C_PHYCLK_ID_PULL (1 << 2)
>> > +#define S3C_PHYCLK_CLKSEL_MASK (0x3 << 0)
>> > +#define S3C_PHYCLK_CLKSEL_SHIFT (0)
>> > +#define S3C_PHYCLK_CLKSEL_48M (0x0 << 0)
>> > +#define S3C_PHYCLK_CLKSEL_12M (0x2 << 0)
>> > +#define S3C_PHYCLK_CLKSEL_24M (0x3 << 0)
>
> I believe these 0x 's should be removed. Ouch and << 0 is interesting,
> too, just remove it.
Yes it makes sense to maintain a uniform pattern across all the
definition. How about maintaining hex values everywhere instead of
dropping 0x's? It will make it easier to add big values to the
definitions tomorrow, if needed.
About "<< 0", IMHO people must have started using it to maintain a
parallelism with other definitions. I do not mind changing it if you
still feel that it's very much needed
thanks :)
Praveen
>
> Pavel
> --
> (english) http://www.livejournal.com/~pavelmachek
> (cesky, pictures) http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html
> --
> To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in
> the body of a message to majordomo at vger.kernel.org
> More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply [flat|nested] 27+ messages in thread
* [PATCH] usb: phy: samsung: Introducing usb phy driver for hsotg
2012-10-12 10:15 ` [PATCH] " Praveen Paneri
2012-10-15 13:28 ` Felipe Balbi
@ 2012-10-17 11:00 ` Kukjin Kim
2012-10-17 12:30 ` Praveen Paneri
2012-10-17 19:13 ` Russell King - ARM Linux
1 sibling, 2 replies; 27+ messages in thread
From: Kukjin Kim @ 2012-10-17 11:00 UTC (permalink / raw)
To: linux-arm-kernel
Praveen Paneri wrote:
>
> platform_set_drvdata() required for driver's remove function, so adding
> it back.
>
> From v6:
> Added TODO for phy bindings with controller
> Dropped platform_set_drvdata() from driver probe
>
> This driver uses usb_phy interface to interact with s3c-hsotg. Supports
> phy_init and phy_shutdown functions to enable/disable phy. Tested with
> smdk6410 and smdkv310. More SoCs can be brought under later.
>
> Signed-off-by: Praveen Paneri <p.paneri@samsung.com>
> Acked-by: Heiko Stuebner <heiko@sntech.de>
> ---
> .../devicetree/bindings/usb/samsung-usbphy.txt | 11 +
> drivers/usb/phy/Kconfig | 8 +
> drivers/usb/phy/Makefile | 1 +
> drivers/usb/phy/samsung-usbphy.c | 357
++++++++++++++++++++
> include/linux/platform_data/samsung-usbphy.h | 27 ++
> 5 files changed, 404 insertions(+), 0 deletions(-)
> create mode 100644 Documentation/devicetree/bindings/usb/samsung-
> usbphy.txt
> create mode 100644 drivers/usb/phy/samsung-usbphy.c
> create mode 100644 include/linux/platform_data/samsung-usbphy.h
>
> diff --git a/Documentation/devicetree/bindings/usb/samsung-usbphy.txt
> b/Documentation/devicetree/bindings/usb/samsung-usbphy.txt
> new file mode 100644
> index 0000000..7b26e2d
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/usb/samsung-usbphy.txt
> @@ -0,0 +1,11 @@
> +* Samsung's usb phy transceiver
> +
> +The Samsung's phy transceiver is used for controlling usb otg phy for
> +s3c-hsotg usb device controller.
> +TODO: Adding the PHY binding with controller(s) according to the under
> +developement generic PHY driver.
> +
> +Required properties:
> +- compatible : should be "samsung,exynos4210-usbphy"
> +- reg : base physical address of the phy registers and length of memory
> mapped
> + region.
> diff --git a/drivers/usb/phy/Kconfig b/drivers/usb/phy/Kconfig
> index 63c339b..313685f 100644
> --- a/drivers/usb/phy/Kconfig
> +++ b/drivers/usb/phy/Kconfig
> @@ -32,3 +32,11 @@ config MV_U3D_PHY
> help
> Enable this to support Marvell USB 3.0 phy controller for Marvell
> SoC.
> +
> +config SAMSUNG_USBPHY
> + bool "Samsung USB PHY controller Driver"
> + depends on USB_S3C_HSOTG
> + select USB_OTG_UTILS
> + help
> + Enable this to support Samsung USB phy controller for samsung
> + SoCs.
> diff --git a/drivers/usb/phy/Makefile b/drivers/usb/phy/Makefile
> index b069f29..55dcfc1 100644
> --- a/drivers/usb/phy/Makefile
> +++ b/drivers/usb/phy/Makefile
> @@ -8,3 +8,4 @@ obj-$(CONFIG_OMAP_USB2) +=
omap-usb2.o
> obj-$(CONFIG_USB_ISP1301) += isp1301.o
> obj-$(CONFIG_MV_U3D_PHY) += mv_u3d_phy.o
> obj-$(CONFIG_USB_EHCI_TEGRA) += tegra_usb_phy.o
> +obj-$(CONFIG_SAMSUNG_USBPHY) += samsung-usbphy.o
> diff --git a/drivers/usb/phy/samsung-usbphy.c b/drivers/usb/phy/samsung-
> usbphy.c
> new file mode 100644
> index 0000000..14c182f
> --- /dev/null
> +++ b/drivers/usb/phy/samsung-usbphy.c
Hi,
Basically I agree and this is a good approach to support usb phy for Samsung
stuff...but there are some comments ;)
> @@ -0,0 +1,357 @@
> +/* linux/drivers/usb/phy/samsung-usbphy.c
> + *
> + * Copyright (c) 2012 Samsung Electronics Co., Ltd.
> + * http://www.samsung.com
> + *
> + * Author: Praveen Paneri <p.paneri@samsung.com>
> + *
> + * Samsung USB2.0 High-speed OTG transceiver, talks to S3C HS OTG
> controller
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + */
> +
> +#include <linux/module.h>
> +#include <linux/platform_device.h>
> +#include <linux/clk.h>
> +#include <linux/delay.h>
> +#include <linux/err.h>
> +#include <linux/io.h>
> +#include <linux/of.h>
> +#include <linux/usb/otg.h>
> +#include <linux/platform_data/samsung-usbphy.h>
> +
> +/* Register definitions */
> +
> +#define S3C_PHYPWR (0x00)
> +
IMHO, according to the file name, samsung-usbphy, SAMSUNG_ is better here?
> +#define S3C_PHYPWR_NORMAL_MASK (0x19 << 0)
> +#define S3C_PHYPWR_OTG_DISABLE (1 << 4)
> +#define S3C_PHYPWR_ANALOG_POWERDOWN (1 << 3)
> +#define S3C_PHYPWR_FORCE_SUSPEND (1 << 1)
> +/* For Exynos4 */
> +#define EXYNOS4_PHYPWR_NORMAL_MASK (0x39 << 0)
Hmm...is this right? If so, need to use exact name for the definition.
See arch/arm/mach-exynos/include/mach/regs-usb-phy.h
> +#define EXYNOS4_PHYPWR_SLEEP (1 << 5)
Ditto.
> +
> +#define S3C_PHYCLK (0x04)
> +
> +#define S3C_PHYCLK_MODE_SERIAL (1 << 6)
MODE_USB11?
> +#define S3C_PHYCLK_EXT_OSC (1 << 5)
> +#define S3C_PHYCLK_COMMON_ON_N (1 << 4)
There are Samsung SoCs which is having two PHYs, so I think, we need to
design this with considering it.
> +#define S3C_PHYCLK_ID_PULL (1 << 2)
> +#define S3C_PHYCLK_CLKSEL_MASK (0x3 << 0)
> +#define S3C_PHYCLK_CLKSEL_SHIFT (0)
> +#define S3C_PHYCLK_CLKSEL_48M (0x0 << 0)
> +#define S3C_PHYCLK_CLKSEL_12M (0x2 << 0)
> +#define S3C_PHYCLK_CLKSEL_24M (0x3 << 0)
As you know, the values for CLKSEL are different on each Samsung SoCs...if
we use this patch, we need to implement for other SoCs many things. In
addition, this patch says can support EXYNOS4210 but not actually...
> +
> +#define S3C_RSTCON (0x08)
> +
> +#define S3C_RSTCON_PHYCLK (1 << 2)
> +#define S3C_RSTCON_HCLK (1 << 1)
> +#define S3C_RSTCON_PHY (1 << 0)
> +
> +#ifndef MHZ
> +#define MHZ (1000*1000)
> +#endif
> +
> +enum samsung_cpu_type {
> + TYPE_S3C64XX,
> + TYPE_EXYNOS4210,
> +};
> +
> +/*
> + * struct samsung_usbphy - transceiver driver state
> + * @phy: transceiver structure
> + * @plat: platform data
> + * @dev: The parent device supplied to the probe function
> + * @clk: usb phy clock
> + * @regs: usb phy register memory base
> + * @ref_clk_freq: reference clock frequency selection
> + * @cpu_type: machine identifier
> + */
> +struct samsung_usbphy {
> + struct usb_phy phy;
> + struct samsung_usbphy_data *plat;
> + struct device *dev;
> + struct clk *clk;
> + void __iomem *regs;
> + int ref_clk_freq;
> + int cpu_type;
> +};
> +
> +#define phy_to_sphy(x) container_of((x), struct
samsung_usbphy,
> phy)
> +
> +/*
> + * Returns reference clock frequency selection value
> + */
> +static int samsung_usbphy_get_refclk_freq(struct samsung_usbphy *sphy)
> +{
> + struct clk *ref_clk;
> + int refclk_freq = 0;
> +
> + ref_clk = clk_get(sphy->dev, "xusbxti");
> + if (IS_ERR(ref_clk)) {
IS_ERR_OR_NULL(ref_clk)?
> + dev_err(sphy->dev, "Failed to get reference clock\n");
> + return PTR_ERR(ref_clk);
> + }
> +
> + switch (clk_get_rate(ref_clk)) {
> + case 12 * MHZ:
> + refclk_freq |= S3C_PHYCLK_CLKSEL_12M;
Just,
+ refclk_freq = S3C_PHYCLK_CLKSEL_12M;
because its defalut value is 0...BTW, how do you think to support other SoCs
such as EXYNOS4210, EXYNOS4X12?
> + break;
> + case 24 * MHZ:
> + refclk_freq |= S3C_PHYCLK_CLKSEL_24M;
Ditto.
> + break;
> + default:
> + case 48 * MHZ:
> + /* default reference clock */
> + refclk_freq |= S3C_PHYCLK_CLKSEL_48M;
Ditto...and default refernec clock for EXYNOS4 is 24MHz...
> + break;
> + }
> + clk_put(ref_clk);
> +
> + return refclk_freq;
> +}
> +
Hmm...I need more time to look at this again...
Thanks.
Best regards,
Kgene.
--
Kukjin Kim <kgene.kim@samsung.com>, Senior Engineer,
SW Solution Development Team, Samsung Electronics Co., Ltd.
^ permalink raw reply [flat|nested] 27+ messages in thread* [PATCH] usb: phy: samsung: Introducing usb phy driver for hsotg
2012-10-17 11:00 ` Kukjin Kim
@ 2012-10-17 12:30 ` Praveen Paneri
2012-10-17 19:13 ` Russell King - ARM Linux
1 sibling, 0 replies; 27+ messages in thread
From: Praveen Paneri @ 2012-10-17 12:30 UTC (permalink / raw)
To: linux-arm-kernel
Hi,
On Wed, Oct 17, 2012 at 4:30 PM, Kukjin Kim <kgene.kim@samsung.com> wrote:
> Praveen Paneri wrote:
>>
>> platform_set_drvdata() required for driver's remove function, so adding
>> it back.
>>
>> From v6:
>> Added TODO for phy bindings with controller
>> Dropped platform_set_drvdata() from driver probe
>>
>> This driver uses usb_phy interface to interact with s3c-hsotg. Supports
>> phy_init and phy_shutdown functions to enable/disable phy. Tested with
>> smdk6410 and smdkv310. More SoCs can be brought under later.
>>
>> Signed-off-by: Praveen Paneri <p.paneri@samsung.com>
>> Acked-by: Heiko Stuebner <heiko@sntech.de>
>> ---
>> .../devicetree/bindings/usb/samsung-usbphy.txt | 11 +
>> drivers/usb/phy/Kconfig | 8 +
>> drivers/usb/phy/Makefile | 1 +
>> drivers/usb/phy/samsung-usbphy.c | 357
> ++++++++++++++++++++
>> include/linux/platform_data/samsung-usbphy.h | 27 ++
>> 5 files changed, 404 insertions(+), 0 deletions(-)
>> create mode 100644 Documentation/devicetree/bindings/usb/samsung-
>> usbphy.txt
>> create mode 100644 drivers/usb/phy/samsung-usbphy.c
>> create mode 100644 include/linux/platform_data/samsung-usbphy.h
>>
>> diff --git a/Documentation/devicetree/bindings/usb/samsung-usbphy.txt
>> b/Documentation/devicetree/bindings/usb/samsung-usbphy.txt
>> new file mode 100644
>> index 0000000..7b26e2d
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/usb/samsung-usbphy.txt
>> @@ -0,0 +1,11 @@
>> +* Samsung's usb phy transceiver
>> +
>> +The Samsung's phy transceiver is used for controlling usb otg phy for
>> +s3c-hsotg usb device controller.
>> +TODO: Adding the PHY binding with controller(s) according to the under
>> +developement generic PHY driver.
>> +
>> +Required properties:
>> +- compatible : should be "samsung,exynos4210-usbphy"
>> +- reg : base physical address of the phy registers and length of memory
>> mapped
>> + region.
>> diff --git a/drivers/usb/phy/Kconfig b/drivers/usb/phy/Kconfig
>> index 63c339b..313685f 100644
>> --- a/drivers/usb/phy/Kconfig
>> +++ b/drivers/usb/phy/Kconfig
>> @@ -32,3 +32,11 @@ config MV_U3D_PHY
>> help
>> Enable this to support Marvell USB 3.0 phy controller for Marvell
>> SoC.
>> +
>> +config SAMSUNG_USBPHY
>> + bool "Samsung USB PHY controller Driver"
>> + depends on USB_S3C_HSOTG
>> + select USB_OTG_UTILS
>> + help
>> + Enable this to support Samsung USB phy controller for samsung
>> + SoCs.
>> diff --git a/drivers/usb/phy/Makefile b/drivers/usb/phy/Makefile
>> index b069f29..55dcfc1 100644
>> --- a/drivers/usb/phy/Makefile
>> +++ b/drivers/usb/phy/Makefile
>> @@ -8,3 +8,4 @@ obj-$(CONFIG_OMAP_USB2) +=
> omap-usb2.o
>> obj-$(CONFIG_USB_ISP1301) += isp1301.o
>> obj-$(CONFIG_MV_U3D_PHY) += mv_u3d_phy.o
>> obj-$(CONFIG_USB_EHCI_TEGRA) += tegra_usb_phy.o
>> +obj-$(CONFIG_SAMSUNG_USBPHY) += samsung-usbphy.o
>> diff --git a/drivers/usb/phy/samsung-usbphy.c b/drivers/usb/phy/samsung-
>> usbphy.c
>> new file mode 100644
>> index 0000000..14c182f
>> --- /dev/null
>> +++ b/drivers/usb/phy/samsung-usbphy.c
>
> Hi,
>
> Basically I agree and this is a good approach to support usb phy for Samsung
> stuff...but there are some comments ;)
>
>> @@ -0,0 +1,357 @@
>> +/* linux/drivers/usb/phy/samsung-usbphy.c
>> + *
>> + * Copyright (c) 2012 Samsung Electronics Co., Ltd.
>> + * http://www.samsung.com
>> + *
>> + * Author: Praveen Paneri <p.paneri@samsung.com>
>> + *
>> + * Samsung USB2.0 High-speed OTG transceiver, talks to S3C HS OTG
>> controller
>> + *
>> + * This program is free software; you can redistribute it and/or modify
>> + * it under the terms of the GNU General Public License version 2 as
>> + * published by the Free Software Foundation.
>> + *
>> + * This program is distributed in the hope that it will be useful,
>> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
>> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
>> + * GNU General Public License for more details.
>> + */
>> +
>> +#include <linux/module.h>
>> +#include <linux/platform_device.h>
>> +#include <linux/clk.h>
>> +#include <linux/delay.h>
>> +#include <linux/err.h>
>> +#include <linux/io.h>
>> +#include <linux/of.h>
>> +#include <linux/usb/otg.h>
>> +#include <linux/platform_data/samsung-usbphy.h>
>> +
>> +/* Register definitions */
>> +
>> +#define S3C_PHYPWR (0x00)
>> +
> IMHO, according to the file name, samsung-usbphy, SAMSUNG_ is better here?
Sure I will change this for register names and drop S3C_ from bit definitions.
>
>
>> +#define S3C_PHYPWR_NORMAL_MASK (0x19 << 0)
>> +#define S3C_PHYPWR_OTG_DISABLE (1 << 4)
>> +#define S3C_PHYPWR_ANALOG_POWERDOWN (1 << 3)
>> +#define S3C_PHYPWR_FORCE_SUSPEND (1 << 1)
>> +/* For Exynos4 */
>> +#define EXYNOS4_PHYPWR_NORMAL_MASK (0x39 << 0)
>
> Hmm...is this right? If so, need to use exact name for the definition.
Name should be changed, will do that.
>
> See arch/arm/mach-exynos/include/mach/regs-usb-phy.h
>
>> +#define EXYNOS4_PHYPWR_SLEEP (1 << 5)
>
> Ditto.
>
>> +
>> +#define S3C_PHYCLK (0x04)
>> +
>> +#define S3C_PHYCLK_MODE_SERIAL (1 << 6)
>
> MODE_USB11?
Yes! Will update this as well.
>
>> +#define S3C_PHYCLK_EXT_OSC (1 << 5)
>> +#define S3C_PHYCLK_COMMON_ON_N (1 << 4)
>
> There are Samsung SoCs which is having two PHYs, so I think, we need to
> design this with considering it.
Yes! I do plan to add support for other SoCs. We will have to update
the register definition accordingly for PHY0 and PHY1.
>
>> +#define S3C_PHYCLK_ID_PULL (1 << 2)
>> +#define S3C_PHYCLK_CLKSEL_MASK (0x3 << 0)
>> +#define S3C_PHYCLK_CLKSEL_SHIFT (0)
>> +#define S3C_PHYCLK_CLKSEL_48M (0x0 << 0)
>> +#define S3C_PHYCLK_CLKSEL_12M (0x2 << 0)
>> +#define S3C_PHYCLK_CLKSEL_24M (0x3 << 0)
>
> As you know, the values for CLKSEL are different on each Samsung SoCs...if
Yeah those bit definitions have to be added here, just as they are in
the file you mentioned.
See arch/arm/mach-exynos/include/mach/regs-usb-phy.h
> we use this patch, we need to implement for other SoCs many things. In
> addition, this patch says can support EXYNOS4210 but not actually...
I have tested on SMDKV310 and SMDK6410 with s3c-hsotg. So, host phy
control support is yet to be added.
>
>> +
>> +#define S3C_RSTCON (0x08)
>> +
>> +#define S3C_RSTCON_PHYCLK (1 << 2)
>> +#define S3C_RSTCON_HCLK (1 << 1)
>> +#define S3C_RSTCON_PHY (1 << 0)
>> +
>> +#ifndef MHZ
>> +#define MHZ (1000*1000)
>> +#endif
>> +
>> +enum samsung_cpu_type {
>> + TYPE_S3C64XX,
>> + TYPE_EXYNOS4210,
>> +};
>> +
>> +/*
>> + * struct samsung_usbphy - transceiver driver state
>> + * @phy: transceiver structure
>> + * @plat: platform data
>> + * @dev: The parent device supplied to the probe function
>> + * @clk: usb phy clock
>> + * @regs: usb phy register memory base
>> + * @ref_clk_freq: reference clock frequency selection
>> + * @cpu_type: machine identifier
>> + */
>> +struct samsung_usbphy {
>> + struct usb_phy phy;
>> + struct samsung_usbphy_data *plat;
>> + struct device *dev;
>> + struct clk *clk;
>> + void __iomem *regs;
>> + int ref_clk_freq;
>> + int cpu_type;
>> +};
>> +
>> +#define phy_to_sphy(x) container_of((x), struct
> samsung_usbphy,
>> phy)
>> +
>> +/*
>> + * Returns reference clock frequency selection value
>> + */
>> +static int samsung_usbphy_get_refclk_freq(struct samsung_usbphy *sphy)
>> +{
>> + struct clk *ref_clk;
>> + int refclk_freq = 0;
>> +
>> + ref_clk = clk_get(sphy->dev, "xusbxti");
>> + if (IS_ERR(ref_clk)) {
>
> IS_ERR_OR_NULL(ref_clk)?
sure
>
>> + dev_err(sphy->dev, "Failed to get reference clock\n");
>> + return PTR_ERR(ref_clk);
>> + }
>> +
>> + switch (clk_get_rate(ref_clk)) {
>> + case 12 * MHZ:
>> + refclk_freq |= S3C_PHYCLK_CLKSEL_12M;
>
> Just,
>
> + refclk_freq = S3C_PHYCLK_CLKSEL_12M;
>
> because its defalut value is 0...BTW, how do you think to support other SoCs
> such as EXYNOS4210, EXYNOS4X12?
Will make use of sphy->cpu_type here. No?
>
>> + break;
>> + case 24 * MHZ:
>> + refclk_freq |= S3C_PHYCLK_CLKSEL_24M;
>
> Ditto.
>
>> + break;
>> + default:
>> + case 48 * MHZ:
>> + /* default reference clock */
>> + refclk_freq |= S3C_PHYCLK_CLKSEL_48M;
>
> Ditto...and default refernec clock for EXYNOS4 is 24MHz...
Okay! So it needs an if statement here then.
>
>> + break;
>> + }
>> + clk_put(ref_clk);
>> +
>> + return refclk_freq;
>> +}
>> +
>
> Hmm...I need more time to look at this again...
Thank you :)
In that case, I will wait for further comments from you and then only
send my subsequent patches.
Regards,
Praveen
>
> Thanks.
>
> Best regards,
> Kgene.
> --
> Kukjin Kim <kgene.kim@samsung.com>, Senior Engineer,
> SW Solution Development Team, Samsung Electronics Co., Ltd.
>
> --
> To unsubscribe from this list: send the line "unsubscribe linux-usb" in
> the body of a message to majordomo at vger.kernel.org
> More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply [flat|nested] 27+ messages in thread* [PATCH] usb: phy: samsung: Introducing usb phy driver for hsotg
2012-10-17 11:00 ` Kukjin Kim
2012-10-17 12:30 ` Praveen Paneri
@ 2012-10-17 19:13 ` Russell King - ARM Linux
2012-10-21 7:16 ` Domenico Andreoli
1 sibling, 1 reply; 27+ messages in thread
From: Russell King - ARM Linux @ 2012-10-17 19:13 UTC (permalink / raw)
To: linux-arm-kernel
On Wed, Oct 17, 2012 at 08:00:00PM +0900, Kukjin Kim wrote:
> > +static int samsung_usbphy_get_refclk_freq(struct samsung_usbphy *sphy)
> > +{
> > + struct clk *ref_clk;
> > + int refclk_freq = 0;
> > +
> > + ref_clk = clk_get(sphy->dev, "xusbxti");
> > + if (IS_ERR(ref_clk)) {
>
> IS_ERR_OR_NULL(ref_clk)?
For the N'th time, NO. IS_ERR is correct here.
> > + dev_err(sphy->dev, "Failed to get reference clock\n");
> > + return PTR_ERR(ref_clk);
Look, it's the ABI. Not only that but it's also TOTALLY AND UTTERLY WRONG
to use IS_ERR_OR_NULL(foo) and then follow it with return PTR_ERR(foo).
You end up returning ZERO.
Stop telling people to use IS_ERR_OR_NULL without properly thinking about
it first. Virtually every single one of these done this way is a BUG.
Are we clear on this?
^ permalink raw reply [flat|nested] 27+ messages in thread* [PATCH] usb: phy: samsung: Introducing usb phy driver for hsotg
2012-10-17 19:13 ` Russell King - ARM Linux
@ 2012-10-21 7:16 ` Domenico Andreoli
0 siblings, 0 replies; 27+ messages in thread
From: Domenico Andreoli @ 2012-10-21 7:16 UTC (permalink / raw)
To: linux-arm-kernel
On Wed, Oct 17, 2012 at 08:13:01PM +0100, Russell King - ARM Linux wrote:
> On Wed, Oct 17, 2012 at 08:00:00PM +0900, Kukjin Kim wrote:
> > > +static int samsung_usbphy_get_refclk_freq(struct samsung_usbphy *sphy)
> > > +{
> > > + struct clk *ref_clk;
> > > + int refclk_freq = 0;
> > > +
> > > + ref_clk = clk_get(sphy->dev, "xusbxti");
> > > + if (IS_ERR(ref_clk)) {
> >
> > IS_ERR_OR_NULL(ref_clk)?
>
> For the N'th time, NO. IS_ERR is correct here.
>
> > > + dev_err(sphy->dev, "Failed to get reference clock\n");
> > > + return PTR_ERR(ref_clk);
>
> Look, it's the ABI. Not only that but it's also TOTALLY AND UTTERLY WRONG
> to use IS_ERR_OR_NULL(foo) and then follow it with return PTR_ERR(foo).
> You end up returning ZERO.
>
> Stop telling people to use IS_ERR_OR_NULL without properly thinking about
> it first. Virtually every single one of these done this way is a BUG.
>
> Are we clear on this?
Wouldn't be much easier to define PTR_ERR() to return -Esomething when
its argument is NULL?
This would end the whole issue of "should I use IS_ERR*/PTR_ERR or look into
the pointer myself?" story. One could simply always use IS_ERR*/PTR_ERR
and have the right thing done in whatever case.
Regards,
Domenico
^ permalink raw reply [flat|nested] 27+ messages in thread
* [PATCH v6 1/5] usb: phy: samsung: Introducing usb phy driver for hsotg
2012-09-17 12:54 ` [PATCH v6 1/5] usb: phy: samsung: Introducing usb phy driver for hsotg Praveen Paneri
2012-09-24 9:38 ` Praveen Paneri
@ 2012-09-24 10:41 ` Kyungmin Park
2012-09-24 13:04 ` Rob Herring
2 siblings, 0 replies; 27+ messages in thread
From: Kyungmin Park @ 2012-09-24 10:41 UTC (permalink / raw)
To: linux-arm-kernel
Acked-by: Kyungmin Park <kyungmin.park@samsung.com>
On 9/17/12, Praveen Paneri <p.paneri@samsung.com> wrote:
> This driver uses usb_phy interface to interact with s3c-hsotg. Supports
> phy_init and phy_shutdown functions to enable/disable phy. Tested with
> smdk6410 and smdkv310. More SoCs can be brought under later.
>
> Signed-off-by: Praveen Paneri <p.paneri@samsung.com>
> Acked-by: Heiko Stuebner <heiko@sntech.de>
> ---
> .../devicetree/bindings/usb/samsung-usbphy.txt | 9 +
> drivers/usb/phy/Kconfig | 8 +
> drivers/usb/phy/Makefile | 1 +
> drivers/usb/phy/samsung-usbphy.c | 360
> ++++++++++++++++++++
> include/linux/platform_data/samsung-usbphy.h | 27 ++
> 5 files changed, 405 insertions(+), 0 deletions(-)
> create mode 100644
> Documentation/devicetree/bindings/usb/samsung-usbphy.txt
> create mode 100644 drivers/usb/phy/samsung-usbphy.c
> create mode 100644 include/linux/platform_data/samsung-usbphy.h
>
> diff --git a/Documentation/devicetree/bindings/usb/samsung-usbphy.txt
> b/Documentation/devicetree/bindings/usb/samsung-usbphy.txt
> new file mode 100644
> index 0000000..fefd9c8
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/usb/samsung-usbphy.txt
> @@ -0,0 +1,9 @@
> +* Samsung's usb phy transceiver
> +
> +The Samsung's phy transceiver is used for controlling usb otg phy for
> +s3c-hsotg usb device controller.
> +
> +Required properties:
> +- compatible : should be "samsung,exynos4210-usbphy"
> +- reg : base physical address of the phy registers and length of memory
> mapped
> + region.
> diff --git a/drivers/usb/phy/Kconfig b/drivers/usb/phy/Kconfig
> index 63c339b..313685f 100644
> --- a/drivers/usb/phy/Kconfig
> +++ b/drivers/usb/phy/Kconfig
> @@ -32,3 +32,11 @@ config MV_U3D_PHY
> help
> Enable this to support Marvell USB 3.0 phy controller for Marvell
> SoC.
> +
> +config SAMSUNG_USBPHY
> + bool "Samsung USB PHY controller Driver"
> + depends on USB_S3C_HSOTG
> + select USB_OTG_UTILS
> + help
> + Enable this to support Samsung USB phy controller for samsung
> + SoCs.
> diff --git a/drivers/usb/phy/Makefile b/drivers/usb/phy/Makefile
> index b069f29..55dcfc1 100644
> --- a/drivers/usb/phy/Makefile
> +++ b/drivers/usb/phy/Makefile
> @@ -8,3 +8,4 @@ obj-$(CONFIG_OMAP_USB2) += omap-usb2.o
> obj-$(CONFIG_USB_ISP1301) += isp1301.o
> obj-$(CONFIG_MV_U3D_PHY) += mv_u3d_phy.o
> obj-$(CONFIG_USB_EHCI_TEGRA) += tegra_usb_phy.o
> +obj-$(CONFIG_SAMSUNG_USBPHY) += samsung-usbphy.o
> diff --git a/drivers/usb/phy/samsung-usbphy.c
> b/drivers/usb/phy/samsung-usbphy.c
> new file mode 100644
> index 0000000..95ec4d0
> --- /dev/null
> +++ b/drivers/usb/phy/samsung-usbphy.c
> @@ -0,0 +1,360 @@
> +/* linux/drivers/usb/phy/samsung-usbphy.c
> + *
> + * Copyright (c) 2012 Samsung Electronics Co., Ltd.
> + * http://www.samsung.com
> + *
> + * Author: Praveen Paneri <p.paneri@samsung.com>
> + *
> + * Samsung USB2.0 High-speed OTG transceiver, talks to S3C HS OTG
> controller
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + */
> +
> +#include <linux/module.h>
> +#include <linux/platform_device.h>
> +#include <linux/clk.h>
> +#include <linux/delay.h>
> +#include <linux/err.h>
> +#include <linux/io.h>
> +#include <linux/of.h>
> +#include <linux/usb/otg.h>
> +#include <linux/platform_data/samsung-usbphy.h>
> +
> +/* Register definitions */
> +
> +#define S3C_PHYPWR (0x00)
> +
> +#define S3C_PHYPWR_NORMAL_MASK (0x19 << 0)
> +#define S3C_PHYPWR_OTG_DISABLE (1 << 4)
> +#define S3C_PHYPWR_ANALOG_POWERDOWN (1 << 3)
> +#define S3C_PHYPWR_FORCE_SUSPEND (1 << 1)
> +/* For Exynos4 */
> +#define EXYNOS4_PHYPWR_NORMAL_MASK (0x39 << 0)
> +#define EXYNOS4_PHYPWR_SLEEP (1 << 5)
> +
> +#define S3C_PHYCLK (0x04)
> +
> +#define S3C_PHYCLK_MODE_SERIAL (1 << 6)
> +#define S3C_PHYCLK_EXT_OSC (1 << 5)
> +#define S3C_PHYCLK_COMMON_ON_N (1 << 4)
> +#define S3C_PHYCLK_ID_PULL (1 << 2)
> +#define S3C_PHYCLK_CLKSEL_MASK (0x3 << 0)
> +#define S3C_PHYCLK_CLKSEL_SHIFT (0)
> +#define S3C_PHYCLK_CLKSEL_48M (0x0 << 0)
> +#define S3C_PHYCLK_CLKSEL_12M (0x2 << 0)
> +#define S3C_PHYCLK_CLKSEL_24M (0x3 << 0)
> +
> +#define S3C_RSTCON (0x08)
> +
> +#define S3C_RSTCON_PHYCLK (1 << 2)
> +#define S3C_RSTCON_HCLK (1 << 1)
> +#define S3C_RSTCON_PHY (1 << 0)
> +
> +#ifndef MHZ
> +#define MHZ (1000*1000)
> +#endif
> +
> +enum samsung_cpu_type {
> + TYPE_S3C64XX,
> + TYPE_EXYNOS4210,
> +};
> +
> +/*
> + * struct samsung_usbphy - transceiver driver state
> + * @phy: transceiver structure
> + * @plat: platform data
> + * @dev: The parent device supplied to the probe function
> + * @clk: usb phy clock
> + * @regs: usb phy register memory base
> + * @ref_clk_freq: reference clock frequency selection
> + * @cpu_type: machine identifier
> + */
> +struct samsung_usbphy {
> + struct usb_phy phy;
> + struct samsung_usbphy_data *plat;
> + struct device *dev;
> + struct clk *clk;
> + void __iomem *regs;
> + int ref_clk_freq;
> + int cpu_type;
> +};
> +
> +#define phy_to_sphy(x) container_of((x), struct samsung_usbphy, phy)
> +
> +/*
> + * Returns reference clock frequency selection value
> + */
> +static int samsung_usbphy_get_refclk_freq(struct samsung_usbphy *sphy)
> +{
> + struct clk *ref_clk;
> + int refclk_freq = 0;
> +
> + ref_clk = clk_get(sphy->dev, "xusbxti");
> + if (IS_ERR(ref_clk)) {
> + dev_err(sphy->dev, "Failed to get reference clock\n");
> + return PTR_ERR(ref_clk);
> + }
> +
> + switch (clk_get_rate(ref_clk)) {
> + case 12 * MHZ:
> + refclk_freq |= S3C_PHYCLK_CLKSEL_12M;
> + break;
> + case 24 * MHZ:
> + refclk_freq |= S3C_PHYCLK_CLKSEL_24M;
> + break;
> + default:
> + case 48 * MHZ:
> + /* default reference clock */
> + refclk_freq |= S3C_PHYCLK_CLKSEL_48M;
> + break;
> + }
> + clk_put(ref_clk);
> +
> + return refclk_freq;
> +}
> +
> +static void samsung_usbphy_enable(struct samsung_usbphy *sphy)
> +{
> + void __iomem *regs = sphy->regs;
> + u32 phypwr;
> + u32 phyclk;
> + u32 rstcon;
> +
> + /* set clock frequency for PLL */
> + phyclk = sphy->ref_clk_freq;
> + phypwr = readl(regs + S3C_PHYPWR);
> + rstcon = readl(regs + S3C_RSTCON);
> +
> + switch (sphy->cpu_type) {
> + case TYPE_S3C64XX:
> + phyclk &= ~(S3C_PHYCLK_COMMON_ON_N);
> + phypwr &= ~S3C_PHYPWR_NORMAL_MASK;
> + rstcon |= S3C_RSTCON_PHY;
> + break;
> + case TYPE_EXYNOS4210:
> + phypwr &= ~EXYNOS4_PHYPWR_NORMAL_MASK;
> + rstcon |= S3C_RSTCON_PHY;
> + default:
> + break;
> + }
> +
> + writel(phyclk, regs + S3C_PHYCLK);
> + /* set to normal of PHY0 */
> + writel(phypwr, regs + S3C_PHYPWR);
> + /* reset all ports of PHY and Link */
> + writel(rstcon, regs + S3C_RSTCON);
> + udelay(10);
> + rstcon &= ~S3C_RSTCON_PHY;
> + writel(rstcon, regs + S3C_RSTCON);
> +}
> +
> +static void samsung_usbphy_disable(struct samsung_usbphy *sphy)
> +{
> + void __iomem *regs = sphy->regs;
> + u32 phypwr;
> +
> + phypwr = readl(regs + S3C_PHYPWR);
> +
> + switch (sphy->cpu_type) {
> + case TYPE_S3C64XX:
> + phypwr |= S3C_PHYPWR_NORMAL_MASK;
> + break;
> + case TYPE_EXYNOS4210:
> + phypwr |= EXYNOS4_PHYPWR_NORMAL_MASK;
> + default:
> + break;
> + }
> +
> + /* unset to normal of PHY0 */
> + writel(phypwr, regs + S3C_PHYPWR);
> +}
> +
> +/*
> + * The function passed to the usb driver for phy initialization
> + */
> +static int samsung_usbphy_init(struct usb_phy *phy)
> +{
> + struct samsung_usbphy *sphy;
> + int ret = 0;
> +
> + sphy = phy_to_sphy(phy);
> +
> + /* Enable the phy clock */
> + ret = clk_prepare_enable(sphy->clk);
> + if (ret) {
> + dev_err(sphy->dev, "%s: clk_prepare_enable failed\n", __func__);
> + return ret;
> + }
> +
> + /* Disable phy isolation */
> + if (sphy->plat && sphy->plat->pmu_isolation)
> + sphy->plat->pmu_isolation(false);
> +
> + /* Initialize usb phy registers */
> + samsung_usbphy_enable(sphy);
> +
> + /* Disable the phy clock */
> + clk_disable_unprepare(sphy->clk);
> + return ret;
> +}
> +
> +/*
> + * The function passed to the usb driver for phy shutdown
> + */
> +static void samsung_usbphy_shutdown(struct usb_phy *phy)
> +{
> + struct samsung_usbphy *sphy;
> +
> + sphy = phy_to_sphy(phy);
> +
> + if (clk_prepare_enable(sphy->clk)) {
> + dev_err(sphy->dev, "%s: clk_prepare_enable failed\n", __func__);
> + return;
> + }
> +
> + /* De-initialize usb phy registers */
> + samsung_usbphy_disable(sphy);
> +
> + /* Enable phy isolation */
> + if (sphy->plat && sphy->plat->pmu_isolation)
> + sphy->plat->pmu_isolation(true);
> +
> + clk_disable_unprepare(sphy->clk);
> +}
> +
> +static const struct of_device_id samsung_usbphy_dt_match[];
> +
> +static inline int samsung_usbphy_get_driver_data(struct platform_device
> *pdev)
> +{
> + if (IS_ENABLED(CONFIG_OF) && pdev->dev.of_node) {
> + int data;
> + const struct of_device_id *match;
> + match = of_match_node(samsung_usbphy_dt_match,
> + pdev->dev.of_node);
> + data = (int) match->data;
> + return data;
> + }
> +
> + return platform_get_device_id(pdev)->driver_data;
> +}
> +
> +static int __devinit samsung_usbphy_probe(struct platform_device *pdev)
> +{
> + struct samsung_usbphy *sphy;
> + struct samsung_usbphy_data *pdata;
> + struct device *dev = &pdev->dev;
> + struct resource *phy_mem;
> + void __iomem *phy_base;
> + struct clk *clk;
> + int ret;
> +
> + pdata = pdev->dev.platform_data;
> + if (!pdata) {
> + dev_err(&pdev->dev, "%s: no platform data defined\n", __func__);
> + return -EINVAL;
> + }
> +
> + phy_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
> + if (!phy_mem) {
> + dev_err(dev, "%s: missing mem resource\n", __func__);
> + return -ENODEV;
> + }
> +
> + phy_base = devm_request_and_ioremap(dev, phy_mem);
> + if (!phy_base) {
> + dev_err(dev, "%s: register mapping failed\n", __func__);
> + return -ENXIO;
> + }
> +
> + sphy = devm_kzalloc(dev, sizeof(*sphy), GFP_KERNEL);
> + if (!sphy)
> + return -ENOMEM;
> +
> + clk = devm_clk_get(dev, "otg");
> + if (IS_ERR(clk)) {
> + dev_err(dev, "Failed to get otg clock\n");
> + return PTR_ERR(clk);
> + }
> +
> + sphy->dev = &pdev->dev;
> + sphy->plat = pdata;
> + sphy->regs = phy_base;
> + sphy->clk = clk;
> + sphy->phy.dev = sphy->dev;
> + sphy->phy.label = "samsung-usbphy";
> + sphy->phy.init = samsung_usbphy_init;
> + sphy->phy.shutdown = samsung_usbphy_shutdown;
> + sphy->cpu_type = samsung_usbphy_get_driver_data(pdev);
> + sphy->ref_clk_freq = samsung_usbphy_get_refclk_freq(sphy);
> +
> + ret = usb_add_phy(&sphy->phy, USB_PHY_TYPE_USB2);
> + if (ret)
> + goto err;
> +
> + platform_set_drvdata(pdev, sphy);
> +err:
> + return ret;
> +}
> +
> +static int __exit samsung_usbphy_remove(struct platform_device *pdev)
> +{
> + struct samsung_usbphy *sphy = platform_get_drvdata(pdev);
> +
> + usb_remove_phy(&sphy->phy);
> +
> + return 0;
> +}
> +
> +#ifdef CONFIG_OF
> +static const struct of_device_id samsung_usbphy_dt_match[] = {
> + {
> + .compatible = "samsung,s3c64xx-usbphy",
> + .data = (void *)TYPE_S3C64XX,
> + }, {
> + .compatible = "samsung,exynos4210-usbphy",
> + .data = (void *)TYPE_EXYNOS4210,
> + },
> + {},
> +};
> +MODULE_DEVICE_TABLE(of, samsung_usbphy_dt_match);
> +#else
> +#define samsung_usbphy_dt_match NULL
> +#endif
> +
> +static struct platform_device_id samsung_usbphy_driver_ids[] = {
> + {
> + .name = "s3c64xx-usbphy",
> + .driver_data = TYPE_S3C64XX,
> + }, {
> + .name = "exynos4210-usbphy",
> + .driver_data = TYPE_EXYNOS4210,
> + },
> + {},
> +};
> +
> +MODULE_DEVICE_TABLE(platform, samsung_usbphy_driver_ids);
> +
> +static struct platform_driver samsung_usbphy_driver = {
> + .probe = samsung_usbphy_probe,
> + .remove = __devexit_p(samsung_usbphy_remove),
> + .id_table = samsung_usbphy_driver_ids,
> + .driver = {
> + .name = "samsung-usbphy",
> + .owner = THIS_MODULE,
> + .of_match_table = samsung_usbphy_dt_match,
> + },
> +};
> +
> +module_platform_driver(samsung_usbphy_driver);
> +
> +MODULE_DESCRIPTION("Samsung USB phy controller");
> +MODULE_AUTHOR("Praveen Paneri <p.paneri@samsung.com>");
> +MODULE_LICENSE("GPL");
> +MODULE_ALIAS("platform:samsung-usbphy");
> diff --git a/include/linux/platform_data/samsung-usbphy.h
> b/include/linux/platform_data/samsung-usbphy.h
> new file mode 100644
> index 0000000..1bd24cb
> --- /dev/null
> +++ b/include/linux/platform_data/samsung-usbphy.h
> @@ -0,0 +1,27 @@
> +/*
> + * Copyright (C) 2012 Samsung Electronics Co.Ltd
> + * http://www.samsung.com/
> + * Author: Praveen Paneri <p.paneri@samsung.com>
> + *
> + * Defines platform data for samsung usb phy driver.
> + *
> + * This program is free software; you can redistribute it and/or modify
> it
> + * under the terms of the GNU General Public License as published by
> the
> + * Free Software Foundation; either version 2 of the License, or (at
> your
> + * option) any later version.
> + */
> +
> +#ifndef __SAMSUNG_USBPHY_PLATFORM_H
> +#define __SAMSUNG_USBPHY_PLATFORM_H
> +
> +/**
> + * samsung_usbphy_data - Platform data for USB PHY driver.
> + * @pmu_isolation: Function to control usb phy isolation in PMU.
> + */
> +struct samsung_usbphy_data {
> + void (*pmu_isolation)(int on);
> +};
> +
> +extern void samsung_usbphy_set_pdata(struct samsung_usbphy_data *pd);
> +
> +#endif /* __SAMSUNG_USBPHY_PLATFORM_H */
> --
> 1.7.1
>
> --
> To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc"
> in
> the body of a message to majordomo at vger.kernel.org
> More majordomo info at http://vger.kernel.org/majordomo-info.html
>
^ permalink raw reply [flat|nested] 27+ messages in thread* [PATCH v6 1/5] usb: phy: samsung: Introducing usb phy driver for hsotg
2012-09-17 12:54 ` [PATCH v6 1/5] usb: phy: samsung: Introducing usb phy driver for hsotg Praveen Paneri
2012-09-24 9:38 ` Praveen Paneri
2012-09-24 10:41 ` [PATCH v6 1/5] " Kyungmin Park
@ 2012-09-24 13:04 ` Rob Herring
2012-09-25 11:23 ` Praveen Paneri
2 siblings, 1 reply; 27+ messages in thread
From: Rob Herring @ 2012-09-24 13:04 UTC (permalink / raw)
To: linux-arm-kernel
On 09/17/2012 07:54 AM, Praveen Paneri wrote:
> This driver uses usb_phy interface to interact with s3c-hsotg. Supports
> phy_init and phy_shutdown functions to enable/disable phy. Tested with
> smdk6410 and smdkv310. More SoCs can be brought under later.
>
> Signed-off-by: Praveen Paneri <p.paneri@samsung.com>
> Acked-by: Heiko Stuebner <heiko@sntech.de>
> ---
> .../devicetree/bindings/usb/samsung-usbphy.txt | 9 +
> drivers/usb/phy/Kconfig | 8 +
> drivers/usb/phy/Makefile | 1 +
> drivers/usb/phy/samsung-usbphy.c | 360 ++++++++++++++++++++
> include/linux/platform_data/samsung-usbphy.h | 27 ++
> 5 files changed, 405 insertions(+), 0 deletions(-)
> create mode 100644 Documentation/devicetree/bindings/usb/samsung-usbphy.txt
> create mode 100644 drivers/usb/phy/samsung-usbphy.c
> create mode 100644 include/linux/platform_data/samsung-usbphy.h
>
> diff --git a/Documentation/devicetree/bindings/usb/samsung-usbphy.txt b/Documentation/devicetree/bindings/usb/samsung-usbphy.txt
> new file mode 100644
> index 0000000..fefd9c8
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/usb/samsung-usbphy.txt
> @@ -0,0 +1,9 @@
> +* Samsung's usb phy transceiver
> +
> +The Samsung's phy transceiver is used for controlling usb otg phy for
> +s3c-hsotg usb device controller.
> +
> +Required properties:
> +- compatible : should be "samsung,exynos4210-usbphy"
> +- reg : base physical address of the phy registers and length of memory mapped
> + region.
What's missing here is describing the connection of phys to host
controllers. We've got several people adding usb phy bindings and need
to define them in a common way.
Rob
> diff --git a/drivers/usb/phy/Kconfig b/drivers/usb/phy/Kconfig
> index 63c339b..313685f 100644
> --- a/drivers/usb/phy/Kconfig
> +++ b/drivers/usb/phy/Kconfig
> @@ -32,3 +32,11 @@ config MV_U3D_PHY
> help
> Enable this to support Marvell USB 3.0 phy controller for Marvell
> SoC.
> +
> +config SAMSUNG_USBPHY
> + bool "Samsung USB PHY controller Driver"
> + depends on USB_S3C_HSOTG
> + select USB_OTG_UTILS
> + help
> + Enable this to support Samsung USB phy controller for samsung
> + SoCs.
> diff --git a/drivers/usb/phy/Makefile b/drivers/usb/phy/Makefile
> index b069f29..55dcfc1 100644
> --- a/drivers/usb/phy/Makefile
> +++ b/drivers/usb/phy/Makefile
> @@ -8,3 +8,4 @@ obj-$(CONFIG_OMAP_USB2) += omap-usb2.o
> obj-$(CONFIG_USB_ISP1301) += isp1301.o
> obj-$(CONFIG_MV_U3D_PHY) += mv_u3d_phy.o
> obj-$(CONFIG_USB_EHCI_TEGRA) += tegra_usb_phy.o
> +obj-$(CONFIG_SAMSUNG_USBPHY) += samsung-usbphy.o
> diff --git a/drivers/usb/phy/samsung-usbphy.c b/drivers/usb/phy/samsung-usbphy.c
> new file mode 100644
> index 0000000..95ec4d0
> --- /dev/null
> +++ b/drivers/usb/phy/samsung-usbphy.c
> @@ -0,0 +1,360 @@
> +/* linux/drivers/usb/phy/samsung-usbphy.c
> + *
> + * Copyright (c) 2012 Samsung Electronics Co., Ltd.
> + * http://www.samsung.com
> + *
> + * Author: Praveen Paneri <p.paneri@samsung.com>
> + *
> + * Samsung USB2.0 High-speed OTG transceiver, talks to S3C HS OTG controller
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + */
> +
> +#include <linux/module.h>
> +#include <linux/platform_device.h>
> +#include <linux/clk.h>
> +#include <linux/delay.h>
> +#include <linux/err.h>
> +#include <linux/io.h>
> +#include <linux/of.h>
> +#include <linux/usb/otg.h>
> +#include <linux/platform_data/samsung-usbphy.h>
> +
> +/* Register definitions */
> +
> +#define S3C_PHYPWR (0x00)
> +
> +#define S3C_PHYPWR_NORMAL_MASK (0x19 << 0)
> +#define S3C_PHYPWR_OTG_DISABLE (1 << 4)
> +#define S3C_PHYPWR_ANALOG_POWERDOWN (1 << 3)
> +#define S3C_PHYPWR_FORCE_SUSPEND (1 << 1)
> +/* For Exynos4 */
> +#define EXYNOS4_PHYPWR_NORMAL_MASK (0x39 << 0)
> +#define EXYNOS4_PHYPWR_SLEEP (1 << 5)
> +
> +#define S3C_PHYCLK (0x04)
> +
> +#define S3C_PHYCLK_MODE_SERIAL (1 << 6)
> +#define S3C_PHYCLK_EXT_OSC (1 << 5)
> +#define S3C_PHYCLK_COMMON_ON_N (1 << 4)
> +#define S3C_PHYCLK_ID_PULL (1 << 2)
> +#define S3C_PHYCLK_CLKSEL_MASK (0x3 << 0)
> +#define S3C_PHYCLK_CLKSEL_SHIFT (0)
> +#define S3C_PHYCLK_CLKSEL_48M (0x0 << 0)
> +#define S3C_PHYCLK_CLKSEL_12M (0x2 << 0)
> +#define S3C_PHYCLK_CLKSEL_24M (0x3 << 0)
> +
> +#define S3C_RSTCON (0x08)
> +
> +#define S3C_RSTCON_PHYCLK (1 << 2)
> +#define S3C_RSTCON_HCLK (1 << 1)
> +#define S3C_RSTCON_PHY (1 << 0)
> +
> +#ifndef MHZ
> +#define MHZ (1000*1000)
> +#endif
> +
> +enum samsung_cpu_type {
> + TYPE_S3C64XX,
> + TYPE_EXYNOS4210,
> +};
> +
> +/*
> + * struct samsung_usbphy - transceiver driver state
> + * @phy: transceiver structure
> + * @plat: platform data
> + * @dev: The parent device supplied to the probe function
> + * @clk: usb phy clock
> + * @regs: usb phy register memory base
> + * @ref_clk_freq: reference clock frequency selection
> + * @cpu_type: machine identifier
> + */
> +struct samsung_usbphy {
> + struct usb_phy phy;
> + struct samsung_usbphy_data *plat;
> + struct device *dev;
> + struct clk *clk;
> + void __iomem *regs;
> + int ref_clk_freq;
> + int cpu_type;
> +};
> +
> +#define phy_to_sphy(x) container_of((x), struct samsung_usbphy, phy)
> +
> +/*
> + * Returns reference clock frequency selection value
> + */
> +static int samsung_usbphy_get_refclk_freq(struct samsung_usbphy *sphy)
> +{
> + struct clk *ref_clk;
> + int refclk_freq = 0;
> +
> + ref_clk = clk_get(sphy->dev, "xusbxti");
> + if (IS_ERR(ref_clk)) {
> + dev_err(sphy->dev, "Failed to get reference clock\n");
> + return PTR_ERR(ref_clk);
> + }
> +
> + switch (clk_get_rate(ref_clk)) {
> + case 12 * MHZ:
> + refclk_freq |= S3C_PHYCLK_CLKSEL_12M;
> + break;
> + case 24 * MHZ:
> + refclk_freq |= S3C_PHYCLK_CLKSEL_24M;
> + break;
> + default:
> + case 48 * MHZ:
> + /* default reference clock */
> + refclk_freq |= S3C_PHYCLK_CLKSEL_48M;
> + break;
> + }
> + clk_put(ref_clk);
> +
> + return refclk_freq;
> +}
> +
> +static void samsung_usbphy_enable(struct samsung_usbphy *sphy)
> +{
> + void __iomem *regs = sphy->regs;
> + u32 phypwr;
> + u32 phyclk;
> + u32 rstcon;
> +
> + /* set clock frequency for PLL */
> + phyclk = sphy->ref_clk_freq;
> + phypwr = readl(regs + S3C_PHYPWR);
> + rstcon = readl(regs + S3C_RSTCON);
> +
> + switch (sphy->cpu_type) {
> + case TYPE_S3C64XX:
> + phyclk &= ~(S3C_PHYCLK_COMMON_ON_N);
> + phypwr &= ~S3C_PHYPWR_NORMAL_MASK;
> + rstcon |= S3C_RSTCON_PHY;
> + break;
> + case TYPE_EXYNOS4210:
> + phypwr &= ~EXYNOS4_PHYPWR_NORMAL_MASK;
> + rstcon |= S3C_RSTCON_PHY;
> + default:
> + break;
> + }
> +
> + writel(phyclk, regs + S3C_PHYCLK);
> + /* set to normal of PHY0 */
> + writel(phypwr, regs + S3C_PHYPWR);
> + /* reset all ports of PHY and Link */
> + writel(rstcon, regs + S3C_RSTCON);
> + udelay(10);
> + rstcon &= ~S3C_RSTCON_PHY;
> + writel(rstcon, regs + S3C_RSTCON);
> +}
> +
> +static void samsung_usbphy_disable(struct samsung_usbphy *sphy)
> +{
> + void __iomem *regs = sphy->regs;
> + u32 phypwr;
> +
> + phypwr = readl(regs + S3C_PHYPWR);
> +
> + switch (sphy->cpu_type) {
> + case TYPE_S3C64XX:
> + phypwr |= S3C_PHYPWR_NORMAL_MASK;
> + break;
> + case TYPE_EXYNOS4210:
> + phypwr |= EXYNOS4_PHYPWR_NORMAL_MASK;
> + default:
> + break;
> + }
> +
> + /* unset to normal of PHY0 */
> + writel(phypwr, regs + S3C_PHYPWR);
> +}
> +
> +/*
> + * The function passed to the usb driver for phy initialization
> + */
> +static int samsung_usbphy_init(struct usb_phy *phy)
> +{
> + struct samsung_usbphy *sphy;
> + int ret = 0;
> +
> + sphy = phy_to_sphy(phy);
> +
> + /* Enable the phy clock */
> + ret = clk_prepare_enable(sphy->clk);
> + if (ret) {
> + dev_err(sphy->dev, "%s: clk_prepare_enable failed\n", __func__);
> + return ret;
> + }
> +
> + /* Disable phy isolation */
> + if (sphy->plat && sphy->plat->pmu_isolation)
> + sphy->plat->pmu_isolation(false);
> +
> + /* Initialize usb phy registers */
> + samsung_usbphy_enable(sphy);
> +
> + /* Disable the phy clock */
> + clk_disable_unprepare(sphy->clk);
> + return ret;
> +}
> +
> +/*
> + * The function passed to the usb driver for phy shutdown
> + */
> +static void samsung_usbphy_shutdown(struct usb_phy *phy)
> +{
> + struct samsung_usbphy *sphy;
> +
> + sphy = phy_to_sphy(phy);
> +
> + if (clk_prepare_enable(sphy->clk)) {
> + dev_err(sphy->dev, "%s: clk_prepare_enable failed\n", __func__);
> + return;
> + }
> +
> + /* De-initialize usb phy registers */
> + samsung_usbphy_disable(sphy);
> +
> + /* Enable phy isolation */
> + if (sphy->plat && sphy->plat->pmu_isolation)
> + sphy->plat->pmu_isolation(true);
> +
> + clk_disable_unprepare(sphy->clk);
> +}
> +
> +static const struct of_device_id samsung_usbphy_dt_match[];
> +
> +static inline int samsung_usbphy_get_driver_data(struct platform_device *pdev)
> +{
> + if (IS_ENABLED(CONFIG_OF) && pdev->dev.of_node) {
> + int data;
> + const struct of_device_id *match;
> + match = of_match_node(samsung_usbphy_dt_match,
> + pdev->dev.of_node);
> + data = (int) match->data;
> + return data;
> + }
> +
> + return platform_get_device_id(pdev)->driver_data;
> +}
> +
> +static int __devinit samsung_usbphy_probe(struct platform_device *pdev)
> +{
> + struct samsung_usbphy *sphy;
> + struct samsung_usbphy_data *pdata;
> + struct device *dev = &pdev->dev;
> + struct resource *phy_mem;
> + void __iomem *phy_base;
> + struct clk *clk;
> + int ret;
> +
> + pdata = pdev->dev.platform_data;
> + if (!pdata) {
> + dev_err(&pdev->dev, "%s: no platform data defined\n", __func__);
> + return -EINVAL;
> + }
> +
> + phy_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
> + if (!phy_mem) {
> + dev_err(dev, "%s: missing mem resource\n", __func__);
> + return -ENODEV;
> + }
> +
> + phy_base = devm_request_and_ioremap(dev, phy_mem);
> + if (!phy_base) {
> + dev_err(dev, "%s: register mapping failed\n", __func__);
> + return -ENXIO;
> + }
> +
> + sphy = devm_kzalloc(dev, sizeof(*sphy), GFP_KERNEL);
> + if (!sphy)
> + return -ENOMEM;
> +
> + clk = devm_clk_get(dev, "otg");
> + if (IS_ERR(clk)) {
> + dev_err(dev, "Failed to get otg clock\n");
> + return PTR_ERR(clk);
> + }
> +
> + sphy->dev = &pdev->dev;
> + sphy->plat = pdata;
> + sphy->regs = phy_base;
> + sphy->clk = clk;
> + sphy->phy.dev = sphy->dev;
> + sphy->phy.label = "samsung-usbphy";
> + sphy->phy.init = samsung_usbphy_init;
> + sphy->phy.shutdown = samsung_usbphy_shutdown;
> + sphy->cpu_type = samsung_usbphy_get_driver_data(pdev);
> + sphy->ref_clk_freq = samsung_usbphy_get_refclk_freq(sphy);
> +
> + ret = usb_add_phy(&sphy->phy, USB_PHY_TYPE_USB2);
> + if (ret)
> + goto err;
> +
> + platform_set_drvdata(pdev, sphy);
> +err:
> + return ret;
> +}
> +
> +static int __exit samsung_usbphy_remove(struct platform_device *pdev)
> +{
> + struct samsung_usbphy *sphy = platform_get_drvdata(pdev);
> +
> + usb_remove_phy(&sphy->phy);
> +
> + return 0;
> +}
> +
> +#ifdef CONFIG_OF
> +static const struct of_device_id samsung_usbphy_dt_match[] = {
> + {
> + .compatible = "samsung,s3c64xx-usbphy",
> + .data = (void *)TYPE_S3C64XX,
> + }, {
> + .compatible = "samsung,exynos4210-usbphy",
> + .data = (void *)TYPE_EXYNOS4210,
> + },
> + {},
> +};
> +MODULE_DEVICE_TABLE(of, samsung_usbphy_dt_match);
> +#else
> +#define samsung_usbphy_dt_match NULL
> +#endif
> +
> +static struct platform_device_id samsung_usbphy_driver_ids[] = {
> + {
> + .name = "s3c64xx-usbphy",
> + .driver_data = TYPE_S3C64XX,
> + }, {
> + .name = "exynos4210-usbphy",
> + .driver_data = TYPE_EXYNOS4210,
> + },
> + {},
> +};
> +
> +MODULE_DEVICE_TABLE(platform, samsung_usbphy_driver_ids);
> +
> +static struct platform_driver samsung_usbphy_driver = {
> + .probe = samsung_usbphy_probe,
> + .remove = __devexit_p(samsung_usbphy_remove),
> + .id_table = samsung_usbphy_driver_ids,
> + .driver = {
> + .name = "samsung-usbphy",
> + .owner = THIS_MODULE,
> + .of_match_table = samsung_usbphy_dt_match,
> + },
> +};
> +
> +module_platform_driver(samsung_usbphy_driver);
> +
> +MODULE_DESCRIPTION("Samsung USB phy controller");
> +MODULE_AUTHOR("Praveen Paneri <p.paneri@samsung.com>");
> +MODULE_LICENSE("GPL");
> +MODULE_ALIAS("platform:samsung-usbphy");
> diff --git a/include/linux/platform_data/samsung-usbphy.h b/include/linux/platform_data/samsung-usbphy.h
> new file mode 100644
> index 0000000..1bd24cb
> --- /dev/null
> +++ b/include/linux/platform_data/samsung-usbphy.h
> @@ -0,0 +1,27 @@
> +/*
> + * Copyright (C) 2012 Samsung Electronics Co.Ltd
> + * http://www.samsung.com/
> + * Author: Praveen Paneri <p.paneri@samsung.com>
> + *
> + * Defines platform data for samsung usb phy driver.
> + *
> + * This program is free software; you can redistribute it and/or modify it
> + * under the terms of the GNU General Public License as published by the
> + * Free Software Foundation; either version 2 of the License, or (at your
> + * option) any later version.
> + */
> +
> +#ifndef __SAMSUNG_USBPHY_PLATFORM_H
> +#define __SAMSUNG_USBPHY_PLATFORM_H
> +
> +/**
> + * samsung_usbphy_data - Platform data for USB PHY driver.
> + * @pmu_isolation: Function to control usb phy isolation in PMU.
> + */
> +struct samsung_usbphy_data {
> + void (*pmu_isolation)(int on);
> +};
> +
> +extern void samsung_usbphy_set_pdata(struct samsung_usbphy_data *pd);
> +
> +#endif /* __SAMSUNG_USBPHY_PLATFORM_H */
>
^ permalink raw reply [flat|nested] 27+ messages in thread* [PATCH v6 1/5] usb: phy: samsung: Introducing usb phy driver for hsotg
2012-09-24 13:04 ` Rob Herring
@ 2012-09-25 11:23 ` Praveen Paneri
2012-09-25 12:18 ` Rob Herring
0 siblings, 1 reply; 27+ messages in thread
From: Praveen Paneri @ 2012-09-25 11:23 UTC (permalink / raw)
To: linux-arm-kernel
Hi Rob,
On Mon, Sep 24, 2012 at 6:34 PM, Rob Herring <robherring2@gmail.com> wrote:
> On 09/17/2012 07:54 AM, Praveen Paneri wrote:
>> This driver uses usb_phy interface to interact with s3c-hsotg. Supports
>> phy_init and phy_shutdown functions to enable/disable phy. Tested with
>> smdk6410 and smdkv310. More SoCs can be brought under later.
>>
>> Signed-off-by: Praveen Paneri <p.paneri@samsung.com>
>> Acked-by: Heiko Stuebner <heiko@sntech.de>
>> ---
>> .../devicetree/bindings/usb/samsung-usbphy.txt | 9 +
>> drivers/usb/phy/Kconfig | 8 +
>> drivers/usb/phy/Makefile | 1 +
>> drivers/usb/phy/samsung-usbphy.c | 360 ++++++++++++++++++++
>> include/linux/platform_data/samsung-usbphy.h | 27 ++
>> 5 files changed, 405 insertions(+), 0 deletions(-)
>> create mode 100644 Documentation/devicetree/bindings/usb/samsung-usbphy.txt
>> create mode 100644 drivers/usb/phy/samsung-usbphy.c
>> create mode 100644 include/linux/platform_data/samsung-usbphy.h
>>
>> diff --git a/Documentation/devicetree/bindings/usb/samsung-usbphy.txt b/Documentation/devicetree/bindings/usb/samsung-usbphy.txt
>> new file mode 100644
>> index 0000000..fefd9c8
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/usb/samsung-usbphy.txt
>> @@ -0,0 +1,9 @@
>> +* Samsung's usb phy transceiver
>> +
>> +The Samsung's phy transceiver is used for controlling usb otg phy for
>> +s3c-hsotg usb device controller.
>> +
>> +Required properties:
>> +- compatible : should be "samsung,exynos4210-usbphy"
>> +- reg : base physical address of the phy registers and length of memory mapped
>> + region.
>
> What's missing here is describing the connection of phys to host
> controllers. We've got several people adding usb phy bindings and need
> to define them in a common way.
yes! it just covers the generic binding. I will update it accordingly
as the generic phy framework takes its final shape.
Praveen
>
> Rob
>
>> diff --git a/drivers/usb/phy/Kconfig b/drivers/usb/phy/Kconfig
>> index 63c339b..313685f 100644
>> --- a/drivers/usb/phy/Kconfig
>> +++ b/drivers/usb/phy/Kconfig
>> @@ -32,3 +32,11 @@ config MV_U3D_PHY
>> help
>> Enable this to support Marvell USB 3.0 phy controller for Marvell
>> SoC.
>> +
>> +config SAMSUNG_USBPHY
>> + bool "Samsung USB PHY controller Driver"
>> + depends on USB_S3C_HSOTG
>> + select USB_OTG_UTILS
>> + help
>> + Enable this to support Samsung USB phy controller for samsung
>> + SoCs.
>> diff --git a/drivers/usb/phy/Makefile b/drivers/usb/phy/Makefile
>> index b069f29..55dcfc1 100644
>> --- a/drivers/usb/phy/Makefile
>> +++ b/drivers/usb/phy/Makefile
>> @@ -8,3 +8,4 @@ obj-$(CONFIG_OMAP_USB2) += omap-usb2.o
>> obj-$(CONFIG_USB_ISP1301) += isp1301.o
>> obj-$(CONFIG_MV_U3D_PHY) += mv_u3d_phy.o
>> obj-$(CONFIG_USB_EHCI_TEGRA) += tegra_usb_phy.o
>> +obj-$(CONFIG_SAMSUNG_USBPHY) += samsung-usbphy.o
>> diff --git a/drivers/usb/phy/samsung-usbphy.c b/drivers/usb/phy/samsung-usbphy.c
>> new file mode 100644
>> index 0000000..95ec4d0
>> --- /dev/null
>> +++ b/drivers/usb/phy/samsung-usbphy.c
>> @@ -0,0 +1,360 @@
>> +/* linux/drivers/usb/phy/samsung-usbphy.c
>> + *
>> + * Copyright (c) 2012 Samsung Electronics Co., Ltd.
>> + * http://www.samsung.com
>> + *
>> + * Author: Praveen Paneri <p.paneri@samsung.com>
>> + *
>> + * Samsung USB2.0 High-speed OTG transceiver, talks to S3C HS OTG controller
>> + *
>> + * This program is free software; you can redistribute it and/or modify
>> + * it under the terms of the GNU General Public License version 2 as
>> + * published by the Free Software Foundation.
>> + *
>> + * This program is distributed in the hope that it will be useful,
>> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
>> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
>> + * GNU General Public License for more details.
>> + */
>> +
>> +#include <linux/module.h>
>> +#include <linux/platform_device.h>
>> +#include <linux/clk.h>
>> +#include <linux/delay.h>
>> +#include <linux/err.h>
>> +#include <linux/io.h>
>> +#include <linux/of.h>
>> +#include <linux/usb/otg.h>
>> +#include <linux/platform_data/samsung-usbphy.h>
>> +
>> +/* Register definitions */
>> +
>> +#define S3C_PHYPWR (0x00)
>> +
>> +#define S3C_PHYPWR_NORMAL_MASK (0x19 << 0)
>> +#define S3C_PHYPWR_OTG_DISABLE (1 << 4)
>> +#define S3C_PHYPWR_ANALOG_POWERDOWN (1 << 3)
>> +#define S3C_PHYPWR_FORCE_SUSPEND (1 << 1)
>> +/* For Exynos4 */
>> +#define EXYNOS4_PHYPWR_NORMAL_MASK (0x39 << 0)
>> +#define EXYNOS4_PHYPWR_SLEEP (1 << 5)
>> +
>> +#define S3C_PHYCLK (0x04)
>> +
>> +#define S3C_PHYCLK_MODE_SERIAL (1 << 6)
>> +#define S3C_PHYCLK_EXT_OSC (1 << 5)
>> +#define S3C_PHYCLK_COMMON_ON_N (1 << 4)
>> +#define S3C_PHYCLK_ID_PULL (1 << 2)
>> +#define S3C_PHYCLK_CLKSEL_MASK (0x3 << 0)
>> +#define S3C_PHYCLK_CLKSEL_SHIFT (0)
>> +#define S3C_PHYCLK_CLKSEL_48M (0x0 << 0)
>> +#define S3C_PHYCLK_CLKSEL_12M (0x2 << 0)
>> +#define S3C_PHYCLK_CLKSEL_24M (0x3 << 0)
>> +
>> +#define S3C_RSTCON (0x08)
>> +
>> +#define S3C_RSTCON_PHYCLK (1 << 2)
>> +#define S3C_RSTCON_HCLK (1 << 1)
>> +#define S3C_RSTCON_PHY (1 << 0)
>> +
>> +#ifndef MHZ
>> +#define MHZ (1000*1000)
>> +#endif
>> +
>> +enum samsung_cpu_type {
>> + TYPE_S3C64XX,
>> + TYPE_EXYNOS4210,
>> +};
>> +
>> +/*
>> + * struct samsung_usbphy - transceiver driver state
>> + * @phy: transceiver structure
>> + * @plat: platform data
>> + * @dev: The parent device supplied to the probe function
>> + * @clk: usb phy clock
>> + * @regs: usb phy register memory base
>> + * @ref_clk_freq: reference clock frequency selection
>> + * @cpu_type: machine identifier
>> + */
>> +struct samsung_usbphy {
>> + struct usb_phy phy;
>> + struct samsung_usbphy_data *plat;
>> + struct device *dev;
>> + struct clk *clk;
>> + void __iomem *regs;
>> + int ref_clk_freq;
>> + int cpu_type;
>> +};
>> +
>> +#define phy_to_sphy(x) container_of((x), struct samsung_usbphy, phy)
>> +
>> +/*
>> + * Returns reference clock frequency selection value
>> + */
>> +static int samsung_usbphy_get_refclk_freq(struct samsung_usbphy *sphy)
>> +{
>> + struct clk *ref_clk;
>> + int refclk_freq = 0;
>> +
>> + ref_clk = clk_get(sphy->dev, "xusbxti");
>> + if (IS_ERR(ref_clk)) {
>> + dev_err(sphy->dev, "Failed to get reference clock\n");
>> + return PTR_ERR(ref_clk);
>> + }
>> +
>> + switch (clk_get_rate(ref_clk)) {
>> + case 12 * MHZ:
>> + refclk_freq |= S3C_PHYCLK_CLKSEL_12M;
>> + break;
>> + case 24 * MHZ:
>> + refclk_freq |= S3C_PHYCLK_CLKSEL_24M;
>> + break;
>> + default:
>> + case 48 * MHZ:
>> + /* default reference clock */
>> + refclk_freq |= S3C_PHYCLK_CLKSEL_48M;
>> + break;
>> + }
>> + clk_put(ref_clk);
>> +
>> + return refclk_freq;
>> +}
>> +
>> +static void samsung_usbphy_enable(struct samsung_usbphy *sphy)
>> +{
>> + void __iomem *regs = sphy->regs;
>> + u32 phypwr;
>> + u32 phyclk;
>> + u32 rstcon;
>> +
>> + /* set clock frequency for PLL */
>> + phyclk = sphy->ref_clk_freq;
>> + phypwr = readl(regs + S3C_PHYPWR);
>> + rstcon = readl(regs + S3C_RSTCON);
>> +
>> + switch (sphy->cpu_type) {
>> + case TYPE_S3C64XX:
>> + phyclk &= ~(S3C_PHYCLK_COMMON_ON_N);
>> + phypwr &= ~S3C_PHYPWR_NORMAL_MASK;
>> + rstcon |= S3C_RSTCON_PHY;
>> + break;
>> + case TYPE_EXYNOS4210:
>> + phypwr &= ~EXYNOS4_PHYPWR_NORMAL_MASK;
>> + rstcon |= S3C_RSTCON_PHY;
>> + default:
>> + break;
>> + }
>> +
>> + writel(phyclk, regs + S3C_PHYCLK);
>> + /* set to normal of PHY0 */
>> + writel(phypwr, regs + S3C_PHYPWR);
>> + /* reset all ports of PHY and Link */
>> + writel(rstcon, regs + S3C_RSTCON);
>> + udelay(10);
>> + rstcon &= ~S3C_RSTCON_PHY;
>> + writel(rstcon, regs + S3C_RSTCON);
>> +}
>> +
>> +static void samsung_usbphy_disable(struct samsung_usbphy *sphy)
>> +{
>> + void __iomem *regs = sphy->regs;
>> + u32 phypwr;
>> +
>> + phypwr = readl(regs + S3C_PHYPWR);
>> +
>> + switch (sphy->cpu_type) {
>> + case TYPE_S3C64XX:
>> + phypwr |= S3C_PHYPWR_NORMAL_MASK;
>> + break;
>> + case TYPE_EXYNOS4210:
>> + phypwr |= EXYNOS4_PHYPWR_NORMAL_MASK;
>> + default:
>> + break;
>> + }
>> +
>> + /* unset to normal of PHY0 */
>> + writel(phypwr, regs + S3C_PHYPWR);
>> +}
>> +
>> +/*
>> + * The function passed to the usb driver for phy initialization
>> + */
>> +static int samsung_usbphy_init(struct usb_phy *phy)
>> +{
>> + struct samsung_usbphy *sphy;
>> + int ret = 0;
>> +
>> + sphy = phy_to_sphy(phy);
>> +
>> + /* Enable the phy clock */
>> + ret = clk_prepare_enable(sphy->clk);
>> + if (ret) {
>> + dev_err(sphy->dev, "%s: clk_prepare_enable failed\n", __func__);
>> + return ret;
>> + }
>> +
>> + /* Disable phy isolation */
>> + if (sphy->plat && sphy->plat->pmu_isolation)
>> + sphy->plat->pmu_isolation(false);
>> +
>> + /* Initialize usb phy registers */
>> + samsung_usbphy_enable(sphy);
>> +
>> + /* Disable the phy clock */
>> + clk_disable_unprepare(sphy->clk);
>> + return ret;
>> +}
>> +
>> +/*
>> + * The function passed to the usb driver for phy shutdown
>> + */
>> +static void samsung_usbphy_shutdown(struct usb_phy *phy)
>> +{
>> + struct samsung_usbphy *sphy;
>> +
>> + sphy = phy_to_sphy(phy);
>> +
>> + if (clk_prepare_enable(sphy->clk)) {
>> + dev_err(sphy->dev, "%s: clk_prepare_enable failed\n", __func__);
>> + return;
>> + }
>> +
>> + /* De-initialize usb phy registers */
>> + samsung_usbphy_disable(sphy);
>> +
>> + /* Enable phy isolation */
>> + if (sphy->plat && sphy->plat->pmu_isolation)
>> + sphy->plat->pmu_isolation(true);
>> +
>> + clk_disable_unprepare(sphy->clk);
>> +}
>> +
>> +static const struct of_device_id samsung_usbphy_dt_match[];
>> +
>> +static inline int samsung_usbphy_get_driver_data(struct platform_device *pdev)
>> +{
>> + if (IS_ENABLED(CONFIG_OF) && pdev->dev.of_node) {
>> + int data;
>> + const struct of_device_id *match;
>> + match = of_match_node(samsung_usbphy_dt_match,
>> + pdev->dev.of_node);
>> + data = (int) match->data;
>> + return data;
>> + }
>> +
>> + return platform_get_device_id(pdev)->driver_data;
>> +}
>> +
>> +static int __devinit samsung_usbphy_probe(struct platform_device *pdev)
>> +{
>> + struct samsung_usbphy *sphy;
>> + struct samsung_usbphy_data *pdata;
>> + struct device *dev = &pdev->dev;
>> + struct resource *phy_mem;
>> + void __iomem *phy_base;
>> + struct clk *clk;
>> + int ret;
>> +
>> + pdata = pdev->dev.platform_data;
>> + if (!pdata) {
>> + dev_err(&pdev->dev, "%s: no platform data defined\n", __func__);
>> + return -EINVAL;
>> + }
>> +
>> + phy_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
>> + if (!phy_mem) {
>> + dev_err(dev, "%s: missing mem resource\n", __func__);
>> + return -ENODEV;
>> + }
>> +
>> + phy_base = devm_request_and_ioremap(dev, phy_mem);
>> + if (!phy_base) {
>> + dev_err(dev, "%s: register mapping failed\n", __func__);
>> + return -ENXIO;
>> + }
>> +
>> + sphy = devm_kzalloc(dev, sizeof(*sphy), GFP_KERNEL);
>> + if (!sphy)
>> + return -ENOMEM;
>> +
>> + clk = devm_clk_get(dev, "otg");
>> + if (IS_ERR(clk)) {
>> + dev_err(dev, "Failed to get otg clock\n");
>> + return PTR_ERR(clk);
>> + }
>> +
>> + sphy->dev = &pdev->dev;
>> + sphy->plat = pdata;
>> + sphy->regs = phy_base;
>> + sphy->clk = clk;
>> + sphy->phy.dev = sphy->dev;
>> + sphy->phy.label = "samsung-usbphy";
>> + sphy->phy.init = samsung_usbphy_init;
>> + sphy->phy.shutdown = samsung_usbphy_shutdown;
>> + sphy->cpu_type = samsung_usbphy_get_driver_data(pdev);
>> + sphy->ref_clk_freq = samsung_usbphy_get_refclk_freq(sphy);
>> +
>> + ret = usb_add_phy(&sphy->phy, USB_PHY_TYPE_USB2);
>> + if (ret)
>> + goto err;
>> +
>> + platform_set_drvdata(pdev, sphy);
>> +err:
>> + return ret;
>> +}
>> +
>> +static int __exit samsung_usbphy_remove(struct platform_device *pdev)
>> +{
>> + struct samsung_usbphy *sphy = platform_get_drvdata(pdev);
>> +
>> + usb_remove_phy(&sphy->phy);
>> +
>> + return 0;
>> +}
>> +
>> +#ifdef CONFIG_OF
>> +static const struct of_device_id samsung_usbphy_dt_match[] = {
>> + {
>> + .compatible = "samsung,s3c64xx-usbphy",
>> + .data = (void *)TYPE_S3C64XX,
>> + }, {
>> + .compatible = "samsung,exynos4210-usbphy",
>> + .data = (void *)TYPE_EXYNOS4210,
>> + },
>> + {},
>> +};
>> +MODULE_DEVICE_TABLE(of, samsung_usbphy_dt_match);
>> +#else
>> +#define samsung_usbphy_dt_match NULL
>> +#endif
>> +
>> +static struct platform_device_id samsung_usbphy_driver_ids[] = {
>> + {
>> + .name = "s3c64xx-usbphy",
>> + .driver_data = TYPE_S3C64XX,
>> + }, {
>> + .name = "exynos4210-usbphy",
>> + .driver_data = TYPE_EXYNOS4210,
>> + },
>> + {},
>> +};
>> +
>> +MODULE_DEVICE_TABLE(platform, samsung_usbphy_driver_ids);
>> +
>> +static struct platform_driver samsung_usbphy_driver = {
>> + .probe = samsung_usbphy_probe,
>> + .remove = __devexit_p(samsung_usbphy_remove),
>> + .id_table = samsung_usbphy_driver_ids,
>> + .driver = {
>> + .name = "samsung-usbphy",
>> + .owner = THIS_MODULE,
>> + .of_match_table = samsung_usbphy_dt_match,
>> + },
>> +};
>> +
>> +module_platform_driver(samsung_usbphy_driver);
>> +
>> +MODULE_DESCRIPTION("Samsung USB phy controller");
>> +MODULE_AUTHOR("Praveen Paneri <p.paneri@samsung.com>");
>> +MODULE_LICENSE("GPL");
>> +MODULE_ALIAS("platform:samsung-usbphy");
>> diff --git a/include/linux/platform_data/samsung-usbphy.h b/include/linux/platform_data/samsung-usbphy.h
>> new file mode 100644
>> index 0000000..1bd24cb
>> --- /dev/null
>> +++ b/include/linux/platform_data/samsung-usbphy.h
>> @@ -0,0 +1,27 @@
>> +/*
>> + * Copyright (C) 2012 Samsung Electronics Co.Ltd
>> + * http://www.samsung.com/
>> + * Author: Praveen Paneri <p.paneri@samsung.com>
>> + *
>> + * Defines platform data for samsung usb phy driver.
>> + *
>> + * This program is free software; you can redistribute it and/or modify it
>> + * under the terms of the GNU General Public License as published by the
>> + * Free Software Foundation; either version 2 of the License, or (at your
>> + * option) any later version.
>> + */
>> +
>> +#ifndef __SAMSUNG_USBPHY_PLATFORM_H
>> +#define __SAMSUNG_USBPHY_PLATFORM_H
>> +
>> +/**
>> + * samsung_usbphy_data - Platform data for USB PHY driver.
>> + * @pmu_isolation: Function to control usb phy isolation in PMU.
>> + */
>> +struct samsung_usbphy_data {
>> + void (*pmu_isolation)(int on);
>> +};
>> +
>> +extern void samsung_usbphy_set_pdata(struct samsung_usbphy_data *pd);
>> +
>> +#endif /* __SAMSUNG_USBPHY_PLATFORM_H */
>>
>
> --
> To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in
> the body of a message to majordomo at vger.kernel.org
> More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply [flat|nested] 27+ messages in thread* [PATCH v6 1/5] usb: phy: samsung: Introducing usb phy driver for hsotg
2012-09-25 11:23 ` Praveen Paneri
@ 2012-09-25 12:18 ` Rob Herring
2012-09-25 13:17 ` ABRAHAM, KISHON VIJAY
0 siblings, 1 reply; 27+ messages in thread
From: Rob Herring @ 2012-09-25 12:18 UTC (permalink / raw)
To: linux-arm-kernel
On 09/25/2012 06:23 AM, Praveen Paneri wrote:
> Hi Rob,
>
> On Mon, Sep 24, 2012 at 6:34 PM, Rob Herring <robherring2@gmail.com> wrote:
>> On 09/17/2012 07:54 AM, Praveen Paneri wrote:
>>> This driver uses usb_phy interface to interact with s3c-hsotg. Supports
>>> phy_init and phy_shutdown functions to enable/disable phy. Tested with
>>> smdk6410 and smdkv310. More SoCs can be brought under later.
>>>
>>> Signed-off-by: Praveen Paneri <p.paneri@samsung.com>
>>> Acked-by: Heiko Stuebner <heiko@sntech.de>
>>> ---
>>> .../devicetree/bindings/usb/samsung-usbphy.txt | 9 +
>>> drivers/usb/phy/Kconfig | 8 +
>>> drivers/usb/phy/Makefile | 1 +
>>> drivers/usb/phy/samsung-usbphy.c | 360 ++++++++++++++++++++
>>> include/linux/platform_data/samsung-usbphy.h | 27 ++
>>> 5 files changed, 405 insertions(+), 0 deletions(-)
>>> create mode 100644 Documentation/devicetree/bindings/usb/samsung-usbphy.txt
>>> create mode 100644 drivers/usb/phy/samsung-usbphy.c
>>> create mode 100644 include/linux/platform_data/samsung-usbphy.h
>>>
>>> diff --git a/Documentation/devicetree/bindings/usb/samsung-usbphy.txt b/Documentation/devicetree/bindings/usb/samsung-usbphy.txt
>>> new file mode 100644
>>> index 0000000..fefd9c8
>>> --- /dev/null
>>> +++ b/Documentation/devicetree/bindings/usb/samsung-usbphy.txt
>>> @@ -0,0 +1,9 @@
>>> +* Samsung's usb phy transceiver
>>> +
>>> +The Samsung's phy transceiver is used for controlling usb otg phy for
>>> +s3c-hsotg usb device controller.
>>> +
>>> +Required properties:
>>> +- compatible : should be "samsung,exynos4210-usbphy"
>>> +- reg : base physical address of the phy registers and length of memory mapped
>>> + region.
>>
>> What's missing here is describing the connection of phys to host
>> controllers. We've got several people adding usb phy bindings and need
>> to define them in a common way.
> yes! it just covers the generic binding. I will update it accordingly
> as the generic phy framework takes its final shape.
That sounds like the wrong way to define a binding... Figuring out how
to describe the h/w should not be dependent on changes in the kernel.
Bindings are an ABI and should not be evolving.
Rob
^ permalink raw reply [flat|nested] 27+ messages in thread
* [PATCH v6 1/5] usb: phy: samsung: Introducing usb phy driver for hsotg
2012-09-25 12:18 ` Rob Herring
@ 2012-09-25 13:17 ` ABRAHAM, KISHON VIJAY
2012-09-26 7:14 ` Praveen Paneri
0 siblings, 1 reply; 27+ messages in thread
From: ABRAHAM, KISHON VIJAY @ 2012-09-25 13:17 UTC (permalink / raw)
To: linux-arm-kernel
Hi,
On Tue, Sep 25, 2012 at 5:48 PM, Rob Herring <robherring2@gmail.com> wrote:
> On 09/25/2012 06:23 AM, Praveen Paneri wrote:
>> Hi Rob,
>>
>> On Mon, Sep 24, 2012 at 6:34 PM, Rob Herring <robherring2@gmail.com> wrote:
>>> On 09/17/2012 07:54 AM, Praveen Paneri wrote:
>>>> This driver uses usb_phy interface to interact with s3c-hsotg. Supports
>>>> phy_init and phy_shutdown functions to enable/disable phy. Tested with
>>>> smdk6410 and smdkv310. More SoCs can be brought under later.
>>>>
>>>> Signed-off-by: Praveen Paneri <p.paneri@samsung.com>
>>>> Acked-by: Heiko Stuebner <heiko@sntech.de>
>>>> ---
>>>> .../devicetree/bindings/usb/samsung-usbphy.txt | 9 +
>>>> drivers/usb/phy/Kconfig | 8 +
>>>> drivers/usb/phy/Makefile | 1 +
>>>> drivers/usb/phy/samsung-usbphy.c | 360 ++++++++++++++++++++
>>>> include/linux/platform_data/samsung-usbphy.h | 27 ++
>>>> 5 files changed, 405 insertions(+), 0 deletions(-)
>>>> create mode 100644 Documentation/devicetree/bindings/usb/samsung-usbphy.txt
>>>> create mode 100644 drivers/usb/phy/samsung-usbphy.c
>>>> create mode 100644 include/linux/platform_data/samsung-usbphy.h
>>>>
>>>> diff --git a/Documentation/devicetree/bindings/usb/samsung-usbphy.txt b/Documentation/devicetree/bindings/usb/samsung-usbphy.txt
>>>> new file mode 100644
>>>> index 0000000..fefd9c8
>>>> --- /dev/null
>>>> +++ b/Documentation/devicetree/bindings/usb/samsung-usbphy.txt
>>>> @@ -0,0 +1,9 @@
>>>> +* Samsung's usb phy transceiver
>>>> +
>>>> +The Samsung's phy transceiver is used for controlling usb otg phy for
>>>> +s3c-hsotg usb device controller.
>>>> +
>>>> +Required properties:
>>>> +- compatible : should be "samsung,exynos4210-usbphy"
>>>> +- reg : base physical address of the phy registers and length of memory mapped
>>>> + region.
>>>
>>> What's missing here is describing the connection of phys to host
>>> controllers. We've got several people adding usb phy bindings and need
>>> to define them in a common way.
>> yes! it just covers the generic binding. I will update it accordingly
>> as the generic phy framework takes its final shape.
>
> That sounds like the wrong way to define a binding... Figuring out how
> to describe the h/w should not be dependent on changes in the kernel.
> Bindings are an ABI and should not be evolving.
There can be multiple ways to define the binding. For e.g. We
discussed few ways of binding the phys to the controller
controller {
phy0 = <&phandle1_name>;
phy1 = <&phandle2_name>;
}
phy0 and phy1 are any name given to obtain a reference to the phy and
the controller should send the phandle name like
get_phy_by_phandle("phy0");. Then we thought of standardizing that
name.
and then finally we settled on something like this
controller {
phy = <&phandle0_name>, <&phandle1_name>;
}
so that controller can obtain a reference to the PHY using
*of_phy_get(struct device *dev, const char *phandle, u8 index)*
Thanks
Kishon
^ permalink raw reply [flat|nested] 27+ messages in thread* [PATCH v6 1/5] usb: phy: samsung: Introducing usb phy driver for hsotg
2012-09-25 13:17 ` ABRAHAM, KISHON VIJAY
@ 2012-09-26 7:14 ` Praveen Paneri
0 siblings, 0 replies; 27+ messages in thread
From: Praveen Paneri @ 2012-09-26 7:14 UTC (permalink / raw)
To: linux-arm-kernel
Hi,
On Tue, Sep 25, 2012 at 6:47 PM, ABRAHAM, KISHON VIJAY <kishon@ti.com> wrote:
> Hi,
>
> On Tue, Sep 25, 2012 at 5:48 PM, Rob Herring <robherring2@gmail.com> wrote:
>> On 09/25/2012 06:23 AM, Praveen Paneri wrote:
>>> Hi Rob,
>>>
>>> On Mon, Sep 24, 2012 at 6:34 PM, Rob Herring <robherring2@gmail.com> wrote:
>>>> On 09/17/2012 07:54 AM, Praveen Paneri wrote:
>>>>> This driver uses usb_phy interface to interact with s3c-hsotg. Supports
>>>>> phy_init and phy_shutdown functions to enable/disable phy. Tested with
>>>>> smdk6410 and smdkv310. More SoCs can be brought under later.
>>>>>
>>>>> Signed-off-by: Praveen Paneri <p.paneri@samsung.com>
>>>>> Acked-by: Heiko Stuebner <heiko@sntech.de>
>>>>> ---
>>>>> .../devicetree/bindings/usb/samsung-usbphy.txt | 9 +
>>>>> drivers/usb/phy/Kconfig | 8 +
>>>>> drivers/usb/phy/Makefile | 1 +
>>>>> drivers/usb/phy/samsung-usbphy.c | 360 ++++++++++++++++++++
>>>>> include/linux/platform_data/samsung-usbphy.h | 27 ++
>>>>> 5 files changed, 405 insertions(+), 0 deletions(-)
>>>>> create mode 100644 Documentation/devicetree/bindings/usb/samsung-usbphy.txt
>>>>> create mode 100644 drivers/usb/phy/samsung-usbphy.c
>>>>> create mode 100644 include/linux/platform_data/samsung-usbphy.h
>>>>>
>>>>> diff --git a/Documentation/devicetree/bindings/usb/samsung-usbphy.txt b/Documentation/devicetree/bindings/usb/samsung-usbphy.txt
>>>>> new file mode 100644
>>>>> index 0000000..fefd9c8
>>>>> --- /dev/null
>>>>> +++ b/Documentation/devicetree/bindings/usb/samsung-usbphy.txt
>>>>> @@ -0,0 +1,9 @@
>>>>> +* Samsung's usb phy transceiver
>>>>> +
>>>>> +The Samsung's phy transceiver is used for controlling usb otg phy for
>>>>> +s3c-hsotg usb device controller.
>>>>> +
>>>>> +Required properties:
>>>>> +- compatible : should be "samsung,exynos4210-usbphy"
>>>>> +- reg : base physical address of the phy registers and length of memory mapped
>>>>> + region.
>>>>
>>>> What's missing here is describing the connection of phys to host
>>>> controllers. We've got several people adding usb phy bindings and need
>>>> to define them in a common way.
>>> yes! it just covers the generic binding. I will update it accordingly
>>> as the generic phy framework takes its final shape.
>>
>> That sounds like the wrong way to define a binding... Figuring out how
>> to describe the h/w should not be dependent on changes in the kernel.
>> Bindings are an ABI and should not be evolving.
But since Kishon is getting the generic bindings ready, I can use them
when those are ready. So do we need to hold the merge of this patch
until then?
Thanks,
Praveen
>
> There can be multiple ways to define the binding. For e.g. We
> discussed few ways of binding the phys to the controller
>
> controller {
> phy0 = <&phandle1_name>;
> phy1 = <&phandle2_name>;
> }
>
> phy0 and phy1 are any name given to obtain a reference to the phy and
> the controller should send the phandle name like
> get_phy_by_phandle("phy0");. Then we thought of standardizing that
> name.
>
> and then finally we settled on something like this
> controller {
> phy = <&phandle0_name>, <&phandle1_name>;
> }
> so that controller can obtain a reference to the PHY using
> *of_phy_get(struct device *dev, const char *phandle, u8 index)*
>
> Thanks
> Kishon
> --
> To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in
> the body of a message to majordomo at vger.kernel.org
> More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply [flat|nested] 27+ messages in thread
* [PATCH v6 2/5] usb: s3c-hsotg: Adding phy driver support
2012-09-17 12:54 [PATCH v6 0/5] usb: phy: samsung: Introducing usb phy driver for samsung SoCs Praveen Paneri
2012-09-17 12:54 ` [PATCH v6 1/5] usb: phy: samsung: Introducing usb phy driver for hsotg Praveen Paneri
@ 2012-09-17 12:54 ` Praveen Paneri
2012-09-17 12:54 ` [PATCH v6 3/5] ARM: S3C64XX: Removing old phy setup code Praveen Paneri
` (2 subsequent siblings)
4 siblings, 0 replies; 27+ messages in thread
From: Praveen Paneri @ 2012-09-17 12:54 UTC (permalink / raw)
To: linux-arm-kernel
Adding the transceiver to hsotg driver. Keeping the platform data
for continuing the smooth operation for boards which still uses it
Signed-off-by: Praveen Paneri <p.paneri@samsung.com>
---
drivers/usb/gadget/s3c-hsotg.c | 37 +++++++++++++++++++++++++++----------
1 files changed, 27 insertions(+), 10 deletions(-)
diff --git a/drivers/usb/gadget/s3c-hsotg.c b/drivers/usb/gadget/s3c-hsotg.c
index 6f696ee..29815b9 100644
--- a/drivers/usb/gadget/s3c-hsotg.c
+++ b/drivers/usb/gadget/s3c-hsotg.c
@@ -32,6 +32,7 @@
#include <linux/usb/ch9.h>
#include <linux/usb/gadget.h>
+#include <linux/usb/otg.h>
#include <linux/platform_data/s3c-hsotg.h>
#include <mach/map.h>
@@ -133,7 +134,9 @@ struct s3c_hsotg_ep {
* struct s3c_hsotg - driver state.
* @dev: The parent device supplied to the probe function
* @driver: USB gadget driver
- * @plat: The platform specific configuration data.
+ * @phy: The otg phy transceiver structure for phy control.
+ * @plat: The platform specific configuration data. This can be removed once
+ * all SoCs support usb transceiver.
* @regs: The memory area mapped for accessing registers.
* @irq: The IRQ number we are using
* @supplies: Definition of USB power supplies
@@ -153,6 +156,7 @@ struct s3c_hsotg_ep {
struct s3c_hsotg {
struct device *dev;
struct usb_gadget_driver *driver;
+ struct usb_phy *phy;
struct s3c_hsotg_plat *plat;
spinlock_t lock;
@@ -2854,7 +2858,10 @@ static void s3c_hsotg_phy_enable(struct s3c_hsotg *hsotg)
struct platform_device *pdev = to_platform_device(hsotg->dev);
dev_dbg(hsotg->dev, "pdev 0x%p\n", pdev);
- if (hsotg->plat->phy_init)
+
+ if (hsotg->phy)
+ usb_phy_init(hsotg->phy);
+ else if (hsotg->plat->phy_init)
hsotg->plat->phy_init(pdev, hsotg->plat->phy_type);
}
@@ -2869,7 +2876,9 @@ static void s3c_hsotg_phy_disable(struct s3c_hsotg *hsotg)
{
struct platform_device *pdev = to_platform_device(hsotg->dev);
- if (hsotg->plat->phy_exit)
+ if (hsotg->phy)
+ usb_phy_shutdown(hsotg->phy);
+ else if (hsotg->plat->phy_exit)
hsotg->plat->phy_exit(pdev, hsotg->plat->phy_type);
}
@@ -3493,6 +3502,7 @@ static void s3c_hsotg_release(struct device *dev)
static int __devinit s3c_hsotg_probe(struct platform_device *pdev)
{
struct s3c_hsotg_plat *plat = pdev->dev.platform_data;
+ struct usb_phy *phy;
struct device *dev = &pdev->dev;
struct s3c_hsotg_ep *eps;
struct s3c_hsotg *hsotg;
@@ -3501,20 +3511,27 @@ static int __devinit s3c_hsotg_probe(struct platform_device *pdev)
int ret;
int i;
- plat = pdev->dev.platform_data;
- if (!plat) {
- dev_err(&pdev->dev, "no platform data defined\n");
- return -EINVAL;
- }
-
hsotg = devm_kzalloc(&pdev->dev, sizeof(struct s3c_hsotg), GFP_KERNEL);
if (!hsotg) {
dev_err(dev, "cannot get memory\n");
return -ENOMEM;
}
+ plat = pdev->dev.platform_data;
+ if (!plat) {
+ /* Fallback for transceiver */
+ phy = devm_usb_get_phy(dev, USB_PHY_TYPE_USB2);
+ if (IS_ERR_OR_NULL(phy)) {
+ dev_err(&pdev->dev, "no platform data or transceiver defined\n");
+ return -EPROBE_DEFER;
+ } else {
+ hsotg->phy = phy;
+ }
+ } else {
+ hsotg->plat = plat;
+ }
+
hsotg->dev = dev;
- hsotg->plat = plat;
hsotg->clk = devm_clk_get(&pdev->dev, "otg");
if (IS_ERR(hsotg->clk)) {
--
1.7.1
^ permalink raw reply related [flat|nested] 27+ messages in thread* [PATCH v6 3/5] ARM: S3C64XX: Removing old phy setup code
2012-09-17 12:54 [PATCH v6 0/5] usb: phy: samsung: Introducing usb phy driver for samsung SoCs Praveen Paneri
2012-09-17 12:54 ` [PATCH v6 1/5] usb: phy: samsung: Introducing usb phy driver for hsotg Praveen Paneri
2012-09-17 12:54 ` [PATCH v6 2/5] usb: s3c-hsotg: Adding phy driver support Praveen Paneri
@ 2012-09-17 12:54 ` Praveen Paneri
2012-09-17 12:54 ` [PATCH v6 4/5] ARM: S3C64XX: Enabling samsung-usbphy driver Praveen Paneri
2012-09-17 12:54 ` [PATCH v6 5/5] ARM: Exynos4210: " Praveen Paneri
4 siblings, 0 replies; 27+ messages in thread
From: Praveen Paneri @ 2012-09-17 12:54 UTC (permalink / raw)
To: linux-arm-kernel
This patch removes old phy code from platform side. 'setup-usb-phy.c'
will be used for providing transceiver platform data in next
patch. Not all of the platform data code is removed as there are others
making use of platform_data defined for hsotg. That can be removed once
all the SoCs start using the new transceiver for usb phy setup.
Signed-off-by: Praveen Paneri <p.paneri@samsung.com>
---
arch/arm/mach-s3c64xx/mach-crag6410.c | 3 -
arch/arm/mach-s3c64xx/mach-smartq.c | 3 -
arch/arm/mach-s3c64xx/mach-smdk6410.c | 3 -
arch/arm/mach-s3c64xx/setup-usb-phy.c | 79 ---------------------------------
4 files changed, 0 insertions(+), 88 deletions(-)
diff --git a/arch/arm/mach-s3c64xx/mach-crag6410.c b/arch/arm/mach-s3c64xx/mach-crag6410.c
index 09cd812..b0f5baf 100644
--- a/arch/arm/mach-s3c64xx/mach-crag6410.c
+++ b/arch/arm/mach-s3c64xx/mach-crag6410.c
@@ -31,7 +31,6 @@
#include <linux/spi/spi.h>
#include <linux/i2c/pca953x.h>
-#include <linux/platform_data/s3c-hsotg.h>
#include <video/platform_lcd.h>
@@ -766,7 +765,6 @@ static const struct gpio_led_platform_data gpio_leds_pdata = {
.num_leds = ARRAY_SIZE(gpio_leds),
};
-static struct s3c_hsotg_plat crag6410_hsotg_pdata;
static void __init crag6410_machine_init(void)
{
@@ -792,7 +790,6 @@ static void __init crag6410_machine_init(void)
s3c_i2c0_set_platdata(&i2c0_pdata);
s3c_i2c1_set_platdata(&i2c1_pdata);
s3c_fb_set_platdata(&crag6410_lcd_pdata);
- s3c_hsotg_set_platdata(&crag6410_hsotg_pdata);
i2c_register_board_info(0, i2c_devs0, ARRAY_SIZE(i2c_devs0));
i2c_register_board_info(1, i2c_devs1, ARRAY_SIZE(i2c_devs1));
diff --git a/arch/arm/mach-s3c64xx/mach-smartq.c b/arch/arm/mach-s3c64xx/mach-smartq.c
index ceeb1de..7400da1 100644
--- a/arch/arm/mach-s3c64xx/mach-smartq.c
+++ b/arch/arm/mach-s3c64xx/mach-smartq.c
@@ -18,7 +18,6 @@
#include <linux/serial_core.h>
#include <linux/spi/spi_gpio.h>
#include <linux/usb/gpio_vbus.h>
-#include <linux/platform_data/s3c-hsotg.h>
#include <asm/mach-types.h>
#include <asm/mach/map.h>
@@ -187,7 +186,6 @@ static struct s3c_hwmon_pdata smartq_hwmon_pdata __initdata = {
},
};
-static struct s3c_hsotg_plat smartq_hsotg_pdata;
static int __init smartq_lcd_setup_gpio(void)
{
@@ -385,7 +383,6 @@ void __init smartq_map_io(void)
void __init smartq_machine_init(void)
{
s3c_i2c0_set_platdata(NULL);
- s3c_hsotg_set_platdata(&smartq_hsotg_pdata);
s3c_hwmon_set_platdata(&smartq_hwmon_pdata);
s3c_sdhci1_set_platdata(&smartq_internal_hsmmc_pdata);
s3c_sdhci2_set_platdata(&smartq_internal_hsmmc_pdata);
diff --git a/arch/arm/mach-s3c64xx/mach-smdk6410.c b/arch/arm/mach-s3c64xx/mach-smdk6410.c
index 0fe4f15..cbdc91b 100644
--- a/arch/arm/mach-s3c64xx/mach-smdk6410.c
+++ b/arch/arm/mach-s3c64xx/mach-smdk6410.c
@@ -30,7 +30,6 @@
#include <linux/regulator/fixed.h>
#include <linux/regulator/machine.h>
#include <linux/pwm_backlight.h>
-#include <linux/platform_data/s3c-hsotg.h>
#ifdef CONFIG_SMDK6410_WM1190_EV1
#include <linux/mfd/wm8350/core.h>
@@ -627,7 +626,6 @@ static struct platform_pwm_backlight_data smdk6410_bl_data = {
.pwm_id = 1,
};
-static struct s3c_hsotg_plat smdk6410_hsotg_pdata;
static void __init smdk6410_map_io(void)
{
@@ -657,7 +655,6 @@ static void __init smdk6410_machine_init(void)
s3c_i2c0_set_platdata(NULL);
s3c_i2c1_set_platdata(NULL);
s3c_fb_set_platdata(&smdk6410_lcd_pdata);
- s3c_hsotg_set_platdata(&smdk6410_hsotg_pdata);
samsung_keypad_set_platdata(&smdk6410_keypad_data);
diff --git a/arch/arm/mach-s3c64xx/setup-usb-phy.c b/arch/arm/mach-s3c64xx/setup-usb-phy.c
index f6757e0..7a09553 100644
--- a/arch/arm/mach-s3c64xx/setup-usb-phy.c
+++ b/arch/arm/mach-s3c64xx/setup-usb-phy.c
@@ -9,82 +9,3 @@
*
*/
-#include <linux/clk.h>
-#include <linux/delay.h>
-#include <linux/err.h>
-#include <linux/io.h>
-#include <linux/platform_device.h>
-#include <mach/map.h>
-#include <mach/regs-sys.h>
-#include <plat/cpu.h>
-#include <plat/regs-usb-hsotg-phy.h>
-#include <plat/usb-phy.h>
-
-static int s3c_usb_otgphy_init(struct platform_device *pdev)
-{
- struct clk *xusbxti;
- u32 phyclk;
-
- writel(readl(S3C64XX_OTHERS) | S3C64XX_OTHERS_USBMASK, S3C64XX_OTHERS);
-
- /* set clock frequency for PLL */
- phyclk = readl(S3C_PHYCLK) & ~S3C_PHYCLK_CLKSEL_MASK;
-
- xusbxti = clk_get(&pdev->dev, "xusbxti");
- if (xusbxti && !IS_ERR(xusbxti)) {
- switch (clk_get_rate(xusbxti)) {
- case 12 * MHZ:
- phyclk |= S3C_PHYCLK_CLKSEL_12M;
- break;
- case 24 * MHZ:
- phyclk |= S3C_PHYCLK_CLKSEL_24M;
- break;
- default:
- case 48 * MHZ:
- /* default reference clock */
- break;
- }
- clk_put(xusbxti);
- }
-
- /* TODO: select external clock/oscillator */
- writel(phyclk | S3C_PHYCLK_CLK_FORCE, S3C_PHYCLK);
-
- /* set to normal OTG PHY */
- writel((readl(S3C_PHYPWR) & ~S3C_PHYPWR_NORMAL_MASK), S3C_PHYPWR);
- mdelay(1);
-
- /* reset OTG PHY and Link */
- writel(S3C_RSTCON_PHY | S3C_RSTCON_HCLK | S3C_RSTCON_PHYCLK,
- S3C_RSTCON);
- udelay(20); /* at-least 10uS */
- writel(0, S3C_RSTCON);
-
- return 0;
-}
-
-static int s3c_usb_otgphy_exit(struct platform_device *pdev)
-{
- writel((readl(S3C_PHYPWR) | S3C_PHYPWR_ANALOG_POWERDOWN |
- S3C_PHYPWR_OTG_DISABLE), S3C_PHYPWR);
-
- writel(readl(S3C64XX_OTHERS) & ~S3C64XX_OTHERS_USBMASK, S3C64XX_OTHERS);
-
- return 0;
-}
-
-int s5p_usb_phy_init(struct platform_device *pdev, int type)
-{
- if (type == S5P_USB_PHY_DEVICE)
- return s3c_usb_otgphy_init(pdev);
-
- return -EINVAL;
-}
-
-int s5p_usb_phy_exit(struct platform_device *pdev, int type)
-{
- if (type == S5P_USB_PHY_DEVICE)
- return s3c_usb_otgphy_exit(pdev);
-
- return -EINVAL;
-}
--
1.7.1
^ permalink raw reply related [flat|nested] 27+ messages in thread* [PATCH v6 4/5] ARM: S3C64XX: Enabling samsung-usbphy driver
2012-09-17 12:54 [PATCH v6 0/5] usb: phy: samsung: Introducing usb phy driver for samsung SoCs Praveen Paneri
` (2 preceding siblings ...)
2012-09-17 12:54 ` [PATCH v6 3/5] ARM: S3C64XX: Removing old phy setup code Praveen Paneri
@ 2012-09-17 12:54 ` Praveen Paneri
2012-09-17 12:54 ` [PATCH v6 5/5] ARM: Exynos4210: " Praveen Paneri
4 siblings, 0 replies; 27+ messages in thread
From: Praveen Paneri @ 2012-09-17 12:54 UTC (permalink / raw)
To: linux-arm-kernel
Adding platform device for samsung-usbphy driver. Enabling it for
s3c64xx based machines using s3c-hsotg.
Signed-off-by: Praveen Paneri <p.paneri@samsung.com>
---
arch/arm/mach-s3c64xx/include/mach/map.h | 2 +
arch/arm/mach-s3c64xx/mach-crag6410.c | 7 ++++++
arch/arm/mach-s3c64xx/mach-smartq.c | 8 +++++++
arch/arm/mach-s3c64xx/mach-smdk6410.c | 7 ++++++
arch/arm/mach-s3c64xx/setup-usb-phy.c | 14 +++++++++++++
arch/arm/plat-samsung/devs.c | 28 ++++++++++++++++++++++++++
arch/arm/plat-samsung/include/plat/devs.h | 1 +
arch/arm/plat-samsung/include/plat/usb-phy.h | 1 +
8 files changed, 68 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-s3c64xx/include/mach/map.h b/arch/arm/mach-s3c64xx/include/mach/map.h
index 8e2097b..dc482bb 100644
--- a/arch/arm/mach-s3c64xx/include/mach/map.h
+++ b/arch/arm/mach-s3c64xx/include/mach/map.h
@@ -65,6 +65,7 @@
#define S3C64XX_PA_NAND (0x70200000)
#define S3C64XX_PA_FB (0x77100000)
+#define S3C64XX_PA_USB_HSPHY (0x7C100000)
#define S3C64XX_PA_USB_HSOTG (0x7C000000)
#define S3C64XX_PA_WATCHDOG (0x7E004000)
#define S3C64XX_PA_RTC (0x7E005000)
@@ -113,6 +114,7 @@
#define S3C_PA_FB S3C64XX_PA_FB
#define S3C_PA_USBHOST S3C64XX_PA_USBHOST
#define S3C_PA_USB_HSOTG S3C64XX_PA_USB_HSOTG
+#define S3C_PA_USB_PHY S3C64XX_PA_USB_HSPHY
#define S3C_PA_RTC S3C64XX_PA_RTC
#define S3C_PA_WDT S3C64XX_PA_WATCHDOG
#define S3C_PA_SPI0 S3C64XX_PA_SPI0
diff --git a/arch/arm/mach-s3c64xx/mach-crag6410.c b/arch/arm/mach-s3c64xx/mach-crag6410.c
index b0f5baf..adc2e15 100644
--- a/arch/arm/mach-s3c64xx/mach-crag6410.c
+++ b/arch/arm/mach-s3c64xx/mach-crag6410.c
@@ -31,6 +31,7 @@
#include <linux/spi/spi.h>
#include <linux/i2c/pca953x.h>
+#include <linux/platform_data/samsung-usbphy.h>
#include <video/platform_lcd.h>
@@ -69,6 +70,7 @@
#include <plat/adc.h>
#include <plat/iic.h>
#include <plat/pm.h>
+#include <plat/usb-phy.h>
#include "common.h"
@@ -336,6 +338,7 @@ static struct platform_device wallvdd_device = {
};
static struct platform_device *crag6410_devices[] __initdata = {
+ &samsung_device_usbphy,
&s3c_device_hsmmc0,
&s3c_device_hsmmc2,
&s3c_device_i2c0,
@@ -765,6 +768,9 @@ static const struct gpio_led_platform_data gpio_leds_pdata = {
.num_leds = ARRAY_SIZE(gpio_leds),
};
+static struct samsung_usbphy_data crag6410_usbphy_pdata __initdata = {
+ .pmu_isolation = s5p_usb_phy_pmu_isolation,
+};
static void __init crag6410_machine_init(void)
{
@@ -790,6 +796,7 @@ static void __init crag6410_machine_init(void)
s3c_i2c0_set_platdata(&i2c0_pdata);
s3c_i2c1_set_platdata(&i2c1_pdata);
s3c_fb_set_platdata(&crag6410_lcd_pdata);
+ samsung_usbphy_set_pdata(&crag6410_usbphy_pdata);
i2c_register_board_info(0, i2c_devs0, ARRAY_SIZE(i2c_devs0));
i2c_register_board_info(1, i2c_devs1, ARRAY_SIZE(i2c_devs1));
diff --git a/arch/arm/mach-s3c64xx/mach-smartq.c b/arch/arm/mach-s3c64xx/mach-smartq.c
index 7400da1..90dc821 100644
--- a/arch/arm/mach-s3c64xx/mach-smartq.c
+++ b/arch/arm/mach-s3c64xx/mach-smartq.c
@@ -18,6 +18,7 @@
#include <linux/serial_core.h>
#include <linux/spi/spi_gpio.h>
#include <linux/usb/gpio_vbus.h>
+#include <linux/platform_data/samsung-usbphy.h>
#include <asm/mach-types.h>
#include <asm/mach/map.h>
@@ -36,6 +37,7 @@
#include <plat/usb-control.h>
#include <plat/sdhci.h>
#include <plat/ts.h>
+#include <plat/usb-phy.h>
#include <video/platform_lcd.h>
@@ -234,6 +236,7 @@ static struct i2c_board_info smartq_i2c_devs[] __initdata = {
};
static struct platform_device *smartq_devices[] __initdata = {
+ &samsung_device_usbphy,
&s3c_device_hsmmc1, /* Init iNAND first, ... */
&s3c_device_hsmmc0, /* ... then the external SD card */
&s3c_device_hsmmc2,
@@ -380,9 +383,14 @@ void __init smartq_map_io(void)
smartq_lcd_mode_set();
}
+static struct samsung_usbphy_data smartq_usbphy_pdata __initdata = {
+ .pmu_isolation = s5p_usb_phy_pmu_isolation,
+};
+
void __init smartq_machine_init(void)
{
s3c_i2c0_set_platdata(NULL);
+ samsung_usbphy_set_pdata(&smartq_usbphy_pdata);
s3c_hwmon_set_platdata(&smartq_hwmon_pdata);
s3c_sdhci1_set_platdata(&smartq_internal_hsmmc_pdata);
s3c_sdhci2_set_platdata(&smartq_internal_hsmmc_pdata);
diff --git a/arch/arm/mach-s3c64xx/mach-smdk6410.c b/arch/arm/mach-s3c64xx/mach-smdk6410.c
index cbdc91b..4cf1252 100644
--- a/arch/arm/mach-s3c64xx/mach-smdk6410.c
+++ b/arch/arm/mach-s3c64xx/mach-smdk6410.c
@@ -30,6 +30,7 @@
#include <linux/regulator/fixed.h>
#include <linux/regulator/machine.h>
#include <linux/pwm_backlight.h>
+#include <linux/platform_data/samsung-usbphy.h>
#ifdef CONFIG_SMDK6410_WM1190_EV1
#include <linux/mfd/wm8350/core.h>
@@ -72,6 +73,7 @@
#include <plat/keypad.h>
#include <plat/backlight.h>
#include <plat/regs-fb-v4.h>
+#include <plat/usb-phy.h>
#include "common.h"
@@ -263,6 +265,7 @@ static struct samsung_keypad_platdata smdk6410_keypad_data __initdata = {
static struct map_desc smdk6410_iodesc[] = {};
static struct platform_device *smdk6410_devices[] __initdata = {
+ &samsung_device_usbphy,
#ifdef CONFIG_SMDK6410_SD_CH0
&s3c_device_hsmmc0,
#endif
@@ -626,6 +629,9 @@ static struct platform_pwm_backlight_data smdk6410_bl_data = {
.pwm_id = 1,
};
+static struct samsung_usbphy_data smdk6410_usbphy_pdata __initdata = {
+ .pmu_isolation = s5p_usb_phy_pmu_isolation,
+};
static void __init smdk6410_map_io(void)
{
@@ -655,6 +661,7 @@ static void __init smdk6410_machine_init(void)
s3c_i2c0_set_platdata(NULL);
s3c_i2c1_set_platdata(NULL);
s3c_fb_set_platdata(&smdk6410_lcd_pdata);
+ samsung_usbphy_set_pdata(&smdk6410_usbphy_pdata);
samsung_keypad_set_platdata(&smdk6410_keypad_data);
diff --git a/arch/arm/mach-s3c64xx/setup-usb-phy.c b/arch/arm/mach-s3c64xx/setup-usb-phy.c
index 7a09553..3aee778 100644
--- a/arch/arm/mach-s3c64xx/setup-usb-phy.c
+++ b/arch/arm/mach-s3c64xx/setup-usb-phy.c
@@ -9,3 +9,17 @@
*
*/
+#include <linux/io.h>
+#include <mach/map.h>
+#include <mach/regs-sys.h>
+
+void s5p_usb_phy_pmu_isolation(int on)
+{
+ if (on) {
+ writel(readl(S3C64XX_OTHERS) & ~S3C64XX_OTHERS_USBMASK,
+ S3C64XX_OTHERS);
+ } else {
+ writel(readl(S3C64XX_OTHERS) | S3C64XX_OTHERS_USBMASK,
+ S3C64XX_OTHERS);
+ }
+}
diff --git a/arch/arm/plat-samsung/devs.c b/arch/arm/plat-samsung/devs.c
index fc49f3d..d5d5735 100644
--- a/arch/arm/plat-samsung/devs.c
+++ b/arch/arm/plat-samsung/devs.c
@@ -31,6 +31,7 @@
#include <linux/ioport.h>
#include <linux/platform_data/s3c-hsudc.h>
#include <linux/platform_data/s3c-hsotg.h>
+#include <linux/platform_data/samsung-usbphy.h>
#include <media/s5p_hdmi.h>
@@ -1370,6 +1371,30 @@ struct platform_device s5p_device_mixer = {
/* USB */
+#ifdef CONFIG_S3C_DEV_USB_HSOTG
+/* USB PHY*/
+static struct resource samsung_usbphy_resource[] = {
+ [0] = {
+ .start = S3C_PA_USB_PHY,
+ .end = S3C_PA_USB_PHY + SZ_16 - 1,
+ .flags = IORESOURCE_MEM,
+ },
+};
+
+struct platform_device samsung_device_usbphy = {
+ .name = "s3c64xx-usbphy",
+ .id = -1,
+ .num_resources = ARRAY_SIZE(samsung_usbphy_resource),
+ .resource = samsung_usbphy_resource,
+};
+
+void __init samsung_usbphy_set_pdata(struct samsung_usbphy_data *pd)
+{
+ s3c_set_platdata(pd, sizeof(struct samsung_usbphy_data),
+ &samsung_device_usbphy);
+}
+#endif
+
#ifdef CONFIG_S3C_DEV_USB_HOST
static struct resource s3c_usb_resource[] = {
[0] = DEFINE_RES_MEM(S3C_PA_USBHOST, SZ_256),
@@ -1476,6 +1501,8 @@ struct platform_device s3c_device_usb_hsotg = {
},
};
+#ifndef CONFIG_ARCH_S3C64XX
+/* TODO: To be removed later. Currently only S3C64XX is platform data free */
void __init s3c_hsotg_set_platdata(struct s3c_hsotg_plat *pd)
{
struct s3c_hsotg_plat *npd;
@@ -1488,6 +1515,7 @@ void __init s3c_hsotg_set_platdata(struct s3c_hsotg_plat *pd)
if (!npd->phy_exit)
npd->phy_exit = s5p_usb_phy_exit;
}
+#endif
#endif /* CONFIG_S3C_DEV_USB_HSOTG */
/* USB High Spped 2.0 Device (Gadget) */
diff --git a/arch/arm/plat-samsung/include/plat/devs.h b/arch/arm/plat-samsung/include/plat/devs.h
index 5da4b4f..3849c88 100644
--- a/arch/arm/plat-samsung/include/plat/devs.h
+++ b/arch/arm/plat-samsung/include/plat/devs.h
@@ -138,6 +138,7 @@ extern struct platform_device exynos_device_drm;
extern struct platform_device samsung_asoc_dma;
extern struct platform_device samsung_asoc_idma;
extern struct platform_device samsung_device_keypad;
+extern struct platform_device samsung_device_usbphy;
/* s3c2440 specific devices */
diff --git a/arch/arm/plat-samsung/include/plat/usb-phy.h b/arch/arm/plat-samsung/include/plat/usb-phy.h
index 959bcdb..165ffe7 100644
--- a/arch/arm/plat-samsung/include/plat/usb-phy.h
+++ b/arch/arm/plat-samsung/include/plat/usb-phy.h
@@ -18,5 +18,6 @@ enum s5p_usb_phy_type {
extern int s5p_usb_phy_init(struct platform_device *pdev, int type);
extern int s5p_usb_phy_exit(struct platform_device *pdev, int type);
+extern void s5p_usb_phy_pmu_isolation(int on);
#endif /* __PLAT_SAMSUNG_USB_PHY_H */
--
1.7.1
^ permalink raw reply related [flat|nested] 27+ messages in thread* [PATCH v6 5/5] ARM: Exynos4210: Enabling samsung-usbphy driver
2012-09-17 12:54 [PATCH v6 0/5] usb: phy: samsung: Introducing usb phy driver for samsung SoCs Praveen Paneri
` (3 preceding siblings ...)
2012-09-17 12:54 ` [PATCH v6 4/5] ARM: S3C64XX: Enabling samsung-usbphy driver Praveen Paneri
@ 2012-09-17 12:54 ` Praveen Paneri
4 siblings, 0 replies; 27+ messages in thread
From: Praveen Paneri @ 2012-09-17 12:54 UTC (permalink / raw)
To: linux-arm-kernel
Adding usbphy node for Exynos4210 along with the platform data.
Signed-off-by: Praveen Paneri <p.paneri@samsung.com>
---
arch/arm/boot/dts/exynos4210.dtsi | 5 +++++
arch/arm/mach-exynos/include/mach/map.h | 1 +
arch/arm/mach-exynos/mach-exynos4-dt.c | 8 ++++++++
arch/arm/mach-exynos/setup-usb-phy.c | 13 +++++++++++++
4 files changed, 27 insertions(+), 0 deletions(-)
diff --git a/arch/arm/boot/dts/exynos4210.dtsi b/arch/arm/boot/dts/exynos4210.dtsi
index 02891fe..e28cf10 100644
--- a/arch/arm/boot/dts/exynos4210.dtsi
+++ b/arch/arm/boot/dts/exynos4210.dtsi
@@ -62,6 +62,11 @@
interrupts = <0 44 0>, <0 45 0>;
};
+ usbphy at 125B0000 {
+ compatible = "samsung,exynos4210-usbphy";
+ reg = <0x125B0000 0x100>;
+ };
+
keypad at 100A0000 {
compatible = "samsung,s5pv210-keypad";
reg = <0x100A0000 0x100>;
diff --git a/arch/arm/mach-exynos/include/mach/map.h b/arch/arm/mach-exynos/include/mach/map.h
index c72b675..0625c0a 100644
--- a/arch/arm/mach-exynos/include/mach/map.h
+++ b/arch/arm/mach-exynos/include/mach/map.h
@@ -234,6 +234,7 @@
#define S3C_PA_SPI1 EXYNOS4_PA_SPI1
#define S3C_PA_SPI2 EXYNOS4_PA_SPI2
#define S3C_PA_USB_HSOTG EXYNOS4_PA_HSOTG
+#define S3C_PA_USB_PHY EXYNOS4_PA_HSPHY
#define S5P_PA_EHCI EXYNOS4_PA_EHCI
#define S5P_PA_FIMC0 EXYNOS4_PA_FIMC0
diff --git a/arch/arm/mach-exynos/mach-exynos4-dt.c b/arch/arm/mach-exynos/mach-exynos4-dt.c
index b2b5d5f..0739be8 100644
--- a/arch/arm/mach-exynos/mach-exynos4-dt.c
+++ b/arch/arm/mach-exynos/mach-exynos4-dt.c
@@ -13,6 +13,7 @@
#include <linux/of_platform.h>
#include <linux/serial_core.h>
+#include <linux/platform_data/samsung-usbphy.h>
#include <asm/mach/arch.h>
#include <asm/hardware/gic.h>
@@ -20,9 +21,14 @@
#include <plat/cpu.h>
#include <plat/regs-serial.h>
+#include <plat/usb-phy.h>
#include "common.h"
+static struct samsung_usbphy_data exynos4_usbphy_pdata = {
+ .pmu_isolation = s5p_usb_phy_pmu_isolation,
+};
+
/*
* The following lookup table is used to override device names when devices
* are registered from device tree. This is temporarily added to enable
@@ -63,6 +69,8 @@ static const struct of_dev_auxdata exynos4210_auxdata_lookup[] __initconst = {
"exynos4210-spi.2", NULL),
OF_DEV_AUXDATA("arm,pl330", EXYNOS4_PA_PDMA0, "dma-pl330.0", NULL),
OF_DEV_AUXDATA("arm,pl330", EXYNOS4_PA_PDMA1, "dma-pl330.1", NULL),
+ OF_DEV_AUXDATA("samsung,exynos4210-usbphy", EXYNOS4_PA_HSPHY,
+ "s3c-usbphy", &exynos4_usbphy_pdata),
{},
};
diff --git a/arch/arm/mach-exynos/setup-usb-phy.c b/arch/arm/mach-exynos/setup-usb-phy.c
index b81cc56..1c62d20 100644
--- a/arch/arm/mach-exynos/setup-usb-phy.c
+++ b/arch/arm/mach-exynos/setup-usb-phy.c
@@ -221,3 +221,16 @@ int s5p_usb_phy_exit(struct platform_device *pdev, int type)
return -EINVAL;
}
+
+void s5p_usb_phy_pmu_isolation(int on)
+{
+ if (on) {
+ writel(readl(S5P_USBDEVICE_PHY_CONTROL)
+ & ~S5P_USBDEVICE_PHY_ENABLE,
+ S5P_USBDEVICE_PHY_CONTROL);
+ } else {
+ writel(readl(S5P_USBDEVICE_PHY_CONTROL)
+ | S5P_USBDEVICE_PHY_ENABLE,
+ S5P_USBDEVICE_PHY_CONTROL);
+ }
+}
--
1.7.1
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