[PATCH v5 0/5] Add support to enable ARM PMU for EXYNOS

[PATCH v5 0/5] Add support to enable ARM PMU for EXYNOS

[Chanho Park]

This patchset fixes irq numbers of ARM Performance Monitoring unit and enable
it for Perf(Performance Counter) on the exynos 4 and 5. The exynos4 and 5 have 2
more cpu cores which has its own pmu.

The exynos uses combiner-irq type for arm-pmu. Especially, the exynos4412 has 4
extra combined irq groups. So, we need to change a max combiner number and to
retreive it according to each soc types.

To enable perf, we need also to implement a set_irq_affinity function for the
combiner-irq. After applying this patch, we can use the perf for the exynos
machine.

Changes from v4:
 - Use max_combiner_nr() in combiner_cascade_irq
 - Add EXYNOS4412_MAX_COMBINER_NR to clarify a meaning
 - Change combiner_extra_irq to exynos4x12_combiner_extra_irq

Changes from v3:
 - Define max_combiner_nr according to soc types
 - Add armpmu dt binding for exynos4210
 - Clean up soc types comparison from v2

Changes from v2:
 - Convert to dt binding of exynos5250

Changes from v1:
 - Split arm-pmu init of exynos from plat-samsung
 - Correct combined irqs of exynos4412
 - Use soc_is_xxx function instead of CONFIG_XXX to identify dynamically

Chanho Park (5):
  ARM: EXYNOS: Add set_irq_affinity function for combiner_irq
  ARM: EXYNOS: Correct combined IRQs for exynos4
  ARM: EXYNOS: Enable PMUs for exynos4
  ARM: EXYNOS: Add arm-pmu DT binding for exynos5250
  ARM: EXYNOS: Add arm-pmu DT binding for exynos421x

 arch/arm/boot/dts/exynos4210.dtsi        |    6 ++
 arch/arm/boot/dts/exynos5250.dtsi        |    6 ++
 arch/arm/mach-exynos/common.c            |  108 +++++++++++++++++++++++++-----
 arch/arm/mach-exynos/include/mach/irqs.h |   13 +++-
 arch/arm/plat-samsung/devs.c             |    2 +-
 5 files changed, 113 insertions(+), 22 deletions(-)

-- 
1.7.9.5

[PATCH v5 1/5] ARM: EXYNOS: Add set_irq_affinity function for combiner_irq

[Chanho Park]

This patch adds set_irq_affinity function for combiner_irq. We need this
function to enable a arm-pmu because the pmu of exynos has combined type irqs.

Reviewed-by: Thomas Abraham <thomas.abraham@linaro.org>
Signed-off-by: Chanho Park <chanho61.park@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
---
 arch/arm/mach-exynos/common.c |   30 +++++++++++++++++++++++++-----
 1 file changed, 25 insertions(+), 5 deletions(-)

diff --git a/arch/arm/mach-exynos/common.c b/arch/arm/mach-exynos/common.c
index 715b690..709245e 100644
--- a/arch/arm/mach-exynos/common.c
+++ b/arch/arm/mach-exynos/common.c
@@ -405,6 +405,7 @@ struct combiner_chip_data {
 	unsigned int irq_offset;
 	unsigned int irq_mask;
 	void __iomem *base;
+	unsigned int parent_irq;
 };
 
 static struct irq_domain *combiner_irq_domain;
@@ -461,10 +462,28 @@ static void combiner_handle_cascade_irq(unsigned int irq, struct irq_desc *desc)
 	chained_irq_exit(chip, desc);
 }
 
+#ifdef CONFIG_SMP
+static int combiner_set_affinity(struct irq_data *d,
+				 const struct cpumask *mask_val, bool force)
+{
+	struct combiner_chip_data *chip_data = irq_data_get_irq_chip_data(d);
+	struct irq_chip *chip = irq_get_chip(chip_data->parent_irq);
+	struct irq_data *data = irq_get_irq_data(chip_data->parent_irq);
+
+	if (chip && chip->irq_set_affinity)
+		return chip->irq_set_affinity(data, mask_val, force);
+	else
+		return -EINVAL;
+}
+#endif
+
 static struct irq_chip combiner_chip = {
-	.name		= "COMBINER",
-	.irq_mask	= combiner_mask_irq,
-	.irq_unmask	= combiner_unmask_irq,
+	.name			= "COMBINER",
+	.irq_mask		= combiner_mask_irq,
+	.irq_unmask		= combiner_unmask_irq,
+#ifdef CONFIG_SMP
+	.irq_set_affinity	= combiner_set_affinity,
+#endif
 };
 
 static void __init combiner_cascade_irq(unsigned int combiner_nr, unsigned int irq)
@@ -484,12 +503,13 @@ static void __init combiner_cascade_irq(unsigned int combiner_nr, unsigned int i
 }
 
 static void __init combiner_init_one(unsigned int combiner_nr,
-				     void __iomem *base)
+				     void __iomem *base, unsigned int irq)
 {
 	combiner_data[combiner_nr].base = base;
 	combiner_data[combiner_nr].irq_offset = irq_find_mapping(
 		combiner_irq_domain, combiner_nr * MAX_IRQ_IN_COMBINER);
 	combiner_data[combiner_nr].irq_mask = 0xff << ((combiner_nr % 4) << 3);
+	combiner_data[combiner_nr].parent_irq = irq;
 
 	/* Disable all interrupts */
 	__raw_writel(combiner_data[combiner_nr].irq_mask,
@@ -573,12 +593,12 @@ static void __init combiner_init(void __iomem *combiner_base,
 	}
 
 	for (i = 0; i < max_nr; i++) {
-		combiner_init_one(i, combiner_base + (i >> 2) * 0x10);
 		irq = IRQ_SPI(i);
 #ifdef CONFIG_OF
 		if (np)
 			irq = irq_of_parse_and_map(np, i);
 #endif
+		combiner_init_one(i, combiner_base + (i >> 2) * 0x10, irq);
 		combiner_cascade_irq(i, irq);
 	}
 }
-- 
1.7.9.5

[PATCH v5 2/5] ARM: EXYNOS: Correct combined IRQs for exynos4

[Chanho Park]

This patch corrects combined IRQs for exynos4 series platform. The exynos4412
has four extra combined irq group and the exynos4212 has two more combined irqs
than exynos4210. Each irq is mapped to IRQ_SPI(xx). Unfortunately, extra 4
combined IRQs isn't sequential. So, we need to map the irqs manually.

Signed-off-by: Chanho Park <chanho61.park@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
---
 arch/arm/mach-exynos/common.c            |   50 ++++++++++++++++++++++--------
 arch/arm/mach-exynos/include/mach/irqs.h |    5 ++-
 2 files changed, 41 insertions(+), 14 deletions(-)

diff --git a/arch/arm/mach-exynos/common.c b/arch/arm/mach-exynos/common.c
index 709245e..19a5460 100644
--- a/arch/arm/mach-exynos/common.c
+++ b/arch/arm/mach-exynos/common.c
@@ -486,16 +486,22 @@ static struct irq_chip combiner_chip = {
 #endif
 };
 
-static void __init combiner_cascade_irq(unsigned int combiner_nr, unsigned int irq)
+static unsigned int max_combiner_nr(void)
 {
-	unsigned int max_nr;
-
 	if (soc_is_exynos5250())
-		max_nr = EXYNOS5_MAX_COMBINER_NR;
+		return EXYNOS5_MAX_COMBINER_NR;
+	else if (soc_is_exynos4412())
+		return EXYNOS4412_MAX_COMBINER_NR;
+	else if (soc_is_exynos4212())
+		return EXYNOS4212_MAX_COMBINER_NR;
 	else
-		max_nr = EXYNOS4_MAX_COMBINER_NR;
+		return EXYNOS4210_MAX_COMBINER_NR;
+}
 
-	if (combiner_nr >= max_nr)
+static void __init combiner_cascade_irq(unsigned int combiner_nr,
+					unsigned int irq)
+{
+	if (combiner_nr >= max_combiner_nr())
 		BUG();
 	if (irq_set_handler_data(irq, &combiner_data[combiner_nr]) != 0)
 		BUG();
@@ -560,23 +566,38 @@ static struct irq_domain_ops combiner_irq_domain_ops = {
 	.map	= combiner_irq_domain_map,
 };
 
+static unsigned int exynos4x12_combiner_extra_irq(int group)
+{
+	switch (group) {
+	case 16:
+		return IRQ_SPI(107);
+	case 17:
+		return IRQ_SPI(108);
+	case 18:
+		return IRQ_SPI(48);
+	case 19:
+		return IRQ_SPI(42);
+	default:
+		return 0;
+	}
+}
+
 static void __init combiner_init(void __iomem *combiner_base,
 				 struct device_node *np)
 {
 	int i, irq, irq_base;
 	unsigned int max_nr, nr_irq;
 
+	max_nr = max_combiner_nr();
+
 	if (np) {
 		if (of_property_read_u32(np, "samsung,combiner-nr", &max_nr)) {
-			pr_warning("%s: number of combiners not specified, "
+			pr_info("%s: number of combiners not specified, "
 				"setting default as %d.\n",
-				__func__, EXYNOS4_MAX_COMBINER_NR);
-			max_nr = EXYNOS4_MAX_COMBINER_NR;
+				__func__, max_nr);
 		}
-	} else {
-		max_nr = soc_is_exynos5250() ? EXYNOS5_MAX_COMBINER_NR :
-						EXYNOS4_MAX_COMBINER_NR;
 	}
+
 	nr_irq = max_nr * MAX_IRQ_IN_COMBINER;
 
 	irq_base = irq_alloc_descs(COMBINER_IRQ(0, 0), 1, nr_irq, 0);
@@ -593,7 +614,10 @@ static void __init combiner_init(void __iomem *combiner_base,
 	}
 
 	for (i = 0; i < max_nr; i++) {
-		irq = IRQ_SPI(i);
+		if (i < EXYNOS4210_MAX_COMBINER_NR || soc_is_exynos5250())
+			irq = IRQ_SPI(i);
+		else
+			irq = exynos4x12_combiner_extra_irq(i);
 #ifdef CONFIG_OF
 		if (np)
 			irq = irq_of_parse_and_map(np, i);
diff --git a/arch/arm/mach-exynos/include/mach/irqs.h b/arch/arm/mach-exynos/include/mach/irqs.h
index 35bced6..e740a6f 100644
--- a/arch/arm/mach-exynos/include/mach/irqs.h
+++ b/arch/arm/mach-exynos/include/mach/irqs.h
@@ -165,7 +165,10 @@
 #define EXYNOS4_IRQ_FIMD0_VSYNC		COMBINER_IRQ(11, 1)
 #define EXYNOS4_IRQ_FIMD0_SYSTEM	COMBINER_IRQ(11, 2)
 
-#define EXYNOS4_MAX_COMBINER_NR		16
+#define EXYNOS4210_MAX_COMBINER_NR	16
+#define EXYNOS4212_MAX_COMBINER_NR	18
+#define EXYNOS4412_MAX_COMBINER_NR	20
+#define EXYNOS4_MAX_COMBINER_NR		EXYNOS4412_MAX_COMBINER_NR
 
 #define EXYNOS4_IRQ_GPIO1_NR_GROUPS	16
 #define EXYNOS4_IRQ_GPIO2_NR_GROUPS	9
-- 
1.7.9.5

[PATCH v5 3/5] ARM: EXYNOS: Enable PMUs for exynos4

[Chanho Park]

This patch defines irq numbers of ARM performance monitoring unit for exynos4.
Firs of all, we need to fix IRQ_PMU correctly and to split pmu initialization
of exynos from plat-samsung for easily defining it.

The number of CPU cores and PMU irq numbers are vary according to soc types.
So, we need to identify each soc type using soc_is_xxx function and to define
the pmu irqs dynamically. For example, the exynos4412 has 4 cpu cores and pmus.

Signed-off-by: Chanho Park <chanho61.park@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
---
 arch/arm/mach-exynos/common.c            |   28 ++++++++++++++++++++++++++++
 arch/arm/mach-exynos/include/mach/irqs.h |    8 ++++++--
 arch/arm/plat-samsung/devs.c             |    2 +-
 3 files changed, 35 insertions(+), 3 deletions(-)

diff --git a/arch/arm/mach-exynos/common.c b/arch/arm/mach-exynos/common.c
index 19a5460..071b0a6 100644
--- a/arch/arm/mach-exynos/common.c
+++ b/arch/arm/mach-exynos/common.c
@@ -35,6 +35,7 @@
 #include <mach/regs-pmu.h>
 #include <mach/regs-gpio.h>
 #include <mach/pmu.h>
+#include <mach/irqs.h>
 
 #include <plat/cpu.h>
 #include <plat/clock.h>
@@ -1087,3 +1088,30 @@ static int __init exynos_init_irq_eint(void)
 	return 0;
 }
 arch_initcall(exynos_init_irq_eint);
+
+static struct resource exynos4_pmu_resource[] = {
+	DEFINE_RES_IRQ(EXYNOS4_IRQ_PMU),
+	DEFINE_RES_IRQ(EXYNOS4_IRQ_PMU_CPU1),
+#if defined(CONFIG_SOC_EXYNOS4412)
+	DEFINE_RES_IRQ(EXYNOS4_IRQ_PMU_CPU2),
+	DEFINE_RES_IRQ(EXYNOS4_IRQ_PMU_CPU3),
+#endif
+};
+
+static struct platform_device exynos4_device_pmu = {
+	.name		= "arm-pmu",
+	.num_resources	= ARRAY_SIZE(exynos4_pmu_resource),
+	.resource	= exynos4_pmu_resource,
+};
+
+static int __init exynos_armpmu_init(void)
+{
+	if (!of_have_populated_dt()) {
+		if (soc_is_exynos4210() || soc_is_exynos4212())
+			exynos4_device_pmu.num_resources = 2;
+		platform_device_register(&exynos4_device_pmu);
+	}
+
+	return 0;
+}
+arch_initcall(exynos_armpmu_init);
diff --git a/arch/arm/mach-exynos/include/mach/irqs.h b/arch/arm/mach-exynos/include/mach/irqs.h
index e740a6f..0b75835 100644
--- a/arch/arm/mach-exynos/include/mach/irqs.h
+++ b/arch/arm/mach-exynos/include/mach/irqs.h
@@ -128,7 +128,7 @@
 #define EXYNOS4_IRQ_ADC1		IRQ_SPI(107)
 #define EXYNOS4_IRQ_PEN1		IRQ_SPI(108)
 #define EXYNOS4_IRQ_KEYPAD		IRQ_SPI(109)
-#define EXYNOS4_IRQ_PMU			IRQ_SPI(110)
+#define EXYNOS4_IRQ_POWER_PMU		IRQ_SPI(110)
 #define EXYNOS4_IRQ_GPS			IRQ_SPI(111)
 #define EXYNOS4_IRQ_INTFEEDCTRL_SSS	IRQ_SPI(112)
 #define EXYNOS4_IRQ_SLIMBUS		IRQ_SPI(113)
@@ -136,6 +136,11 @@
 #define EXYNOS4_IRQ_TSI			IRQ_SPI(115)
 #define EXYNOS4_IRQ_SATA		IRQ_SPI(116)
 
+#define EXYNOS4_IRQ_PMU			COMBINER_IRQ(2, 2)
+#define EXYNOS4_IRQ_PMU_CPU1		COMBINER_IRQ(3, 2)
+#define EXYNOS4_IRQ_PMU_CPU2		COMBINER_IRQ(18, 2)
+#define EXYNOS4_IRQ_PMU_CPU3		COMBINER_IRQ(19, 2)
+
 #define EXYNOS4_IRQ_SYSMMU_MDMA0_0	COMBINER_IRQ(4, 0)
 #define EXYNOS4_IRQ_SYSMMU_SSS_0	COMBINER_IRQ(4, 1)
 #define EXYNOS4_IRQ_SYSMMU_FIMC0_0	COMBINER_IRQ(4, 2)
@@ -233,7 +238,6 @@
 #define IRQ_TC				EXYNOS4_IRQ_PEN0
 
 #define IRQ_KEYPAD			EXYNOS4_IRQ_KEYPAD
-#define IRQ_PMU				EXYNOS4_IRQ_PMU
 
 #define IRQ_FIMD0_FIFO			EXYNOS4_IRQ_FIMD0_FIFO
 #define IRQ_FIMD0_VSYNC			EXYNOS4_IRQ_FIMD0_VSYNC
diff --git a/arch/arm/plat-samsung/devs.c b/arch/arm/plat-samsung/devs.c
index 03f654d..ace76b4 100644
--- a/arch/arm/plat-samsung/devs.c
+++ b/arch/arm/plat-samsung/devs.c
@@ -1125,7 +1125,7 @@ struct platform_device s5p_device_onenand = {
 
 /* PMU */
 
-#ifdef CONFIG_PLAT_S5P
+#if defined(CONFIG_PLAT_S5P) && !defined(CONFIG_ARCH_EXYNOS)
 static struct resource s5p_pmu_resource[] = {
 	DEFINE_RES_IRQ(IRQ_PMU)
 };
-- 
1.7.9.5

[PATCH v5 3/5] ARM: EXYNOS: Enable PMUs for exynos4

[Olof Johansson]

Hi,

On Tue, Oct 23, 2012 at 10:34 PM, Chanho Park <chanho61.park@samsung.com> wrote:
> This patch defines irq numbers of ARM performance monitoring unit for exynos4.
> Firs of all, we need to fix IRQ_PMU correctly and to split pmu initialization
> of exynos from plat-samsung for easily defining it.
>
> The number of CPU cores and PMU irq numbers are vary according to soc types.
> So, we need to identify each soc type using soc_is_xxx function and to define
> the pmu irqs dynamically. For example, the exynos4412 has 4 cpu cores and pmus.

I wonder if it's worth doing this complexity on the non-DT case for exynos4?

I wish there was more focus on the Samsung platforms for getting the
DT support up to par with non-DT so you can avoid having to add new
platform devices like these in the first place.


Thanks,

-Olof

[PATCH v5 3/5] ARM: EXYNOS: Enable PMUs for exynos4

[Chanho Park]

> -----Original Message-----
> From: Olof Johansson [mailto:olof at lixom.net]
> Sent: Thursday, October 25, 2012 2:15 AM
> To: Chanho Park
> Cc: kgene.kim at samsung.com; linux-samsung-soc at vger.kernel.org; linux-
> arm-kernel at lists.infradead.org; linux at arm.linux.org.uk; ben-linux at fluff.org;
> kyungmin.park at samsung.com; sachin.kamat at linaro.org;
> thomas.abraham at linaro.org; will.deacon at arm.com
> Subject: Re: [PATCH v5 3/5] ARM: EXYNOS: Enable PMUs for exynos4
> 
> Hi,
> 
> On Tue, Oct 23, 2012 at 10:34 PM, Chanho Park
> <chanho61.park@samsung.com> wrote:
> > This patch defines irq numbers of ARM performance monitoring unit for
> exynos4.
> > Firs of all, we need to fix IRQ_PMU correctly and to split pmu
> > initialization of exynos from plat-samsung for easily defining it.
> >
> > The number of CPU cores and PMU irq numbers are vary according to soc
> types.
> > So, we need to identify each soc type using soc_is_xxx function and to
> > define the pmu irqs dynamically. For example, the exynos4412 has 4 cpu
> cores and pmus.
> 
> I wonder if it's worth doing this complexity on the non-DT case for exynos4?
> 
> I wish there was more focus on the Samsung platforms for getting the DT
> support up to par with non-DT so you can avoid having to add new platform
> devices like these in the first place.

The DT support of exynos4 is under development.
And many of exynos4 developers still use non-dt boot-up method.
By this time arm-pmu of exynos did not work. IMO we should fix and support it
for non-dt users.

Thanks,

Best regards,
Chanho Park

> 
> 
> Thanks,
> 
> -Olof

[PATCH v5 3/5] ARM: EXYNOS: Enable PMUs for exynos4

[Will Deacon]

On Thu, Oct 25, 2012 at 02:41:46AM +0100, Chanho Park wrote:
> > On Tue, Oct 23, 2012 at 10:34 PM, Chanho Park
> > <chanho61.park@samsung.com> wrote:
> > > This patch defines irq numbers of ARM performance monitoring unit for
> > exynos4.
> > > Firs of all, we need to fix IRQ_PMU correctly and to split pmu
> > > initialization of exynos from plat-samsung for easily defining it.
> > >
> > > The number of CPU cores and PMU irq numbers are vary according to soc
> > types.
> > > So, we need to identify each soc type using soc_is_xxx function and to
> > > define the pmu irqs dynamically. For example, the exynos4412 has 4 cpu
> > cores and pmus.
> > 
> > I wonder if it's worth doing this complexity on the non-DT case for exynos4?
> > 
> > I wish there was more focus on the Samsung platforms for getting the DT
> > support up to par with non-DT so you can avoid having to add new platform
> > devices like these in the first place.
> 
> The DT support of exynos4 is under development.

It seems to have been under development for a while now and changes like
this don't exactly encourage people to chip-in with that effort. Would it
not be better to spend time helping to complete the DT support instead of
retro-fitting static platform devices into the code?

> And many of exynos4 developers still use non-dt boot-up method.

That's not surprising if the DT code is still under development -- it's a
chicken-and-egg problem.

> By this time arm-pmu of exynos did not work. IMO we should fix and support it
> for non-dt users.

I agree that we definitely want to support the PMU on Exynos4, but I'm
tempted to postpone adding that code until DT support is available.

Will

[PATCH v5 3/5] ARM: EXYNOS: Enable PMUs for exynos4

[Chanho Park]

> -----Original Message-----
> From: Will Deacon [mailto:will.deacon at arm.com]
> Sent: Thursday, October 25, 2012 11:41 PM
> To: Chanho Park
> Cc: 'Olof Johansson'; kgene.kim at samsung.com; linux-samsung-
> soc at vger.kernel.org; linux-arm-kernel at lists.infradead.org;
> linux at arm.linux.org.uk; ben-linux at fluff.org; kyungmin.park at samsung.com;
> sachin.kamat at linaro.org; thomas.abraham at linaro.org
> Subject: Re: [PATCH v5 3/5] ARM: EXYNOS: Enable PMUs for exynos4
> 
> On Thu, Oct 25, 2012 at 02:41:46AM +0100, Chanho Park wrote:
> > > On Tue, Oct 23, 2012 at 10:34 PM, Chanho Park
> > > <chanho61.park@samsung.com> wrote:
> > > > This patch defines irq numbers of ARM performance monitoring unit
> > > > for
> > > exynos4.
> > > > Firs of all, we need to fix IRQ_PMU correctly and to split pmu
> > > > initialization of exynos from plat-samsung for easily defining it.
> > > >
> > > > The number of CPU cores and PMU irq numbers are vary according to
> > > > soc
> > > types.
> > > > So, we need to identify each soc type using soc_is_xxx function
> > > > and to define the pmu irqs dynamically. For example, the
> > > > exynos4412 has 4 cpu
> > > cores and pmus.
> > >
> > > I wonder if it's worth doing this complexity on the non-DT case for
> exynos4?
> > >
> > > I wish there was more focus on the Samsung platforms for getting the
> > > DT support up to par with non-DT so you can avoid having to add new
> > > platform devices like these in the first place.
> >
> > The DT support of exynos4 is under development.
> 
> It seems to have been under development for a while now and changes like
> this don't exactly encourage people to chip-in with that effort. Would it not
> be better to spend time helping to complete the DT support instead of retro-
> fitting static platform devices into the code?

The purposes of this patchset are two things.
The first thing is that fixing incorrect interrupt definition of the exynos4.
We already have arm-pmu platform device for s3c and s5p Samsung platforms.
However, it did not work in case of exynos series platform. I separate it from
plat-samsung code to support easily for exynos platforms. Please see that
the purpose of added platform device is fixing and supporting arm-pmu without
difficulty.
The next one is arm-pmu DT support for exynos4 and 5. You can see it in this
patchset(4 and 5).

> 
> > And many of exynos4 developers still use non-dt boot-up method.
> 
> That's not surprising if the DT code is still under development -- it's a chicken-
> and-egg problem.
> 
> > By this time arm-pmu of exynos did not work. IMO we should fix and
> > support it for non-dt users.
> 
> I agree that we definitely want to support the PMU on Exynos4, but I'm
> tempted to postpone adding that code until DT support is available.

I already included DT support for exynos4(except exynos4412) in this patchset.
(Please see the [PATCH v5 5/5] ARM: EXYNOS: Add arm-pmu DT binding for exynos421x)

Best regards,
Chanho Park

> 
> Will

[PATCH v5 3/5] ARM: EXYNOS: Enable PMUs for exynos4

[Will Deacon]

On Fri, Oct 26, 2012 at 05:05:36AM +0100, Chanho Park wrote:
> > 
> > I agree that we definitely want to support the PMU on Exynos4, but I'm
> > tempted to postpone adding that code until DT support is available.
> 
> I already included DT support for exynos4(except exynos4412) in this patchset.
> (Please see the [PATCH v5 5/5] ARM: EXYNOS: Add arm-pmu DT binding for exynos421x)

The only patch I'm objecting to is the second one, which adds the hardcoded
combiner data. That seems orthogonal to the DT patches, which look fine to
me.

Will

[PATCH v5 4/5] ARM: EXYNOS: Add arm-pmu DT binding for exynos5250

[Chanho Park]

This patch enables arm-pmu to bind device tree for exynos5250. The exynos5250
has two pmus which have combiner irq type.

Reviewed-by: Thomas Abraham <thomas.abraham@linaro.org>
Signed-off-by: Chanho Park <chanho61.park@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
---
 arch/arm/boot/dts/exynos5250.dtsi |    6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/arch/arm/boot/dts/exynos5250.dtsi b/arch/arm/boot/dts/exynos5250.dtsi
index dddfd6e..fab3eae 100644
--- a/arch/arm/boot/dts/exynos5250.dtsi
+++ b/arch/arm/boot/dts/exynos5250.dtsi
@@ -56,6 +56,12 @@
 			     <0 28 0>, <0 29 0>, <0 30 0>, <0 31 0>;
 	};
 
+	pmu {
+		compatible = "arm,cortex-a15-pmu";
+		interrupt-parent = <&combiner>;
+		interrupts = <1 2>, <22 4>;
+	};
+
 	watchdog {
 		compatible = "samsung,s3c2410-wdt";
 		reg = <0x101D0000 0x100>;
-- 
1.7.9.5

[PATCH v5 5/5] ARM: EXYNOS: Add arm-pmu DT binding for exynos421x

[Chanho Park]

This patch adds a arm-pmu node to bind device tree for exynos4210.
The exynos4210 and 4212 have two cpus which includes a pmu. In contrast, the
exynos4412 has 4 cpus and pmus. We need to define two more pmus for this type
board. However, supporting arm-pmu for the exynos4412 will handle it later
because there is no dts support for 4412 based board.

Signed-off-by: Chanho Park <chanho61.park@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
---
 arch/arm/boot/dts/exynos4210.dtsi |    6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/arch/arm/boot/dts/exynos4210.dtsi b/arch/arm/boot/dts/exynos4210.dtsi
index 214c557..90f9aed 100644
--- a/arch/arm/boot/dts/exynos4210.dtsi
+++ b/arch/arm/boot/dts/exynos4210.dtsi
@@ -42,6 +42,12 @@
 			     <0 12 0>, <0 13 0>, <0 14 0>, <0 15 0>;
 	};
 
+	pmu {
+		compatible = "arm,cortex-a9-pmu";
+		interrupt-parent = <&combiner>;
+		interrupts = <2 2>, <3 2>;
+	};
+
 	pinctrl_0: pinctrl at 11400000 {
 		compatible = "samsung,pinctrl-exynos4210";
 		reg = <0x11400000 0x1000>;
-- 
1.7.9.5