From: linux@arm.linux.org.uk (Russell King - ARM Linux)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH] ARM: setup_mm_for_reboot(): use flush_cache_louis()
Date: Wed, 7 Nov 2012 09:56:35 +0000 [thread overview]
Message-ID: <20121107095635.GV28327@n2100.arm.linux.org.uk> (raw)
In-Reply-To: <20121107095106.GA23305@mudshark.cambridge.arm.com>
On Wed, Nov 07, 2012 at 09:51:06AM +0000, Will Deacon wrote:
> Wouldn't the L2 flush in this case be included with the code that turns off
> caching? For reboot, that's currently done in __sort_restart -- the cache
> flush in setup_mm_for_reboot is just to ensure that the idmap tables are
> visible to the hardware walker iirc.
Good point - but it does raise another issue. Why do we do this flush and
TLB invalidate afterwards in setup_mm_for_reboot() ? It makes sense if
we change existing page tables, but we don't anymore, we're just switching
them, and cpu_switch_mm() will do whatever's necessary to make the new
page tables visible. So I think we can get rid of that flusing in there.
next prev parent reply other threads:[~2012-11-07 9:56 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-11-06 21:12 [PATCH] ARM: setup_mm_for_reboot(): use flush_cache_louis() Nicolas Pitre
2012-11-06 21:41 ` Will Deacon
2012-11-06 21:57 ` Santosh Shilimkar
2012-11-07 9:47 ` Lorenzo Pieralisi
2012-11-07 14:16 ` Santosh Shilimkar
2012-11-06 22:04 ` Russell King - ARM Linux
2012-11-06 22:53 ` Nicolas Pitre
2012-11-07 9:51 ` Russell King - ARM Linux
2012-11-07 9:51 ` Will Deacon
2012-11-07 9:56 ` Russell King - ARM Linux [this message]
2012-11-07 10:08 ` Will Deacon
2012-11-07 18:03 ` Nicolas Pitre
2012-11-07 18:41 ` Will Deacon
2012-11-07 20:10 ` Nicolas Pitre
2012-11-08 16:26 ` Will Deacon
2012-11-08 18:56 ` Nicolas Pitre
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