[RFC PATCH v3 16/16] ARM: dts: add AM33XX SPI support

[nm@ti.com (Nishanth Menon)]

On 14:35-20130110, Matt Porter wrote:
> On Sun, Oct 28, 2012 at 05:01:29PM +0530, Sekhar Nori wrote:
> > On 10/18/2012 6:56 PM, Matt Porter wrote:
> > > Adds AM33XX SPI support for am335x-bone and am335x-evm.
> > > 
> > > Signed-off-by: Matt Porter <mporter@ti.com>
> > > ---
> > >  arch/arm/boot/dts/am335x-bone.dts |   17 +++++++++++++++
> > >  arch/arm/boot/dts/am335x-evm.dts  |    9 ++++++++
> > >  arch/arm/boot/dts/am33xx.dtsi     |   43 +++++++++++++++++++++++++++++++++++++
> > >  3 files changed, 69 insertions(+)
> > > 
> > > diff --git a/arch/arm/boot/dts/am335x-bone.dts b/arch/arm/boot/dts/am335x-bone.dts
> > > index 5510979..23edfd8 100644
> > > --- a/arch/arm/boot/dts/am335x-bone.dts
> > > +++ b/arch/arm/boot/dts/am335x-bone.dts
> > > @@ -18,6 +18,17 @@
> > >  		reg = <0x80000000 0x10000000>; /* 256 MB */
> > >  	};
> > >  
> > > +	am3358_pinmux: pinmux at 44e10800 {
> > > +		spi1_pins: pinmux_spi1_pins {
> > > +			pinctrl-single,pins = <
> > > +				0x190 0x13	/* mcasp0_aclkx.spi1_sclk, OUTPUT_PULLUP | MODE3 */
> > > +				0x194 0x33	/* mcasp0_fsx.spi1_d0, INPUT_PULLUP | MODE3 */
> > > +				0x198 0x13	/* mcasp0_axr0.spi1_d1, OUTPUT_PULLUP | MODE3 */
minor comment:
doing as a 0x33 is better for both d1, d0 as D0,D1 can be switched between SDI and SDO
as needed with ti,pindir-d0-out-d1-in
> > > +				0x19c 0x13	/* mcasp0_ahclkr.spi1_cs0, OUTPUT_PULLUP | MODE3 */
> > > +			>;
> > 
> > Is there a single pinmux setting that provides SPI functionality on the
> > bone headers? Or this is specific to a cape you tested with?
> 
> No, there are two usable settings for spi1 and one setting for spi0.
> I'm dropping this from the series since it's specific to how I wired up
> the homebrew cape I use for spi testing on the Bone. I publish the
> branch where all these extra "test-specific" patches (that aren't intended
> to be merged) are at in the cover letter.  Anybody that needs context of
> how/what worked and was tested can grab them there.
Possibly dumb question:
Cant we have pre-usable spi configurations?  Like spi1_configuration1_pins,
spi2_configuration1_pins, spi0_configuration1_pins? If documented with
P9 pin names in the bone dts, it saves a bit of effort in looking up
pad offset when dealing with capes.
-- 
Regards,
Nishanth Menon