From: linux@arm.linux.org.uk (Russell King - ARM Linux)
To: linux-arm-kernel@lists.infradead.org
Subject: ARM coherent allocs, Was: ixp4xx eth broken in 3.7.0/3.8-rc5?
Date: Mon, 18 Feb 2013 09:59:38 +0000 [thread overview]
Message-ID: <20130218095938.GS17833@n2100.arm.linux.org.uk> (raw)
In-Reply-To: <20769.61349.124371.633959@pilspetsen.it.uu.se>
On Mon, Feb 18, 2013 at 10:08:53AM +0100, Mikael Pettersson wrote:
> Krzysztof Halasa writes:
> > Hi,
> >
> > I'm not sure how is it supposed to work. Environment: IXP4xx CPU,
> > only 64 MB (of 256 MB) of RAM is available for PCI bus master DMA,
> > /dev/sda is a PATA CF or SATA SSD using CS5536-based PATA interface
> > (SATA - with a bridge) in DMA (PCI bus master) mode.
> >
> > It works in PIO mode.
> > The problem seems to be this: pci_dev->dev.coherent_dma_mask is 0x3FFFFFF
> > (64MB-1). Yet __dma_alloc() called with GFP_DMA returns memory
> > physically located (dma_handle) above 64MB region.
>
> Isn't that what the ARM-specific dma bounce allocator is supposed to
> handle? Or did e9da6e9905e639b0f842a244bc770b48ad0523e9 disable that one?
How can it if the coherent DMA allocator is not respecting the DMA mask?
next prev parent reply other threads:[~2013-02-18 9:59 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-01-29 19:42 ixp4xx eth broken in 3.7.0/3.8-rc5? Mikael Pettersson
2013-01-30 0:11 ` Mikael Pettersson
2013-01-30 0:32 ` Xi Wang
2013-01-30 1:34 ` Ben Hutchings
2013-01-30 10:11 ` Mikael Pettersson
2013-01-30 20:50 ` Mikael Pettersson
2013-01-31 21:54 ` Krzysztof Halasa
2013-02-10 19:06 ` Krzysztof Halasa
[not found] ` <m3a9r2d5md.fsf_-_@intrepid.localdomain>
2013-02-18 9:08 ` ARM coherent allocs, Was: " Mikael Pettersson
2013-02-18 9:59 ` Russell King - ARM Linux [this message]
2013-02-18 20:30 ` Krzysztof Halasa
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