* [PATCH 00/04] ARM: shmobile: r8a7790 SoC and Lager board support
@ 2013-03-20 14:36 Magnus Damm
2013-03-20 14:36 ` [PATCH 01/04] ARM: shmobile: Initial r8a7790 SoC support Magnus Damm
` (4 more replies)
0 siblings, 5 replies; 8+ messages in thread
From: Magnus Damm @ 2013-03-20 14:36 UTC (permalink / raw)
To: linux-arm-kernel
ARM: shmobile: r8a7790 SoC and Lager board support
[PATCH 01/04] ARM: shmobile: Initial r8a7790 SoC support
[PATCH 02/04] ARM: shmobile: r8a7790 SCIF support
[PATCH 03/04] ARM: shmobile: r8a7790 IRQC support
[PATCH 04/04] ARM: shmobile: Lager support
This series adds initial support for r8a7790 and Lager. The SoC
is known as r8a7790 which is built around Cortex-A15 and makes use
of SCIF for serial and IRQC interrupt controller for external IRQs.
This initial SoC and board support is providing limited DT-only
support and a very basic C-version of board support. In the future
improved PINCTRL and clock framework support will be added, followed
by SMP support.
Implemented in same style as r8a73a4 SoC V2 and APE6EVM Board V2.
Signed-off-by: Magnus Damm <damm@opensource.se>
---
Written against all+next in renesas.git plus r8a73a4 patches
[PATCH 03/04] requires the IRQC driver to build
arch/arm/boot/dts/Makefile | 1
arch/arm/boot/dts/r8a7790-lager.dts | 26 +++++
arch/arm/boot/dts/r8a7790.dtsi | 63 ++++++++++++
arch/arm/mach-shmobile/Kconfig | 17 +++
arch/arm/mach-shmobile/Makefile | 2
arch/arm/mach-shmobile/board-lager.c | 46 +++++++++
arch/arm/mach-shmobile/clock-r8a7790.c | 95 ++++++++++++++++++
arch/arm/mach-shmobile/include/mach/r8a7790.h | 7 +
arch/arm/mach-shmobile/setup-r8a7790.c | 127 +++++++++++++++++++++++++
9 files changed, 382 insertions(+), 2 deletions(-)
^ permalink raw reply [flat|nested] 8+ messages in thread* [PATCH 01/04] ARM: shmobile: Initial r8a7790 SoC support 2013-03-20 14:36 [PATCH 00/04] ARM: shmobile: r8a7790 SoC and Lager board support Magnus Damm @ 2013-03-20 14:36 ` Magnus Damm 2013-03-20 14:36 ` [PATCH 02/04] ARM: shmobile: r8a7790 SCIF support Magnus Damm ` (3 subsequent siblings) 4 siblings, 0 replies; 8+ messages in thread From: Magnus Damm @ 2013-03-20 14:36 UTC (permalink / raw) To: linux-arm-kernel From: Magnus Damm <damm@opensource.se> Add initial support for the r8a7790 SoC including: - Single Cortex-A15 CPU Core - GIC - Architecture timer No static virtual mappings are used, all the components make use of ioremap(). DT_MACHINE_START is still wrapped in CONFIG_USE_OF to match other mach-shmobile code. Signed-off-by: Magnus Damm <damm@opensource.se> --- arch/arm/boot/dts/r8a7790.dtsi | 54 ++++++++++++++++++++++ arch/arm/mach-shmobile/Kconfig | 7 ++ arch/arm/mach-shmobile/Makefile | 1 arch/arm/mach-shmobile/clock-r8a7790.c | 61 +++++++++++++++++++++++++ arch/arm/mach-shmobile/include/mach/r8a7790.h | 7 ++ arch/arm/mach-shmobile/setup-r8a7790.c | 51 ++++++++++++++++++++ 6 files changed, 181 insertions(+) --- /dev/null +++ work/arch/arm/boot/dts/r8a7790.dtsi 2013-03-20 23:05:42.000000000 +0900 @@ -0,0 +1,54 @@ +/* + * Device Tree Source for the r8a7790 SoC + * + * Copyright (C) 2013 Renesas Solutions Corp. + * + * This file is licensed under the terms of the GNU General Public License + * version 2. This program is licensed "as is" without any warranty of any + * kind, whether express or implied. + */ + +/include/ "skeleton.dtsi" + +/ { + compatible = "renesas,r8a7790"; + interrupt-parent = <&gic>; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu0: cpu at 0 { + device_type = "cpu"; + compatible = "arm,cortex-a15"; + reg = <0>; + clock-frequency = <1300000000>; + }; + }; + + gic: interrupt-controller at f1001000 { + compatible = "arm,cortex-a15-gic"; + #interrupt-cells = <3>; + #address-cells = <0>; + interrupt-controller; + reg = <0xf1001000 0x1000>, + <0xf1002000 0x1000>, + <0xf1004000 0x2000>, + <0xf1006000 0x2000>; + interrupts = <1 9 0xf04>; + + gic-cpuif at 4 { + compatible = "arm,gic-cpuif"; + cpuif-id = <4>; + cpu = <&cpu0>; + }; + }; + + timer { + compatible = "arm,armv7-timer"; + interrupts = <1 13 0xf08>, + <1 14 0xf08>, + <1 11 0xf08>, + <1 10 0xf08>; + }; +}; --- 0011/arch/arm/mach-shmobile/Kconfig +++ work/arch/arm/mach-shmobile/Kconfig 2013-03-20 23:05:41.000000000 +0900 @@ -43,6 +43,13 @@ config ARCH_R8A7779 select USB_ARCH_HAS_OHCI select RENESAS_INTC_IRQPIN +config ARCH_R8A7790 + bool "R-Car H2 (R8A77900)" + select ARM_GIC + select CPU_V7 + select ARM_ARCH_TIMER + select SH_CLK_CPG + config ARCH_EMEV2 bool "Emma Mobile EV2" select ARCH_WANT_OPTIONAL_GPIOLIB --- 0009/arch/arm/mach-shmobile/Makefile +++ work/arch/arm/mach-shmobile/Makefile 2013-03-20 23:05:41.000000000 +0900 @@ -11,6 +11,7 @@ obj-$(CONFIG_ARCH_SH73A0) += setup-sh73a obj-$(CONFIG_ARCH_R8A73A4) += setup-r8a73a4.o clock-r8a73a4.o obj-$(CONFIG_ARCH_R8A7740) += setup-r8a7740.o clock-r8a7740.o intc-r8a7740.o obj-$(CONFIG_ARCH_R8A7779) += setup-r8a7779.o clock-r8a7779.o intc-r8a7779.o +obj-$(CONFIG_ARCH_R8A7790) += setup-r8a7790.o clock-r8a7790.o obj-$(CONFIG_ARCH_EMEV2) += setup-emev2.o clock-emev2.o # SMP objects --- /dev/null +++ work/arch/arm/mach-shmobile/clock-r8a7790.c 2013-03-20 23:05:42.000000000 +0900 @@ -0,0 +1,61 @@ +/* + * r8a7790 clock framework support + * + * Copyright (C) 2013 Renesas Solutions Corp. + * Copyright (C) 2013 Magnus Damm + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ +#include <linux/init.h> +#include <linux/io.h> +#include <linux/kernel.h> +#include <linux/sh_clk.h> +#include <linux/clkdev.h> +#include <mach/common.h> + +#define CPG_BASE 0xe6150000 +#define CPG_LEN 0x1000 + +static struct clk_mapping cpg_mapping = { + .phys = CPG_BASE, + .len = CPG_LEN, +}; + +static struct clk *main_clks[] = { +}; + +enum { MSTP_NR }; +static struct clk mstp_clks[MSTP_NR] = { +}; + +static struct clk_lookup lookups[] = { +}; + +void __init r8a7790_clock_init(void) +{ + int k, ret = 0; + + for (k = 0; !ret && (k < ARRAY_SIZE(main_clks)); k++) + ret = clk_register(main_clks[k]); + + if (!ret) + ret = sh_clk_mstp_register(mstp_clks, MSTP_NR); + + clkdev_add_table(lookups, ARRAY_SIZE(lookups)); + + if (!ret) + shmobile_clk_init(); + else + panic("failed to setup r8a7790 clocks\n"); +} --- /dev/null +++ work/arch/arm/mach-shmobile/include/mach/r8a7790.h 2013-03-20 23:14:00.000000000 +0900 @@ -0,0 +1,7 @@ +#ifndef __ASM_R8A7790_H__ +#define __ASM_R8A7790_H__ + +void r8a7790_add_standard_devices(void); +void r8a7790_clock_init(void); + +#endif /* __ASM_R8A7790_H__ */ --- /dev/null +++ work/arch/arm/mach-shmobile/setup-r8a7790.c 2013-03-20 23:05:42.000000000 +0900 @@ -0,0 +1,51 @@ +/* + * r8a7790 processor support + * + * Copyright (C) 2013 Renesas Solutions Corp. + * Copyright (C) 2013 Magnus Damm + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include <linux/irq.h> +#include <linux/irqchip.h> +#include <linux/kernel.h> +#include <linux/of_platform.h> +#include <mach/common.h> +#include <mach/irqs.h> +#include <mach/r8a7790.h> +#include <asm/mach/arch.h> + +void __init r8a7790_add_standard_devices(void) +{ +} + +#ifdef CONFIG_USE_OF +void __init r8a7790_add_standard_devices_dt(void) +{ + of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL); +} + +static const char *r8a7790_boards_compat_dt[] __initdata = { + "renesas,r8a7790", + NULL, +}; + +DT_MACHINE_START(R8A7790_DT, "Generic R8A7790 (Flattened Device Tree)") + .init_irq = irqchip_init, + .init_machine = r8a7790_add_standard_devices_dt, + .init_time = shmobile_timer_init, + .dt_compat = r8a7790_boards_compat_dt, +MACHINE_END +#endif /* CONFIG_USE_OF */ ^ permalink raw reply [flat|nested] 8+ messages in thread
* [PATCH 02/04] ARM: shmobile: r8a7790 SCIF support 2013-03-20 14:36 [PATCH 00/04] ARM: shmobile: r8a7790 SoC and Lager board support Magnus Damm 2013-03-20 14:36 ` [PATCH 01/04] ARM: shmobile: Initial r8a7790 SoC support Magnus Damm @ 2013-03-20 14:36 ` Magnus Damm 2013-03-20 14:36 ` [PATCH 03/04] ARM: shmobile: r8a7790 IRQC support Magnus Damm ` (2 subsequent siblings) 4 siblings, 0 replies; 8+ messages in thread From: Magnus Damm @ 2013-03-20 14:36 UTC (permalink / raw) To: linux-arm-kernel From: Magnus Damm <damm@opensource.se> Add SCIF serial port support to the r8a7790 SoC by adding platform devices for SCIFA0 -> SCIFA2 as well as SCIFB0 -> SCIFB2 and SCIF0 -> SCIF1 together with clock bindings. DT device description is excluded at this point since such bindings are still under development. Signed-off-by: Magnus Damm <damm@opensource.se> --- arch/arm/mach-shmobile/clock-r8a7790.c | 34 +++++++++++++++++++ arch/arm/mach-shmobile/setup-r8a7790.c | 55 ++++++++++++++++++++++++++++++++ 2 files changed, 88 insertions(+), 1 deletion(-) --- 0012/arch/arm/mach-shmobile/clock-r8a7790.c +++ work/arch/arm/mach-shmobile/clock-r8a7790.c 2013-03-20 23:18:42.000000000 +0900 @@ -27,19 +27,51 @@ #define CPG_BASE 0xe6150000 #define CPG_LEN 0x1000 +#define SMSTPCR2 0xe6150138 +#define SMSTPCR7 0xe615014c + static struct clk_mapping cpg_mapping = { .phys = CPG_BASE, .len = CPG_LEN, }; +static struct clk p_clk = { + .rate = 65000000, /* shortcut for now */ + .mapping = &cpg_mapping, +}; + +static struct clk mp_clk = { + .rate = 52000000, /* shortcut for now */ + .mapping = &cpg_mapping, +}; + static struct clk *main_clks[] = { + &p_clk, + &mp_clk, }; -enum { MSTP_NR }; +enum { MSTP721, MSTP720, + MSTP216, MSTP207, MSTP206, MSTP204, MSTP203, MSTP202, MSTP_NR }; static struct clk mstp_clks[MSTP_NR] = { + [MSTP721] = SH_CLK_MSTP32(&p_clk, SMSTPCR7, 21, 0), /* SCIF0 */ + [MSTP720] = SH_CLK_MSTP32(&p_clk, SMSTPCR7, 20, 0), /* SCIF1 */ + [MSTP216] = SH_CLK_MSTP32(&mp_clk, SMSTPCR2, 16, 0), /* SCIFB2 */ + [MSTP207] = SH_CLK_MSTP32(&mp_clk, SMSTPCR2, 7, 0), /* SCIFB1 */ + [MSTP206] = SH_CLK_MSTP32(&mp_clk, SMSTPCR2, 6, 0), /* SCIFB0 */ + [MSTP204] = SH_CLK_MSTP32(&mp_clk, SMSTPCR2, 4, 0), /* SCIFA0 */ + [MSTP203] = SH_CLK_MSTP32(&mp_clk, SMSTPCR2, 3, 0), /* SCIFA1 */ + [MSTP202] = SH_CLK_MSTP32(&mp_clk, SMSTPCR2, 2, 0), /* SCIFA2 */ }; static struct clk_lookup lookups[] = { + CLKDEV_DEV_ID("sh-sci.0", &mstp_clks[MSTP204]), + CLKDEV_DEV_ID("sh-sci.1", &mstp_clks[MSTP203]), + CLKDEV_DEV_ID("sh-sci.2", &mstp_clks[MSTP206]), + CLKDEV_DEV_ID("sh-sci.3", &mstp_clks[MSTP207]), + CLKDEV_DEV_ID("sh-sci.4", &mstp_clks[MSTP216]), + CLKDEV_DEV_ID("sh-sci.5", &mstp_clks[MSTP202]), + CLKDEV_DEV_ID("sh-sci.6", &mstp_clks[MSTP721]), + CLKDEV_DEV_ID("sh-sci.7", &mstp_clks[MSTP720]), }; void __init r8a7790_clock_init(void) --- 0012/arch/arm/mach-shmobile/setup-r8a7790.c +++ work/arch/arm/mach-shmobile/setup-r8a7790.c 2013-03-20 23:15:07.000000000 +0900 @@ -22,13 +22,68 @@ #include <linux/irqchip.h> #include <linux/kernel.h> #include <linux/of_platform.h> +#include <linux/serial_sci.h> #include <mach/common.h> #include <mach/irqs.h> #include <mach/r8a7790.h> #include <asm/mach/arch.h> +#define SCIF_COMMON(scif_type, baseaddr, irq) \ + .type = scif_type, \ + .mapbase = baseaddr, \ + .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP, \ + .irqs = SCIx_IRQ_MUXED(irq) + +#define SCIFA_DATA(index, baseaddr, irq) \ +[index] = { \ + SCIF_COMMON(PORT_SCIFA, baseaddr, irq), \ + .scbrr_algo_id = SCBRR_ALGO_4, \ + .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE0, \ +} + +#define SCIFB_DATA(index, baseaddr, irq) \ +[index] = { \ + SCIF_COMMON(PORT_SCIFB, baseaddr, irq), \ + .scbrr_algo_id = SCBRR_ALGO_4, \ + .scscr = SCSCR_RE | SCSCR_TE, \ +} + +#define SCIF_DATA(index, baseaddr, irq) \ +[index] = { \ + SCIF_COMMON(PORT_SCIF, baseaddr, irq), \ + .scbrr_algo_id = SCBRR_ALGO_2, \ + .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1, \ +} + +enum { SCIFA0, SCIFA1, SCIFB0, SCIFB1, SCIFB2, SCIFA2, SCIF0, SCIF1 }; + +static const struct plat_sci_port scif[] = { + SCIFA_DATA(SCIFA0, 0xe6c40000, gic_spi(144)), /* SCIFA0 */ + SCIFA_DATA(SCIFA1, 0xe6c50000, gic_spi(145)), /* SCIFA1 */ + SCIFB_DATA(SCIFB0, 0xe6c20000, gic_spi(148)), /* SCIFB0 */ + SCIFB_DATA(SCIFB1, 0xe6c30000, gic_spi(149)), /* SCIFB1 */ + SCIFB_DATA(SCIFB2, 0xe6ce0000, gic_spi(150)), /* SCIFB2 */ + SCIFA_DATA(SCIFA2, 0xe6c60000, gic_spi(151)), /* SCIFA2 */ + SCIF_DATA(SCIF0, 0xe6e60000, gic_spi(152)), /* SCIF0 */ + SCIF_DATA(SCIF1, 0xe6e68000, gic_spi(153)), /* SCIF1 */ +}; + +static inline void r8a7790_register_scif(int idx) +{ + platform_device_register_data(&platform_bus, "sh-sci", idx, &scif[idx], + sizeof(struct plat_sci_port)); +} + void __init r8a7790_add_standard_devices(void) { + r8a7790_register_scif(SCIFA0); + r8a7790_register_scif(SCIFA1); + r8a7790_register_scif(SCIFB0); + r8a7790_register_scif(SCIFB1); + r8a7790_register_scif(SCIFB2); + r8a7790_register_scif(SCIFA2); + r8a7790_register_scif(SCIF0); + r8a7790_register_scif(SCIF1); } #ifdef CONFIG_USE_OF ^ permalink raw reply [flat|nested] 8+ messages in thread
* [PATCH 03/04] ARM: shmobile: r8a7790 IRQC support 2013-03-20 14:36 [PATCH 00/04] ARM: shmobile: r8a7790 SoC and Lager board support Magnus Damm 2013-03-20 14:36 ` [PATCH 01/04] ARM: shmobile: Initial r8a7790 SoC support Magnus Damm 2013-03-20 14:36 ` [PATCH 02/04] ARM: shmobile: r8a7790 SCIF support Magnus Damm @ 2013-03-20 14:36 ` Magnus Damm 2013-03-20 14:36 ` [PATCH 04/04] ARM: shmobile: Lager support Magnus Damm 2013-03-21 11:38 ` [PATCH 00/04] ARM: shmobile: r8a7790 SoC and Lager board support Sergei Shtylyov 4 siblings, 0 replies; 8+ messages in thread From: Magnus Damm @ 2013-03-20 14:36 UTC (permalink / raw) To: linux-arm-kernel From: Magnus Damm <damm@opensource.se> Add IRQC interrupt controller support to r8a7790 by hooking up a single IRQC instances to handle 4 external IRQ signals. The IRQC controller is tied to SPIs of the GIC. On r8a7790 the external IRQ pins routing is handled by the PFC which is excluded from this patch. Both platform devices and DT devices are added in this patch. The platform device versions are used to provide a static interrupt map configuration for board code written in C. Signed-off-by: Magnus Damm <damm@opensource.se> --- Depends on: [PATCH] irqchip: Renesas IRQC driver [PATCH] irqchip: irqc: Add DT support arch/arm/boot/dts/r8a7790.dtsi | 9 +++++++++ arch/arm/mach-shmobile/Kconfig | 1 + arch/arm/mach-shmobile/setup-r8a7790.c | 21 +++++++++++++++++++++ 3 files changed, 31 insertions(+) --- 0012/arch/arm/boot/dts/r8a7790.dtsi +++ work/arch/arm/boot/dts/r8a7790.dtsi 2013-03-20 22:56:52.000000000 +0900 @@ -51,4 +51,13 @@ <1 11 0xf08>, <1 10 0xf08>; }; + + irqc0: interrupt-controller at e61c0000 { + compatible = "renesas,irqc"; + #interrupt-cells = <2>; + interrupt-controller; + reg = <0xe61c0000 0x200>; + interrupt-parent = <&gic>; + interrupts = <0 0 4>, <0 1 4>, <0 2 4>, <0 3 4>; + }; }; --- 0012/arch/arm/mach-shmobile/Kconfig +++ work/arch/arm/mach-shmobile/Kconfig 2013-03-20 22:56:52.000000000 +0900 @@ -49,6 +49,7 @@ config ARCH_R8A7790 select CPU_V7 select ARM_ARCH_TIMER select SH_CLK_CPG + select RENESAS_IRQC config ARCH_EMEV2 bool "Emma Mobile EV2" --- 0013/arch/arm/mach-shmobile/setup-r8a7790.c +++ work/arch/arm/mach-shmobile/setup-r8a7790.c 2013-03-20 22:57:09.000000000 +0900 @@ -23,6 +23,7 @@ #include <linux/kernel.h> #include <linux/of_platform.h> #include <linux/serial_sci.h> +#include <linux/platform_data/irq-renesas-irqc.h> #include <mach/common.h> #include <mach/irqs.h> #include <mach/r8a7790.h> @@ -74,6 +75,25 @@ static inline void r8a7790_register_scif sizeof(struct plat_sci_port)); } +static struct renesas_irqc_config irqc0_data = { + .irq_base = irq_pin(0), /* IRQ0 -> IRQ3 */ +}; + +static struct resource irqc0_resources[] = { + DEFINE_RES_MEM(0xe61c0000, 0x200), /* IRQC Event Detector Block_0 */ + DEFINE_RES_IRQ(gic_spi(0)), /* IRQ0 */ + DEFINE_RES_IRQ(gic_spi(1)), /* IRQ1 */ + DEFINE_RES_IRQ(gic_spi(2)), /* IRQ2 */ + DEFINE_RES_IRQ(gic_spi(3)), /* IRQ3 */ +}; + +#define r8a7790_register_irqc(idx) \ + platform_device_register_resndata(&platform_bus, "renesas_irqc", \ + idx, irqc##idx##_resources, \ + ARRAY_SIZE(irqc##idx##_resources), \ + &irqc##idx##_data, \ + sizeof(struct renesas_irqc_config)) + void __init r8a7790_add_standard_devices(void) { r8a7790_register_scif(SCIFA0); @@ -84,6 +104,7 @@ void __init r8a7790_add_standard_devices r8a7790_register_scif(SCIFA2); r8a7790_register_scif(SCIF0); r8a7790_register_scif(SCIF1); + r8a7790_register_irqc(0); } #ifdef CONFIG_USE_OF ^ permalink raw reply [flat|nested] 8+ messages in thread
* [PATCH 04/04] ARM: shmobile: Lager support 2013-03-20 14:36 [PATCH 00/04] ARM: shmobile: r8a7790 SoC and Lager board support Magnus Damm ` (2 preceding siblings ...) 2013-03-20 14:36 ` [PATCH 03/04] ARM: shmobile: r8a7790 IRQC support Magnus Damm @ 2013-03-20 14:36 ` Magnus Damm 2013-03-21 11:38 ` [PATCH 00/04] ARM: shmobile: r8a7790 SoC and Lager board support Sergei Shtylyov 4 siblings, 0 replies; 8+ messages in thread From: Magnus Damm @ 2013-03-20 14:36 UTC (permalink / raw) To: linux-arm-kernel From: Magnus Damm <damm@opensource.se> Lager base board support making use of 2 GiB of memory, the r8a7790 SoC with the SCIF0 serial port and CA15 with ARM architected timer. Signed-off-by: Magnus Damm <damm@opensource.se> --- arch/arm/boot/dts/Makefile | 1 arch/arm/boot/dts/r8a7790-lager.dts | 26 +++++++++++++++++++ arch/arm/mach-shmobile/Kconfig | 9 +++++- arch/arm/mach-shmobile/Makefile | 1 arch/arm/mach-shmobile/board-lager.c | 46 ++++++++++++++++++++++++++++++++++ 5 files changed, 82 insertions(+), 1 deletion(-) --- 0009/arch/arm/boot/dts/Makefile +++ work/arch/arm/boot/dts/Makefile 2013-03-20 21:09:38.000000000 +0900 @@ -137,6 +137,7 @@ dtb-$(CONFIG_ARCH_U8500) += snowball.dtb dtb-$(CONFIG_ARCH_SHMOBILE) += emev2-kzm9d.dtb \ r8a7740-armadillo800eva.dtb \ r8a7779-marzen-reference.dtb \ + r8a7790-lager.dtb \ sh73a0-kzm9g.dtb \ sh73a0-kzm9g-reference.dtb \ r8a73a4-ape6evm.dtb \ --- /dev/null +++ work/arch/arm/boot/dts/r8a7790-lager.dts 2013-03-20 21:09:39.000000000 +0900 @@ -0,0 +1,26 @@ +/* + * Device Tree Source for the Lager board + * + * Copyright (C) 2013 Renesas Solutions Corp. + * + * This file is licensed under the terms of the GNU General Public License + * version 2. This program is licensed "as is" without any warranty of any + * kind, whether express or implied. + */ + +/dts-v1/; +/include/ "r8a7790.dtsi" + +/ { + model = "Lager"; + compatible = "renesas,lager", "renesas,r8a7790"; + + chosen { + bootargs = "console=ttySC6,115200 ignore_loglevel"; + }; + + memory at 40000000 { + device_type = "memory"; + reg = <0x40000000 0x80000000>; + }; +}; --- 0014/arch/arm/mach-shmobile/Kconfig +++ work/arch/arm/mach-shmobile/Kconfig 2013-03-20 21:09:38.000000000 +0900 @@ -141,6 +141,11 @@ config MACH_MARZEN_REFERENCE This is intended to aid developers +config MACH_LAGER + bool "Lager board" + depends on ARCH_R8A7790 + select USE_OF + config MACH_KZM9D bool "KZM9D board" depends on ARCH_EMEV2 @@ -181,7 +186,8 @@ config MEMORY_START hex "Physical memory start address" default "0x40000000" if MACH_AP4EVB || MACH_AG5EVM || \ MACH_MACKEREL || MACH_BONITO || \ - MACH_ARMADILLO800EVA || MACH_APE6EVM + MACH_ARMADILLO800EVA || MACH_APE6EVM || \ + MACH_LAGER default "0x41000000" if MACH_KOTA2 default "0x00000000" ---help--- @@ -191,6 +197,7 @@ config MEMORY_START config MEMORY_SIZE hex "Physical memory size" + default "0x80000000" if MACH_LAGER default "0x40000000" if MACH_APE6EVM default "0x20000000" if MACH_AG5EVM || MACH_BONITO || \ MACH_ARMADILLO800EVA --- 0012/arch/arm/mach-shmobile/Makefile +++ work/arch/arm/mach-shmobile/Makefile 2013-03-20 21:09:38.000000000 +0900 @@ -42,6 +42,7 @@ obj-$(CONFIG_MACH_KOTA2) += board-kota2. obj-$(CONFIG_MACH_BONITO) += board-bonito.o obj-$(CONFIG_MACH_MARZEN) += board-marzen.o obj-$(CONFIG_MACH_MARZEN_REFERENCE) += board-marzen-reference.o +obj-$(CONFIG_MACH_LAGER) += board-lager.o obj-$(CONFIG_MACH_ARMADILLO800EVA) += board-armadillo800eva.o obj-$(CONFIG_MACH_KZM9D) += board-kzm9d.o obj-$(CONFIG_MACH_KZM9G) += board-kzm9g.o --- /dev/null +++ work/arch/arm/mach-shmobile/board-lager.c 2013-03-20 21:12:05.000000000 +0900 @@ -0,0 +1,46 @@ +/* + * Lager board support + * + * Copyright (C) 2013 Renesas Solutions Corp. + * Copyright (C) 2013 Magnus Damm + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include <linux/interrupt.h> +#include <linux/irqchip.h> +#include <linux/kernel.h> +#include <linux/platform_device.h> +#include <mach/common.h> +#include <mach/r8a7790.h> +#include <asm/mach-types.h> +#include <asm/mach/arch.h> + +static void __init lager_add_standard_devices(void) +{ + r8a7790_clock_init(); + r8a7790_add_standard_devices(); +} + +static const char *lager_boards_compat_dt[] __initdata = { + "renesas,lager", + NULL, +}; + +DT_MACHINE_START(LAGER_DT, "lager") + .init_irq = irqchip_init, + .init_time = shmobile_timer_init, + .init_machine = lager_add_standard_devices, + .dt_compat = lager_boards_compat_dt, +MACHINE_END ^ permalink raw reply [flat|nested] 8+ messages in thread
* [PATCH 00/04] ARM: shmobile: r8a7790 SoC and Lager board support 2013-03-20 14:36 [PATCH 00/04] ARM: shmobile: r8a7790 SoC and Lager board support Magnus Damm ` (3 preceding siblings ...) 2013-03-20 14:36 ` [PATCH 04/04] ARM: shmobile: Lager support Magnus Damm @ 2013-03-21 11:38 ` Sergei Shtylyov 2013-03-25 7:44 ` Simon Horman 4 siblings, 1 reply; 8+ messages in thread From: Sergei Shtylyov @ 2013-03-21 11:38 UTC (permalink / raw) To: linux-arm-kernel Hello. On 20-03-2013 18:36, Magnus Damm wrote: > ARM: shmobile: r8a7790 SoC and Lager board support > [PATCH 01/04] ARM: shmobile: Initial r8a7790 SoC support > [PATCH 02/04] ARM: shmobile: r8a7790 SCIF support > [PATCH 03/04] ARM: shmobile: r8a7790 IRQC support > [PATCH 04/04] ARM: shmobile: Lager support > > This series adds initial support for r8a7790 and Lager. The SoC > is known as r8a7790 which is built around Cortex-A15 and makes use > of SCIF for serial and IRQC interrupt controller for external IRQs. Is it the same as R-Car H2? WBR, Sergei ^ permalink raw reply [flat|nested] 8+ messages in thread
* [PATCH 00/04] ARM: shmobile: r8a7790 SoC and Lager board support 2013-03-21 11:38 ` [PATCH 00/04] ARM: shmobile: r8a7790 SoC and Lager board support Sergei Shtylyov @ 2013-03-25 7:44 ` Simon Horman 0 siblings, 0 replies; 8+ messages in thread From: Simon Horman @ 2013-03-25 7:44 UTC (permalink / raw) To: linux-arm-kernel On Thu, Mar 21, 2013 at 03:38:50PM +0400, Sergei Shtylyov wrote: > Hello. > > On 20-03-2013 18:36, Magnus Damm wrote: > > >ARM: shmobile: r8a7790 SoC and Lager board support > > >[PATCH 01/04] ARM: shmobile: Initial r8a7790 SoC support > >[PATCH 02/04] ARM: shmobile: r8a7790 SCIF support > >[PATCH 03/04] ARM: shmobile: r8a7790 IRQC support > >[PATCH 04/04] ARM: shmobile: Lager support > > > >This series adds initial support for r8a7790 and Lager. The SoC > >is known as r8a7790 which is built around Cortex-A15 and makes use > >of SCIF for serial and IRQC interrupt controller for external IRQs. > > Is it the same as R-Car H2? Yes, I believe so. ^ permalink raw reply [flat|nested] 8+ messages in thread
* [PATCH 00/04 v2] ARM: shmobile: r8a7790 SoC @ 2013-03-27 15:49 Magnus Damm 2013-03-27 15:49 ` [PATCH 02/04] ARM: shmobile: r8a7790 SCIF support Magnus Damm 0 siblings, 1 reply; 8+ messages in thread From: Magnus Damm @ 2013-03-27 15:49 UTC (permalink / raw) To: linux-arm-kernel ARM: shmobile: r8a7790 SoC (V2) [PATCH 01/04] ARM: shmobile: Initial r8a7790 SoC support [PATCH 02/04] ARM: shmobile: r8a7790 SCIF support [PATCH 03/04] ARM: shmobile: r8a7790 IRQC support [PATCH 04/04] ARM: shmobile: r8a7790 PFC support This series is V2 of initial support for the r8a7790 SoC. The SoC is known as r8a7790 which is built around Cortex-A15 and makes use of SCIF for serial and IRQC interrupt controller for external IRQs. Changes in V2: - Added PFC platform device Future r8a7790 PFC and Lager board series will depend on this one. Signed-off-by: Magnus Damm <damm@opensource.se> --- Written on top of renesas-next-20130327 arch/arm/boot/dts/r8a7790.dtsi | 63 +++++++++++ arch/arm/mach-shmobile/Kconfig | 9 + arch/arm/mach-shmobile/Makefile | 1 arch/arm/mach-shmobile/clock-r8a7790.c | 95 +++++++++++++++++ arch/arm/mach-shmobile/include/mach/r8a7790.h | 8 + arch/arm/mach-shmobile/setup-r8a7790.c | 137 +++++++++++++++++++++++++ 6 files changed, 312 insertions(+), 1 deletion(-) ^ permalink raw reply [flat|nested] 8+ messages in thread
* [PATCH 02/04] ARM: shmobile: r8a7790 SCIF support 2013-03-27 15:49 [PATCH 00/04 v2] ARM: shmobile: r8a7790 SoC Magnus Damm @ 2013-03-27 15:49 ` Magnus Damm 0 siblings, 0 replies; 8+ messages in thread From: Magnus Damm @ 2013-03-27 15:49 UTC (permalink / raw) To: linux-arm-kernel From: Magnus Damm <damm@opensource.se> Add SCIF serial port support to the r8a7790 SoC by adding platform devices for SCIFA0 -> SCIFA2 as well as SCIFB0 -> SCIFB2 and SCIF0 -> SCIF1 together with clock bindings. DT device description is excluded at this point since such bindings are still under development. Signed-off-by: Magnus Damm <damm@opensource.se> --- arch/arm/mach-shmobile/clock-r8a7790.c | 34 +++++++++++++++++++ arch/arm/mach-shmobile/setup-r8a7790.c | 55 ++++++++++++++++++++++++++++++++ 2 files changed, 88 insertions(+), 1 deletion(-) --- 0012/arch/arm/mach-shmobile/clock-r8a7790.c +++ work/arch/arm/mach-shmobile/clock-r8a7790.c 2013-03-20 23:18:42.000000000 +0900 @@ -27,19 +27,51 @@ #define CPG_BASE 0xe6150000 #define CPG_LEN 0x1000 +#define SMSTPCR2 0xe6150138 +#define SMSTPCR7 0xe615014c + static struct clk_mapping cpg_mapping = { .phys = CPG_BASE, .len = CPG_LEN, }; +static struct clk p_clk = { + .rate = 65000000, /* shortcut for now */ + .mapping = &cpg_mapping, +}; + +static struct clk mp_clk = { + .rate = 52000000, /* shortcut for now */ + .mapping = &cpg_mapping, +}; + static struct clk *main_clks[] = { + &p_clk, + &mp_clk, }; -enum { MSTP_NR }; +enum { MSTP721, MSTP720, + MSTP216, MSTP207, MSTP206, MSTP204, MSTP203, MSTP202, MSTP_NR }; static struct clk mstp_clks[MSTP_NR] = { + [MSTP721] = SH_CLK_MSTP32(&p_clk, SMSTPCR7, 21, 0), /* SCIF0 */ + [MSTP720] = SH_CLK_MSTP32(&p_clk, SMSTPCR7, 20, 0), /* SCIF1 */ + [MSTP216] = SH_CLK_MSTP32(&mp_clk, SMSTPCR2, 16, 0), /* SCIFB2 */ + [MSTP207] = SH_CLK_MSTP32(&mp_clk, SMSTPCR2, 7, 0), /* SCIFB1 */ + [MSTP206] = SH_CLK_MSTP32(&mp_clk, SMSTPCR2, 6, 0), /* SCIFB0 */ + [MSTP204] = SH_CLK_MSTP32(&mp_clk, SMSTPCR2, 4, 0), /* SCIFA0 */ + [MSTP203] = SH_CLK_MSTP32(&mp_clk, SMSTPCR2, 3, 0), /* SCIFA1 */ + [MSTP202] = SH_CLK_MSTP32(&mp_clk, SMSTPCR2, 2, 0), /* SCIFA2 */ }; static struct clk_lookup lookups[] = { + CLKDEV_DEV_ID("sh-sci.0", &mstp_clks[MSTP204]), + CLKDEV_DEV_ID("sh-sci.1", &mstp_clks[MSTP203]), + CLKDEV_DEV_ID("sh-sci.2", &mstp_clks[MSTP206]), + CLKDEV_DEV_ID("sh-sci.3", &mstp_clks[MSTP207]), + CLKDEV_DEV_ID("sh-sci.4", &mstp_clks[MSTP216]), + CLKDEV_DEV_ID("sh-sci.5", &mstp_clks[MSTP202]), + CLKDEV_DEV_ID("sh-sci.6", &mstp_clks[MSTP721]), + CLKDEV_DEV_ID("sh-sci.7", &mstp_clks[MSTP720]), }; void __init r8a7790_clock_init(void) --- 0012/arch/arm/mach-shmobile/setup-r8a7790.c +++ work/arch/arm/mach-shmobile/setup-r8a7790.c 2013-03-20 23:15:07.000000000 +0900 @@ -22,13 +22,68 @@ #include <linux/irqchip.h> #include <linux/kernel.h> #include <linux/of_platform.h> +#include <linux/serial_sci.h> #include <mach/common.h> #include <mach/irqs.h> #include <mach/r8a7790.h> #include <asm/mach/arch.h> +#define SCIF_COMMON(scif_type, baseaddr, irq) \ + .type = scif_type, \ + .mapbase = baseaddr, \ + .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP, \ + .irqs = SCIx_IRQ_MUXED(irq) + +#define SCIFA_DATA(index, baseaddr, irq) \ +[index] = { \ + SCIF_COMMON(PORT_SCIFA, baseaddr, irq), \ + .scbrr_algo_id = SCBRR_ALGO_4, \ + .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE0, \ +} + +#define SCIFB_DATA(index, baseaddr, irq) \ +[index] = { \ + SCIF_COMMON(PORT_SCIFB, baseaddr, irq), \ + .scbrr_algo_id = SCBRR_ALGO_4, \ + .scscr = SCSCR_RE | SCSCR_TE, \ +} + +#define SCIF_DATA(index, baseaddr, irq) \ +[index] = { \ + SCIF_COMMON(PORT_SCIF, baseaddr, irq), \ + .scbrr_algo_id = SCBRR_ALGO_2, \ + .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1, \ +} + +enum { SCIFA0, SCIFA1, SCIFB0, SCIFB1, SCIFB2, SCIFA2, SCIF0, SCIF1 }; + +static const struct plat_sci_port scif[] = { + SCIFA_DATA(SCIFA0, 0xe6c40000, gic_spi(144)), /* SCIFA0 */ + SCIFA_DATA(SCIFA1, 0xe6c50000, gic_spi(145)), /* SCIFA1 */ + SCIFB_DATA(SCIFB0, 0xe6c20000, gic_spi(148)), /* SCIFB0 */ + SCIFB_DATA(SCIFB1, 0xe6c30000, gic_spi(149)), /* SCIFB1 */ + SCIFB_DATA(SCIFB2, 0xe6ce0000, gic_spi(150)), /* SCIFB2 */ + SCIFA_DATA(SCIFA2, 0xe6c60000, gic_spi(151)), /* SCIFA2 */ + SCIF_DATA(SCIF0, 0xe6e60000, gic_spi(152)), /* SCIF0 */ + SCIF_DATA(SCIF1, 0xe6e68000, gic_spi(153)), /* SCIF1 */ +}; + +static inline void r8a7790_register_scif(int idx) +{ + platform_device_register_data(&platform_bus, "sh-sci", idx, &scif[idx], + sizeof(struct plat_sci_port)); +} + void __init r8a7790_add_standard_devices(void) { + r8a7790_register_scif(SCIFA0); + r8a7790_register_scif(SCIFA1); + r8a7790_register_scif(SCIFB0); + r8a7790_register_scif(SCIFB1); + r8a7790_register_scif(SCIFB2); + r8a7790_register_scif(SCIFA2); + r8a7790_register_scif(SCIF0); + r8a7790_register_scif(SCIF1); } #ifdef CONFIG_USE_OF ^ permalink raw reply [flat|nested] 8+ messages in thread
end of thread, other threads:[~2013-03-27 15:49 UTC | newest] Thread overview: 8+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2013-03-20 14:36 [PATCH 00/04] ARM: shmobile: r8a7790 SoC and Lager board support Magnus Damm 2013-03-20 14:36 ` [PATCH 01/04] ARM: shmobile: Initial r8a7790 SoC support Magnus Damm 2013-03-20 14:36 ` [PATCH 02/04] ARM: shmobile: r8a7790 SCIF support Magnus Damm 2013-03-20 14:36 ` [PATCH 03/04] ARM: shmobile: r8a7790 IRQC support Magnus Damm 2013-03-20 14:36 ` [PATCH 04/04] ARM: shmobile: Lager support Magnus Damm 2013-03-21 11:38 ` [PATCH 00/04] ARM: shmobile: r8a7790 SoC and Lager board support Sergei Shtylyov 2013-03-25 7:44 ` Simon Horman -- strict thread matches above, loose matches on Subject: below -- 2013-03-27 15:49 [PATCH 00/04 v2] ARM: shmobile: r8a7790 SoC Magnus Damm 2013-03-27 15:49 ` [PATCH 02/04] ARM: shmobile: r8a7790 SCIF support Magnus Damm
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