From: s.trumtrar@pengutronix.de (Steffen Trumtrar)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 2/3] ARM: zynq: get slcr base earlier
Date: Mon, 25 Mar 2013 15:39:00 +0100 [thread overview]
Message-ID: <20130325143900.GC27739@pengutronix.de> (raw)
In-Reply-To: <CAHTX3dJDTvs4UXoTa_8u4M83fQ9N2n96ecZzFjaXLsXkp_vWjg@mail.gmail.com>
On Mon, Mar 25, 2013 at 03:04:36PM +0100, Michal Simek wrote:
> 2013/3/23 Steffen Trumtrar <s.trumtrar@pengutronix.de>:
> > The slcr is needed for pinctrl, clocks and reset. Therefore we want it as early
> > as possible. As there is no driver that handles it and instead a pointer needs
> > to be passed around, rename the variable to something a little more obvious.
> >
> > Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
> > Cc: Michal Simek <michal.simek@xilinx.com>
> > ---
> > arch/arm/mach-zynq/common.c | 27 ++++++++++++++++++---------
> > 1 file changed, 18 insertions(+), 9 deletions(-)
> >
> > diff --git a/arch/arm/mach-zynq/common.c b/arch/arm/mach-zynq/common.c
> > index 014131c..1b9bb3d 100644
> > --- a/arch/arm/mach-zynq/common.c
> > +++ b/arch/arm/mach-zynq/common.c
> > @@ -38,6 +38,7 @@
> >
> > #include "common.h"
> >
> > +void __iomem *slcr_base_addr;
> > void __iomem *scu_base;
> >
> > static struct of_device_id zynq_of_bus_ids[] __initdata = {
> > @@ -61,19 +62,21 @@ static void __init xilinx_init_machine(void)
> >
> > static void __init xilinx_zynq_timer_init(void)
> > {
> > - struct device_node *np;
> > - void __iomem *slcr;
> > -
> > - np = of_find_compatible_node(NULL, NULL, "xlnx,zynq-slcr");
> > - slcr = of_iomap(np, 0);
> > - WARN_ON(!slcr);
> > -
> > - xilinx_zynq_clocks_init(slcr);
> > + xilinx_zynq_clocks_init(slcr_base_addr);
> >
> > twd_local_timer_of_register();
> > xttcps_timer_init();
> > }
> >
> > +static void zynq_slcr_init(void)
> > +{
> > + struct device_node *np;
> > +
> > + np = of_find_compatible_node(NULL, NULL, "xlnx,zynq-slcr");
> > + slcr_base_addr = of_iomap(np, 0);
> > + WARN_ON(!slcr_base_addr);
> > +}
>
> Xilinx is using separate driver for slcr and IMHO make sense to have it
> like that because this IP can handle more things which will be just messy
> to have it in one file.
> What do you think?
>
Definitely. I think we should have a main slcr driver for locking/unlocking
etc. and the clock/reset/mio-drivers should be "clients" of this.
Then for example the clockdriver would request a write to a register.
The slcr can then unlock and make the write.
But maybe this is overengineering. I haven't found time to look at the
xilinx driver. And I'm actually not sure why I would want to lock the
slcr. But as Xilinx opted for this feature, it should be handeled correctly.
At the moment I was trying to make do with what is there.
Regards,
Steffen
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next prev parent reply other threads:[~2013-03-25 14:39 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-03-23 12:57 [PATCH 0/3] ARM: zynq: add SMP support for zynq7000 Steffen Trumtrar
2013-03-23 12:57 ` [PATCH 1/3] ARM: zynq: read scu base from SoC Steffen Trumtrar
2013-03-25 14:01 ` Michal Simek
2013-03-25 14:25 ` Steffen Trumtrar
2013-03-25 14:59 ` Michal Simek
2013-03-26 11:08 ` Steffen Trumtrar
2013-03-26 12:35 ` Michal Simek
2013-03-26 12:46 ` Steffen Trumtrar
2013-03-26 12:53 ` Michal Simek
2013-03-26 13:01 ` Steffen Trumtrar
2013-03-23 12:57 ` [PATCH 2/3] ARM: zynq: get slcr base earlier Steffen Trumtrar
2013-03-25 14:04 ` Michal Simek
2013-03-25 14:39 ` Steffen Trumtrar [this message]
2013-03-25 14:55 ` Michal Simek
2013-03-23 12:57 ` [PATCH 3/3] ARM: zynq: add SMP support Steffen Trumtrar
2013-03-25 14:27 ` Michal Simek
2013-03-25 16:34 ` Steffen Trumtrar
2013-03-25 16:47 ` Michal Simek
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