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From: jgunthorpe@obsidianresearch.com (Jason Gunthorpe)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCHv6 10/17] arm: mvebu: add PCIe Device Tree informations for Armada 370
Date: Tue, 26 Mar 2013 10:34:21 -0600	[thread overview]
Message-ID: <20130326163421.GA30255@obsidianresearch.com> (raw)
In-Reply-To: <1364314719-1049-11-git-send-email-thomas.petazzoni@free-electrons.com>

On Tue, Mar 26, 2013 at 05:18:32PM +0100, Thomas Petazzoni wrote:

> +		pcie-controller {
> +			compatible = "marvell,armada-370-pcie";
> +			status = "disabled";
> +			device_type = "pci";
> +
> +			#address-cells = <3>;
> +			#size-cells = <2>;
> +
> +			bus-range = <0x00 0xff>;
> +
> +			reg = <0xd0040000 0x2000>, <0xd0080000 0x2000>;
> +
> +			reg-names = "pcie0.0", "pcie1.0";
> +
> +			ranges = <0x82000000 0 0xe0000000 0xe0000000 0 0x08000000   /* non-prefetchable memory */
> +			          0x81000000 0 0          0xe8000000 0 0x00100000>; /* downstream I/O */
> +
> +			pcie at 1,0 {
> +				device_type = "pci";
> +				reg = <0x0800 0 0 0 0>;
> +				#address-cells = <3>;
> +				#size-cells = <2>;

Very Minor Nit: These two # fields are not strictly necessary

> +				#interrupt-cells = <1>;
> +				interrupt-map-mask = <0 0 0 0>;
> +				interrupt-map = <0 0 0 0 &mpic 58>;
> +				marvell,pcie-port = <0>;
> +				marvell,pcie-lane = <0>;
> +				clocks = <&gateclk 5>;
> +				status = "disabled";
> +			};
> +
> +			pcie at 2,0 {
> +				device_type = "pci";
> +				reg = <0x1000 0 0 0 0>;
> +				#address-cells = <3>;
> +				#size-cells = <2>;
> +				#interrupt-cells = <1>;
> +				interrupt-map-mask = <0 0 0 0>;
> +				interrupt-map = <0 0 0 0 &mpic 62>;
> +				marvell,pcie-port = <1>;
> +				marvell,pcie-lane = <0>;
> +				clocks = <&gateclk 9>;
> +				status = "disabled";
> +			};
> +		};
>  	};
>  };


This basically looks fine to me, however, I think it is valuable if
you and Thierry could use the same method to pass per-port registers. I
expect others are going to reference these bindings for future work,
and one standard method is more clear than two.

Thierry: Did you settle on using assigned-addresses? Can you share the
final binding for your driver?

Jingoo Han's driver for Exynos uses lots of per-port registers, so I'm
inclined to think that assigned-addresses is the clearer way forward.

This is a fairly minor comment. Would people be comfortable going in as-is
with a small follow-up revision to the DT?

Regards,
Jason

  reply	other threads:[~2013-03-26 16:34 UTC|newest]

Thread overview: 28+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-03-26 16:18 [PATCHv6 00/17] PCIe support for the Armada 370 and Armada XP SoCs Thomas Petazzoni
2013-03-26 16:18 ` [PATCHv6 01/17] of/pci: Provide support for parsing PCI DT ranges property Thomas Petazzoni
2013-03-26 16:18 ` [PATCHv6 02/17] of/pci: Add of_pci_get_devfn() function Thomas Petazzoni
2013-03-26 16:18 ` [PATCHv6 03/17] of/pci: Add of_pci_parse_bus_range() function Thomas Petazzoni
2013-03-26 16:18 ` [PATCHv6 04/17] pci: infrastructure to add drivers in drivers/pci/host Thomas Petazzoni
2013-03-26 16:18 ` [PATCHv6 05/17] arm: pci: add a align_resource hook Thomas Petazzoni
2013-03-26 16:18 ` [PATCHv6 06/17] clk: mvebu: create parent-child relation for PCIe clocks on Armada 370 Thomas Petazzoni
2013-03-26 16:18 ` [PATCHv6 07/17] clk: mvebu: add more PCIe clocks for Armada XP Thomas Petazzoni
2013-03-26 16:18 ` [PATCHv6 08/17] pci: PCIe driver for Marvell Armada 370/XP systems Thomas Petazzoni
2013-03-26 16:18 ` [PATCHv6 09/17] arm: mvebu: PCIe support is now available on mvebu Thomas Petazzoni
2013-03-26 16:18 ` [PATCHv6 10/17] arm: mvebu: add PCIe Device Tree informations for Armada 370 Thomas Petazzoni
2013-03-26 16:34   ` Jason Gunthorpe [this message]
2013-03-26 16:58     ` Thomas Petazzoni
2013-03-26 20:16     ` Thierry Reding
2013-03-26 20:50       ` Arnd Bergmann
2013-03-26 21:12         ` Thierry Reding
2013-03-26 21:17           ` Arnd Bergmann
2013-03-26 21:27       ` Thomas Petazzoni
2013-03-26 22:51         ` Jason Gunthorpe
2013-03-27  6:36         ` Thierry Reding
2013-03-26 16:18 ` [PATCHv6 11/17] arm: mvebu: add PCIe Device Tree informations for Armada XP Thomas Petazzoni
2013-03-26 16:18 ` [PATCHv6 12/17] arm: mvebu: PCIe Device Tree informations for OpenBlocks AX3-4 Thomas Petazzoni
2013-03-26 16:18 ` [PATCHv6 13/17] arm: mvebu: PCIe Device Tree informations for Armada XP DB Thomas Petazzoni
2013-03-26 16:18 ` [PATCHv6 14/17] arm: mvebu: PCIe Device Tree informations for Armada 370 Mirabox Thomas Petazzoni
2013-03-26 16:18 ` [PATCHv6 15/17] arm: mvebu: PCIe Device Tree informations for Armada 370 DB Thomas Petazzoni
2013-03-26 16:18 ` [PATCHv6 16/17] arm: mvebu: PCIe Device Tree informations for Armada XP GP Thomas Petazzoni
2013-03-26 16:18 ` [PATCHv6 17/17] arm: mvebu: update defconfig with PCI and USB support Thomas Petazzoni
2013-03-26 16:32 ` [PATCHv6 00/17] PCIe support for the Armada 370 and Armada XP SoCs Arnd Bergmann

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