* [PATCH v3 1/5] V4L2: I2C: ML86V7667 video decoder driver
2013-04-23 17:18 [PATCH v3 0/5] OKI ML86V7667 driver and R8A7778/BOCK-W VIN support Sergei Shtylyov
@ 2013-04-23 17:21 ` Sergei Shtylyov
2013-04-23 17:29 ` [PATCH v3 3/5] ARM: shmobile: r8a7778: add VIN support Sergei Shtylyov
` (2 subsequent siblings)
3 siblings, 0 replies; 9+ messages in thread
From: Sergei Shtylyov @ 2013-04-23 17:21 UTC (permalink / raw)
To: linux-arm-kernel
From: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Add OKI Semiconductor ML86V7667 video decoder driver.
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
[Sergei: added v4l2_device_unregister_subdev() call to the error cleanup path of
ml86v7667_probe(); some cleanup.]
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
---
Changes since version 2:
- removed now unused #include;
- fixed querystd() method to return currently detected video standard;
- switched from using V4L2_STD_[PAL|NTSC] to using V4L2_STD_[625_50|525_60].
Changes since the original posting:
- fixed ACCC_CHROMA_CB_MASK;
- got rid of the autodetection feature;
- removed querystd() method calls from other methods;
- removed deprecated g_chip_ident() method.
drivers/media/i2c/Kconfig | 9
drivers/media/i2c/Makefile | 1
drivers/media/i2c/ml86v7667.c | 480 ++++++++++++++++++++++++++++++++++++++++++
3 files changed, 490 insertions(+)
Index: renesas/drivers/media/i2c/Kconfig
===================================================================
--- renesas.orig/drivers/media/i2c/Kconfig
+++ renesas/drivers/media/i2c/Kconfig
@@ -227,6 +227,15 @@ config VIDEO_KS0127
To compile this driver as a module, choose M here: the
module will be called ks0127.
+config VIDEO_ML86V7667
+ tristate "OKI ML86V7667 video decoder"
+ depends on VIDEO_V4L2 && I2C
+ ---help---
+ Support for the OKI Semiconductor ML86V7667 video decoder.
+
+ To compile this driver as a module, choose M here: the
+ module will be called ml86v7667.
+
config VIDEO_SAA7110
tristate "Philips SAA7110 video decoder"
depends on VIDEO_V4L2 && I2C
Index: renesas/drivers/media/i2c/Makefile
===================================================================
--- renesas.orig/drivers/media/i2c/Makefile
+++ renesas/drivers/media/i2c/Makefile
@@ -64,3 +64,4 @@ obj-$(CONFIG_VIDEO_AS3645A) += as3645a.o
obj-$(CONFIG_VIDEO_SMIAPP_PLL) += smiapp-pll.o
obj-$(CONFIG_VIDEO_AK881X) += ak881x.o
obj-$(CONFIG_VIDEO_IR_I2C) += ir-kbd-i2c.o
+obj-$(CONFIG_VIDEO_ML86V7667) += ml86v7667.o
Index: renesas/drivers/media/i2c/ml86v7667.c
===================================================================
--- /dev/null
+++ renesas/drivers/media/i2c/ml86v7667.c
@@ -0,0 +1,480 @@
+/*
+ * OKI Semiconductor ML86V7667 video decoder driver
+ *
+ * Author: Vladimir Barinov <source@cogentembedded.com>
+ * Copyright (C) 2013 Cogent Embedded, Inc.
+ * Copyright (C) 2013 Renesas Solutions Corp.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/i2c.h>
+#include <linux/slab.h>
+#include <linux/videodev2.h>
+#include <media/v4l2-subdev.h>
+#include <media/v4l2-device.h>
+#include <media/v4l2-ioctl.h>
+#include <media/v4l2-ctrls.h>
+
+#define DRV_NAME "ml86v7667"
+
+/* Subaddresses */
+#define MRA_REG 0x00 /* Mode Register A */
+#define MRC_REG 0x02 /* Mode Register C */
+#define LUMC_REG 0x0C /* Luminance Control */
+#define CLC_REG 0x10 /* Contrast level control */
+#define SSEPL_REG 0x11 /* Sync separation level */
+#define CHRCA_REG 0x12 /* Chrominance Control A */
+#define ACCC_REG 0x14 /* ACC Loop filter & Chrominance control */
+#define ACCRC_REG 0x15 /* ACC Reference level control */
+#define HUE_REG 0x16 /* Hue control */
+#define ADC2_REG 0x1F /* ADC Register 2 */
+#define PLLR1_REG 0x20 /* PLL Register 1 */
+#define STATUS_REG 0x2C /* STATUS Register */
+
+/* Mode Register A register bits */
+#define MRA_OUTPUT_MODE_MASK (3 << 6)
+#define MRA_ITUR_BT601 (1 << 6)
+#define MRA_ITUR_BT656 (0 << 6)
+#define MRA_INPUT_MODE_MASK (7 << 3)
+#define MRA_PAL_BT601 (4 << 3)
+#define MRA_NTSC_BT601 (0 << 3)
+#define MRA_REGISTER_MODE (1 << 0)
+
+/* Mode Register C register bits */
+#define MRC_AUTOSELECT (1 << 7)
+
+/* Luminance Control register bits */
+#define LUMC_ONOFF_SHIFT 7
+#define LUMC_ONOFF_MASK (1 << 7)
+
+/* Contrast level control register bits */
+#define CLC_CONTRAST_ONOFF (1 << 7)
+#define CLC_CONTRAST_MASK 0x0F
+
+/* Sync separation level register bits */
+#define SSEPL_LUMINANCE_ONOFF (1 << 7)
+#define SSEPL_LUMINANCE_MASK 0x7F
+
+/* Chrominance Control A register bits */
+#define CHRCA_MODE_SHIFT 6
+#define CHRCA_MODE_MASK (1 << 6)
+
+/* ACC Loop filter & Chrominance control register bits */
+#define ACCC_CHROMA_CR_SHIFT 3
+#define ACCC_CHROMA_CR_MASK (7 << 3)
+#define ACCC_CHROMA_CB_SHIFT 0
+#define ACCC_CHROMA_CB_MASK (7 << 0)
+
+/* ACC Reference level control register bits */
+#define ACCRC_CHROMA_MASK 0xfc
+#define ACCRC_CHROMA_SHIFT 2
+
+/* ADC Register 2 register bits */
+#define ADC2_CLAMP_VOLTAGE_MASK (7 << 1)
+#define ADC2_CLAMP_VOLTAGE(n) ((n & 7) << 1)
+
+/* PLL Register 1 register bits */
+#define PLLR1_FIXED_CLOCK (1 << 7)
+
+/* STATUS Register register bits */
+#define STATUS_HLOCK_DETECT (1 << 3)
+#define STATUS_NTSCPAL (1 << 2)
+
+struct ml86v7667_priv {
+ struct v4l2_subdev sd;
+ struct v4l2_ctrl_handler hdl;
+ struct v4l2_mbus_framefmt fmt;
+ v4l2_std_id std;
+};
+
+static inline struct ml86v7667_priv *to_ml86v7667(struct v4l2_subdev *subdev)
+{
+ return container_of(subdev, struct ml86v7667_priv, sd);
+}
+
+static inline struct v4l2_subdev *to_sd(struct v4l2_ctrl *ctrl)
+{
+ return &container_of(ctrl->handler, struct ml86v7667_priv, hdl)->sd;
+}
+
+static int ml86v7667_mask_set(struct i2c_client *client, const u8 reg,
+ const u8 mask, const u8 data)
+{
+ int val = i2c_smbus_read_byte_data(client, reg);
+ if (val < 0)
+ return val;
+
+ val = (val & ~mask) | (data & mask);
+ return i2c_smbus_write_byte_data(client, reg, val);
+}
+
+static int ml86v7667_s_ctrl(struct v4l2_ctrl *ctrl)
+{
+ struct v4l2_subdev *sd = to_sd(ctrl);
+ struct i2c_client *client = v4l2_get_subdevdata(sd);
+ int ret = 0;
+
+ switch (ctrl->id) {
+ case V4L2_CID_BRIGHTNESS:
+ ret = ml86v7667_mask_set(client, SSEPL_REG,
+ SSEPL_LUMINANCE_MASK, ctrl->val);
+ break;
+ case V4L2_CID_CONTRAST:
+ ret = ml86v7667_mask_set(client, CLC_REG,
+ CLC_CONTRAST_MASK, ctrl->val);
+ break;
+ case V4L2_CID_CHROMA_GAIN:
+ ret = ml86v7667_mask_set(client, ACCRC_REG, ACCRC_CHROMA_MASK,
+ ctrl->val << ACCRC_CHROMA_SHIFT);
+ break;
+ case V4L2_CID_HUE:
+ ret = ml86v7667_mask_set(client, HUE_REG, ~0, ctrl->val);
+ break;
+ case V4L2_CID_RED_BALANCE:
+ ret = ml86v7667_mask_set(client, ACCC_REG,
+ ACCC_CHROMA_CR_MASK,
+ ctrl->val << ACCC_CHROMA_CR_SHIFT);
+ break;
+ case V4L2_CID_BLUE_BALANCE:
+ ret = ml86v7667_mask_set(client, ACCC_REG,
+ ACCC_CHROMA_CB_MASK,
+ ctrl->val << ACCC_CHROMA_CB_SHIFT);
+ break;
+ case V4L2_CID_SHARPNESS:
+ ret = ml86v7667_mask_set(client, LUMC_REG,
+ LUMC_ONOFF_MASK,
+ ctrl->val << LUMC_ONOFF_SHIFT);
+ break;
+ case V4L2_CID_COLOR_KILLER:
+ ret = ml86v7667_mask_set(client, CHRCA_REG,
+ CHRCA_MODE_MASK,
+ ctrl->val << CHRCA_MODE_SHIFT);
+ break;
+ }
+
+ return 0;
+}
+
+static int ml86v7667_querystd(struct v4l2_subdev *sd, v4l2_std_id *std)
+{
+ struct i2c_client *client = v4l2_get_subdevdata(sd);
+ int status;
+
+ status = i2c_smbus_read_byte_data(client, STATUS_REG);
+ if (status < 0)
+ return status;
+
+ if (!(status & STATUS_HLOCK_DETECT))
+ return V4L2_STD_UNKNOWN;
+
+ *std = status & STATUS_NTSCPAL ? V4L2_STD_625_50 : V4L2_STD_525_60;
+
+ return 0;
+}
+
+static int ml86v7667_g_input_status(struct v4l2_subdev *sd, u32 *status)
+{
+ struct i2c_client *client = v4l2_get_subdevdata(sd);
+ int status_reg;
+
+ status_reg = i2c_smbus_read_byte_data(client, STATUS_REG);
+ if (status_reg < 0)
+ return status_reg;
+
+ *status = status_reg & STATUS_HLOCK_DETECT ? 0 : V4L2_IN_ST_NO_SIGNAL;
+
+ return 0;
+}
+
+static int ml86v7667_enum_mbus_fmt(struct v4l2_subdev *sd, unsigned int index,
+ enum v4l2_mbus_pixelcode *code)
+{
+ if (index > 0)
+ return -EINVAL;
+
+ *code = V4L2_MBUS_FMT_YUYV8_2X8;
+
+ return 0;
+}
+
+static int ml86v7667_try_mbus_fmt(struct v4l2_subdev *sd,
+ struct v4l2_mbus_framefmt *fmt)
+{
+ struct ml86v7667_priv *priv = to_ml86v7667(sd);
+
+ fmt->code = V4L2_MBUS_FMT_YUYV8_2X8;
+ fmt->colorspace = V4L2_COLORSPACE_SMPTE170M;
+ fmt->field = V4L2_FIELD_INTERLACED;
+ fmt->width = 720;
+ fmt->height = priv->std & V4L2_STD_525_60 ? 480 : 576;
+
+ return 0;
+}
+
+static int ml86v7667_g_mbus_fmt(struct v4l2_subdev *sd,
+ struct v4l2_mbus_framefmt *fmt)
+{
+ struct ml86v7667_priv *priv = to_ml86v7667(sd);
+
+ *fmt = priv->fmt;
+
+ return 0;
+}
+
+static int ml86v7667_s_mbus_fmt(struct v4l2_subdev *sd,
+ struct v4l2_mbus_framefmt *fmt)
+{
+ struct ml86v7667_priv *priv = to_ml86v7667(sd);
+
+ ml86v7667_try_mbus_fmt(sd, fmt);
+ priv->fmt = *fmt;
+
+ return 0;
+}
+
+static int ml86v7667_cropcap(struct v4l2_subdev *sd, struct v4l2_cropcap *a)
+{
+ struct ml86v7667_priv *priv = to_ml86v7667(sd);
+
+ a->bounds.left = 0;
+ a->bounds.top = 0;
+ a->bounds.width = 720;
+ a->bounds.height = priv->std & V4L2_STD_525_60 ? 480 : 576;
+ a->defrect = a->bounds;
+ a->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
+ a->pixelaspect.numerator = 1;
+ a->pixelaspect.denominator = 1;
+
+ return 0;
+}
+
+static int ml86v7667_g_mbus_config(struct v4l2_subdev *sd,
+ struct v4l2_mbus_config *cfg)
+{
+ cfg->flags = V4L2_MBUS_MASTER | V4L2_MBUS_PCLK_SAMPLE_RISING |
+ V4L2_MBUS_DATA_ACTIVE_HIGH;
+ cfg->type = V4L2_MBUS_BT656;
+
+ return 0;
+}
+
+static int ml86v7667_s_std(struct v4l2_subdev *sd, v4l2_std_id std)
+{
+ struct ml86v7667_priv *priv = to_ml86v7667(sd);
+ struct i2c_client *client = v4l2_get_subdevdata(&priv->sd);
+ int ret;
+ u8 mode;
+
+ /* PAL/NTSC ITU-R BT.601 input mode */
+ mode = std & V4L2_STD_525_60 ? MRA_NTSC_BT601 : MRA_PAL_BT601;
+ ret = ml86v7667_mask_set(client, MRA_REG, MRA_INPUT_MODE_MASK, mode);
+ if (ret < 0)
+ return ret;
+
+ priv->std = std;
+
+ return 0;
+}
+
+#ifdef CONFIG_VIDEO_ADV_DEBUG
+static int ml86v7667_g_register(struct v4l2_subdev *sd,
+ struct v4l2_dbg_register *reg)
+{
+ struct i2c_client *client = v4l2_get_subdevdata(sd);
+ int ret;
+
+ if (!v4l2_chip_match_i2c_client(client, ®->match))
+ return -EINVAL;
+ if (!capable(CAP_SYS_ADMIN))
+ return -EPERM;
+
+ ret = i2c_smbus_read_byte_data(client, (u8)reg->reg);
+ if (ret < 0)
+ return ret;
+
+ reg->val = ret;
+ reg->size = sizeof(u8);
+
+ return 0;
+}
+
+static int ml86v7667_s_register(struct v4l2_subdev *sd,
+ struct v4l2_dbg_register *reg)
+{
+ struct i2c_client *client = v4l2_get_subdevdata(sd);
+
+ if (!v4l2_chip_match_i2c_client(client, ®->match))
+ return -EINVAL;
+ if (!capable(CAP_SYS_ADMIN))
+ return -EPERM;
+
+ return i2c_smbus_write_byte_data(client, (u8)reg->reg, (u8)reg->val);
+}
+#endif
+
+static const struct v4l2_ctrl_ops ml86v7667_ctrl_ops = {
+ .s_ctrl = ml86v7667_s_ctrl,
+};
+
+static struct v4l2_subdev_video_ops ml86v7667_subdev_video_ops = {
+ .querystd = ml86v7667_querystd,
+ .g_input_status = ml86v7667_g_input_status,
+ .enum_mbus_fmt = ml86v7667_enum_mbus_fmt,
+ .try_mbus_fmt = ml86v7667_try_mbus_fmt,
+ .g_mbus_fmt = ml86v7667_g_mbus_fmt,
+ .s_mbus_fmt = ml86v7667_s_mbus_fmt,
+ .cropcap = ml86v7667_cropcap,
+ .g_mbus_config = ml86v7667_g_mbus_config,
+};
+
+static struct v4l2_subdev_core_ops ml86v7667_subdev_core_ops = {
+ .s_std = ml86v7667_s_std,
+#ifdef CONFIG_VIDEO_ADV_DEBUG
+ .g_register = ml86v7667_g_register,
+ .s_register = ml86v7667_s_register,
+#endif
+};
+
+static struct v4l2_subdev_ops ml86v7667_subdev_ops = {
+ .core = &ml86v7667_subdev_core_ops,
+ .video = &ml86v7667_subdev_video_ops,
+};
+
+static int ml86v7667_init(struct ml86v7667_priv *priv)
+{
+ struct i2c_client *client = v4l2_get_subdevdata(&priv->sd);
+ int val;
+ int ret;
+
+ /* BT.656-4 output mode, register mode */
+ ret = ml86v7667_mask_set(client, MRA_REG,
+ MRA_OUTPUT_MODE_MASK | MRA_REGISTER_MODE,
+ MRA_ITUR_BT656 | MRA_REGISTER_MODE);
+
+ /* PLL circuit fixed clock, 32MHz */
+ ret |= ml86v7667_mask_set(client, PLLR1_REG, PLLR1_FIXED_CLOCK,
+ PLLR1_FIXED_CLOCK);
+
+ /* ADC2 clamping voltage maximum */
+ ret |= ml86v7667_mask_set(client, ADC2_REG, ADC2_CLAMP_VOLTAGE_MASK,
+ ADC2_CLAMP_VOLTAGE(7));
+
+ /* enable luminance function */
+ ret |= ml86v7667_mask_set(client, SSEPL_REG, SSEPL_LUMINANCE_ONOFF,
+ SSEPL_LUMINANCE_ONOFF);
+
+ /* enable contrast function */
+ ret |= ml86v7667_mask_set(client, CLC_REG, CLC_CONTRAST_ONOFF, 0);
+
+ /*
+ * PAL/NTSC autodetection is enabled after reset,
+ * set the autodetected std in manual std mode and
+ * disable autodetection
+ */
+ val = i2c_smbus_read_byte_data(client, STATUS_REG);
+ if (val < 0)
+ return val;
+
+ priv->std = val & STATUS_NTSCPAL ? V4L2_STD_625_50 : V4L2_STD_525_60;
+ ret |= ml86v7667_mask_set(client, MRC_REG, MRC_AUTOSELECT, 0);
+
+ val = priv->std & V4L2_STD_525_60 ? MRA_NTSC_BT601 : MRA_PAL_BT601;
+ ret |= ml86v7667_mask_set(client, MRA_REG, MRA_INPUT_MODE_MASK, val);
+
+ return ret;
+}
+
+static int ml86v7667_probe(struct i2c_client *client,
+ const struct i2c_device_id *did)
+{
+ struct ml86v7667_priv *priv;
+ int ret;
+
+ if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_BYTE_DATA))
+ return -EIO;
+
+ priv = devm_kzalloc(&client->dev, sizeof(*priv), GFP_KERNEL);
+ if (!priv)
+ return -ENOMEM;
+
+ v4l2_i2c_subdev_init(&priv->sd, client, &ml86v7667_subdev_ops);
+
+ v4l2_ctrl_handler_init(&priv->hdl, 8);
+ v4l2_ctrl_new_std(&priv->hdl, &ml86v7667_ctrl_ops,
+ V4L2_CID_BRIGHTNESS, -64, 63, 1, 0);
+ v4l2_ctrl_new_std(&priv->hdl, &ml86v7667_ctrl_ops,
+ V4L2_CID_CONTRAST, -8, 7, 1, 0);
+ v4l2_ctrl_new_std(&priv->hdl, &ml86v7667_ctrl_ops,
+ V4L2_CID_CHROMA_GAIN, -32, 31, 1, 0);
+ v4l2_ctrl_new_std(&priv->hdl, &ml86v7667_ctrl_ops,
+ V4L2_CID_HUE, -128, 127, 1, 0);
+ v4l2_ctrl_new_std(&priv->hdl, &ml86v7667_ctrl_ops,
+ V4L2_CID_RED_BALANCE, -4, 3, 1, 0);
+ v4l2_ctrl_new_std(&priv->hdl, &ml86v7667_ctrl_ops,
+ V4L2_CID_BLUE_BALANCE, -4, 3, 1, 0);
+ v4l2_ctrl_new_std(&priv->hdl, &ml86v7667_ctrl_ops,
+ V4L2_CID_SHARPNESS, 0, 1, 1, 0);
+ v4l2_ctrl_new_std(&priv->hdl, &ml86v7667_ctrl_ops,
+ V4L2_CID_COLOR_KILLER, 0, 1, 1, 0);
+ priv->sd.ctrl_handler = &priv->hdl;
+
+ ret = priv->hdl.error;
+ if (ret)
+ goto cleanup;
+
+ v4l2_ctrl_handler_setup(&priv->hdl);
+
+ ret = ml86v7667_init(priv);
+ if (ret)
+ goto cleanup;
+
+ v4l_info(client, "chip found @ 0x%02x (%s)\n",
+ client->addr, client->adapter->name);
+ return 0;
+
+cleanup:
+ v4l2_ctrl_handler_free(&priv->hdl);
+ v4l2_device_unregister_subdev(&priv->sd);
+ v4l_err(client, "failed to probe @ 0x%02x (%s)\n",
+ client->addr, client->adapter->name);
+ return ret;
+}
+
+static int ml86v7667_remove(struct i2c_client *client)
+{
+ struct v4l2_subdev *sd = i2c_get_clientdata(client);
+ struct ml86v7667_priv *priv = to_ml86v7667(sd);
+
+ v4l2_ctrl_handler_free(&priv->hdl);
+ v4l2_device_unregister_subdev(&priv->sd);
+
+ return 0;
+}
+
+static const struct i2c_device_id ml86v7667_id[] = {
+ {DRV_NAME, 0},
+ {},
+};
+MODULE_DEVICE_TABLE(i2c, ml86v7667_id);
+
+static struct i2c_driver ml86v7667_i2c_driver = {
+ .driver = {
+ .name = DRV_NAME,
+ .owner = THIS_MODULE,
+ },
+ .probe = ml86v7667_probe,
+ .remove = ml86v7667_remove,
+ .id_table = ml86v7667_id,
+};
+
+module_i2c_driver(ml86v7667_i2c_driver);
+
+MODULE_DESCRIPTION("OKI Semiconductor ML86V7667 video decoder driver");
+MODULE_AUTHOR("Vladimir Barinov");
+MODULE_LICENSE("GPL");
^ permalink raw reply [flat|nested] 9+ messages in thread* [PATCH v3 3/5] ARM: shmobile: r8a7778: add VIN support
2013-04-23 17:18 [PATCH v3 0/5] OKI ML86V7667 driver and R8A7778/BOCK-W VIN support Sergei Shtylyov
2013-04-23 17:21 ` [PATCH v3 1/5] V4L2: I2C: ML86V7667 video decoder driver Sergei Shtylyov
@ 2013-04-23 17:29 ` Sergei Shtylyov
2013-04-23 17:32 ` [PATCH v3 4/5] ARM: shmobile: BOCK-W: add VIN and ML86V7667 support Sergei Shtylyov
2013-04-23 17:34 ` [PATCH v3 5/5] ARM: shmobile: BOCK-W: enable VIN and ML86V7667 in defconfig Sergei Shtylyov
3 siblings, 0 replies; 9+ messages in thread
From: Sergei Shtylyov @ 2013-04-23 17:29 UTC (permalink / raw)
To: linux-arm-kernel
From: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Add VIN clocks and platform devices on R8A7778 SoC; add function to register
the VIN platform devices.
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
[Sergei: added 'id' parameter check to r8a7779_add_vin_device(), used '*pdata'
in *sizeof* operator there, renamed some variables, annotated 'vin[01]_info' and
vin[01]_resources[] as '__initdata'.]
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
---
Changes from version 2:
- annotated 'vin[01]_info' and vin[01]_resources[] as '__initdata' since they're
kmemdup()'ed while registering the platform devices anyway;
- refreshed the patch.
arch/arm/mach-shmobile/clock-r8a7778.c | 5 +++
arch/arm/mach-shmobile/include/mach/r8a7778.h | 3 ++
arch/arm/mach-shmobile/setup-r8a7778.c | 33 ++++++++++++++++++++++++++
3 files changed, 41 insertions(+)
Index: renesas/arch/arm/mach-shmobile/clock-r8a7778.c
===================================================================
--- renesas.orig/arch/arm/mach-shmobile/clock-r8a7778.c
+++ renesas/arch/arm/mach-shmobile/clock-r8a7778.c
@@ -106,6 +106,7 @@ static struct clk *main_clks[] = {
enum {
MSTP323, MSTP322, MSTP321,
MSTP114,
+ MSTP110, MSTP109,
MSTP100,
MSTP030, MSTP029,
MSTP028, MSTP027, MSTP026, MSTP025, MSTP024, MSTP023, MSTP022, MSTP021,
@@ -117,6 +118,8 @@ static struct clk mstp_clks[MSTP_NR] = {
[MSTP322] = SH_CLK_MSTP32(&p_clk, MSTPCR3, 22, 0), /* SDHI1 */
[MSTP321] = SH_CLK_MSTP32(&p_clk, MSTPCR3, 21, 0), /* SDHI2 */
[MSTP114] = SH_CLK_MSTP32(&p_clk, MSTPCR1, 14, 0), /* Ether */
+ [MSTP110] = SH_CLK_MSTP32(&s_clk, MSTPCR1, 10, 0), /* VIN0 */
+ [MSTP109] = SH_CLK_MSTP32(&s_clk, MSTPCR1, 9, 0), /* VIN1 */
[MSTP100] = SH_CLK_MSTP32(&p_clk, MSTPCR1, 0, 0), /* USB0/1 */
[MSTP030] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 30, 0), /* I2C0 */
[MSTP029] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 29, 0), /* I2C1 */
@@ -140,6 +143,8 @@ static struct clk_lookup lookups[] = {
CLKDEV_DEV_ID("sh_mobile_sdhi.1", &mstp_clks[MSTP322]), /* SDHI1 */
CLKDEV_DEV_ID("sh_mobile_sdhi.2", &mstp_clks[MSTP321]), /* SDHI2 */
CLKDEV_DEV_ID("sh-eth", &mstp_clks[MSTP114]), /* Ether */
+ CLKDEV_DEV_ID("rcar_vin.0", &mstp_clks[MSTP110]), /* VIN0 */
+ CLKDEV_DEV_ID("rcar_vin.1", &mstp_clks[MSTP109]), /* VIN1 */
CLKDEV_DEV_ID("ehci-platform", &mstp_clks[MSTP100]), /* USB EHCI port0/1 */
CLKDEV_DEV_ID("ohci-platform", &mstp_clks[MSTP100]), /* USB OHCI port0/1 */
CLKDEV_DEV_ID("i2c-rcar.0", &mstp_clks[MSTP030]), /* I2C0 */
Index: renesas/arch/arm/mach-shmobile/include/mach/r8a7778.h
===================================================================
--- renesas.orig/arch/arm/mach-shmobile/include/mach/r8a7778.h
+++ renesas/arch/arm/mach-shmobile/include/mach/r8a7778.h
@@ -21,11 +21,14 @@
#include <linux/mmc/sh_mobile_sdhi.h>
#include <linux/sh_eth.h>
#include <linux/usb/rcar-phy.h>
+#include <linux/platform_data/camera-rcar.h>
extern void r8a7778_add_standard_devices(void);
extern void r8a7778_add_standard_devices_dt(void);
extern void r8a7778_add_ether_device(struct sh_eth_plat_data *pdata);
extern void r8a7778_add_usb_phy_device(struct rcar_phy_platform_data *pdata);
+extern void r8a7778_add_vin_device(int id,
+ struct rcar_vin_platform_data *pdata);
extern void r8a7778_init_late(void);
extern void r8a7778_init_delay(void);
extern void r8a7778_init_irq(void);
Index: renesas/arch/arm/mach-shmobile/setup-r8a7778.c
===================================================================
--- renesas.orig/arch/arm/mach-shmobile/setup-r8a7778.c
+++ renesas/arch/arm/mach-shmobile/setup-r8a7778.c
@@ -299,6 +299,39 @@ void __init r8a7778_sdhi_init(int id,
info, sizeof(*info));
}
+/* VIN */
+#define R8A7778_VIN(idx) \
+static struct resource vin##idx##_resources[] __initdata = { \
+ DEFINE_RES_MEM(0xffc50000 + 0x1000 * (idx), 0x1000), \
+ DEFINE_RES_IRQ(gic_iid(0x5a)), \
+}; \
+ \
+static struct platform_device_info vin##idx##_info __initdata = { \
+ .parent = &platform_bus, \
+ .name = "rcar_vin", \
+ .id = idx, \
+ .res = vin##idx##_resources, \
+ .num_res = ARRAY_SIZE(vin##idx##_resources), \
+ .dma_mask = DMA_BIT_MASK(32), \
+}
+
+R8A7778_VIN(0);
+R8A7778_VIN(1);
+
+static struct platform_device_info *vin_info_table[] __initdata = {
+ &vin0_info,
+ &vin1_info,
+};
+
+void __init r8a7778_add_vin_device(int id, struct rcar_vin_platform_data *pdata)
+{
+ BUG_ON(id < 0 || id > 1);
+
+ vin_info_table[id]->data = pdata;
+ vin_info_table[id]->size_data = sizeof(*pdata);
+ platform_device_register_full(vin_info_table[id]);
+}
+
void __init r8a7778_add_standard_devices(void)
{
int i;
^ permalink raw reply [flat|nested] 9+ messages in thread* [PATCH v3 4/5] ARM: shmobile: BOCK-W: add VIN and ML86V7667 support
2013-04-23 17:18 [PATCH v3 0/5] OKI ML86V7667 driver and R8A7778/BOCK-W VIN support Sergei Shtylyov
2013-04-23 17:21 ` [PATCH v3 1/5] V4L2: I2C: ML86V7667 video decoder driver Sergei Shtylyov
2013-04-23 17:29 ` [PATCH v3 3/5] ARM: shmobile: r8a7778: add VIN support Sergei Shtylyov
@ 2013-04-23 17:32 ` Sergei Shtylyov
2013-04-26 23:00 ` Sergei Shtylyov
2013-04-23 17:34 ` [PATCH v3 5/5] ARM: shmobile: BOCK-W: enable VIN and ML86V7667 in defconfig Sergei Shtylyov
3 siblings, 1 reply; 9+ messages in thread
From: Sergei Shtylyov @ 2013-04-23 17:32 UTC (permalink / raw)
To: linux-arm-kernel
From: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Add ML86V7667 platform devices on BOCK-W board, configure VIN0/1 pins, and
register VIN0/1 devices with the ML86V7667 specific platform data.
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
[Sergei: some macro/comment cleanup; updated the copyrights, removed duplicate
#include, annotated all platform data as '__initdata'.]
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
---
Changes since version 2:
- removed duplicate #include <linux/pinctrl/machine.h>;
- annotated all platform data as '__initdata' since they're kmemdup()'ed while
registering the platform devices anyway;
- resolved rejects, refreshed the patch.
arch/arm/mach-shmobile/board-bockw.c | 39 +++++++++++++++++++++++++++++++++++
1 file changed, 39 insertions(+)
Index: renesas/arch/arm/mach-shmobile/board-bockw.c
===================================================================
--- renesas.orig/arch/arm/mach-shmobile/board-bockw.c
+++ renesas/arch/arm/mach-shmobile/board-bockw.c
@@ -3,6 +3,7 @@
*
* Copyright (C) 2013 Renesas Solutions Corp.
* Copyright (C) 2013 Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+ * Copyright (C) 2013 Cogent Embedded, Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -25,6 +26,7 @@
#include <linux/regulator/fixed.h>
#include <linux/regulator/machine.h>
#include <linux/smsc911x.h>
+#include <media/soc_camera.h>
#include <mach/common.h>
#include <mach/irqs.h>
#include <mach/r8a7778.h>
@@ -65,6 +67,25 @@ static struct sh_mobile_sdhi_info sdhi0_
static struct rcar_phy_platform_data usb_phy_platform_data __initdata;
+static struct rcar_vin_platform_data vin_platform_data __initdata = {
+ .flags = RCAR_VIN_BT656,
+};
+
+/* In the default configuration both decoders reside on I2C bus 0 */
+#define BOCKW_CAMERA(idx) \
+static struct i2c_board_info camera##idx##_info = { \
+ I2C_BOARD_INFO("ml86v7667", 0x41 + 2 * (idx)), \
+}; \
+ \
+static struct soc_camera_link iclink##idx##_ml86v7667 __initdata = { \
+ .bus_id = idx, \
+ .i2c_adapter_id = 0, \
+ .board_info = &camera##idx##_info, \
+};
+
+BOCKW_CAMERA(0);
+BOCKW_CAMERA(1);
+
static const struct pinctrl_map bockw_pinctrl_map[] = {
/* SCIF0 */
PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.0", "pfc-r8a7778",
@@ -80,6 +101,16 @@ static const struct pinctrl_map bockw_pi
"sdhi0_data4", "sdhi0"),
PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-r8a7778",
"sdhi0_wp", "sdhi0"),
+ /* VIN0 */
+ PIN_MAP_MUX_GROUP_DEFAULT("rcar_vin.0", "pfc-r8a7778",
+ "vin0_clk", "vin0"),
+ PIN_MAP_MUX_GROUP_DEFAULT("rcar_vin.0", "pfc-r8a7778",
+ "vin0_data8", "vin0"),
+ /* VIN1 */
+ PIN_MAP_MUX_GROUP_DEFAULT("rcar_vin.1", "pfc-r8a7778",
+ "vin1_clk", "vin1"),
+ PIN_MAP_MUX_GROUP_DEFAULT("rcar_vin.1", "pfc-r8a7778",
+ "vin1_data8", "vin1"),
};
#define FPGA 0x18200000
@@ -94,6 +125,14 @@ static void __init bockw_init(void)
r8a7778_init_irq_extpin(1);
r8a7778_add_standard_devices();
r8a7778_add_usb_phy_device(&usb_phy_platform_data);
+ r8a7778_add_vin_device(0, &vin_platform_data);
+ r8a7778_add_vin_device(1, &vin_platform_data);
+ platform_device_register_data(&platform_bus, "soc-camera-pdrv", 0,
+ &iclink0_ml86v7667,
+ sizeof(iclink0_ml86v7667));
+ platform_device_register_data(&platform_bus, "soc-camera-pdrv", 1,
+ &iclink1_ml86v7667,
+ sizeof(iclink1_ml86v7667));
pinctrl_register_mappings(bockw_pinctrl_map,
ARRAY_SIZE(bockw_pinctrl_map));
^ permalink raw reply [flat|nested] 9+ messages in thread