From mboxrd@z Thu Jan  1 00:00:00 1970
From: tony@atomide.com (Tony Lindgren)
Date: Wed, 1 May 2013 16:26:49 -0700
Subject: [RFC 1/2] ARM: OMAP2+: AM33XX: I2C Sleep/wake sequence support
In-Reply-To: <1367434947-6442-2-git-send-email-Russ.Dill@ti.com>
References: <1367434947-6442-1-git-send-email-Russ.Dill@ti.com>
 <1367434947-6442-2-git-send-email-Russ.Dill@ti.com>
Message-ID: <20130501232649.GN28721@atomide.com>
To: linux-arm-kernel@lists.infradead.org
List-Id: linux-arm-kernel.lists.infradead.org

* Russ Dill <Russ.Dill@ti.com> [130501 12:07]:
> This patch adds the ability to write an I2C sleep sequence from
> SRAM just before WFI, and a wake sequence just after control is passed
> from the M3. This is useful for adjusting voltages during sleep that cannot
> be lowered while SDRAM is active.
> 
> Each sequence is a series of I2C transfers in the form:
> 
> u8 length | u8 chip address | u8 byte0/reg address | u8 byte 1 | u8 byte n ...
> 
> The length indicates the number of bytes to transfer, including the register
> address. The length of the sequence is limited by the amount of space
> reserved in SRAM, 127 bytes.
> 
> The sequences are taken from the i2c1 node in the device tree. The property
> name for the sleep sequence is "sleep_sequence" and the property name for
> the wake sequence is "wake_sequence". Each property should be an array of
> bytes.
> 
> No actions are performed if the properties are not present in the device
> tree.

Looks like you should make that into just a regular device driver that lives
under drivers/ somewhere?

Regards,

Tony