From: thierry.reding@avionic-design.de (Thierry Reding)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH] ARM: tegra: disable LP2 cpuidle state if PCIe is enabled
Date: Tue, 7 May 2013 15:08:50 +0200 [thread overview]
Message-ID: <20130507130850.GA11202@avionic-0098.adnet.avionic-design.de> (raw)
In-Reply-To: <20130507124849.GM7949@tbergstrom-lnx.Nvidia.com>
On Tue, May 07, 2013 at 03:48:49PM +0300, Peter De Schrijver wrote:
> On Mon, May 06, 2013 at 10:39:04PM +0200, Stephen Warren wrote:
> > From: Stephen Warren <swarren@nvidia.com>
> >
> > Tegra20 HW appears to have a bug such that PCIe device interrupts, whether
> > they are legacy IRQs or MSI, are lost when LP2 is enabled. To work around
> > this, simply disable LP2 if the PCI driver and DT node are both enabled.
> >
>
> Wouldn't it make more sense to disable LP2 when we actually detect a PCIe
> device?
I'm not sure a patch to do so would be as simple as this one. For one,
the cpuidle framework will already have been initialized when PCIe
enumeration completes. So some way of permanently disabling one state at
runtime would be required and I don't think cpuidle provides an API to
do so. I know the latter isn't really a good reason, but I don't think
adding that kind of API just because Tegra20 seems to have a bug would
be appropriate.
Furthermore, it is quite likely that the PCIe controller will only be
enabled in DT for devices that actually have a PCIe device hooked up.
Thierry
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next prev parent reply other threads:[~2013-05-07 13:08 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-05-06 20:39 [PATCH] ARM: tegra: disable LP2 cpuidle state if PCIe is enabled Stephen Warren
2013-05-06 20:44 ` Thierry Reding
2013-05-07 12:48 ` Peter De Schrijver
2013-05-07 13:08 ` Thierry Reding [this message]
2013-05-07 14:54 ` Stephen Warren
2013-05-08 9:40 ` Peter De Schrijver
2013-05-08 10:56 ` Thierry Reding
2013-05-08 18:41 ` Stephen Warren
2013-05-08 10:53 ` Daniel Lezcano
2013-05-08 18:44 ` Stephen Warren
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