* [RFC PATCH 0/3] ARM: omap3: add Seagate Wireless Plus board
@ 2013-05-08 19:23 Jason Cooper
2013-05-08 19:23 ` [RFC PATCH 1/3] ARM: omap3: " Jason Cooper
` (4 more replies)
0 siblings, 5 replies; 11+ messages in thread
From: Jason Cooper @ 2013-05-08 19:23 UTC (permalink / raw)
To: linux-arm-kernel
All,
This is a work in progress. All mistakes are mine. Seriously. I've never
touched omap before. It should be obvious.
History:
The Wireless Plus is a portable, 1TB HD with an ~ 4 hour battery, and a wifi
hotspot. It's only external connection is the SATA port (GoFlex connector).
The Wireless Plus is the successor to the GoFlex Wireless. Full source can be
found here [1] (GoFlex Wireless). These appear to be exactly the same at the
hardware level. The primary difference is drive capacity, and the Wireless
Plus exposes uart1 to an unpopulated header in the corner of the board, so I
chose to develop on it. :-)
Technical:
Both boards are using an AM3703 SoC and the tps6507x power regulator/battery
charger. Both are using the Hynix h8kds0un0mer-4em RAM module.
Status:
The following patches are a work-in-progress and are based against v3.9. It
basically boots (to rootfs panic) with patches 1 and 2. The gpmc patch oops
out. I've included it in the hopes that someone can laugh at me and maybe give
me a pointer. I need it to work in order to add the child node for the nand,
and then the child nodes for the partitions.
Tony has been helping me out offline with this, and he suggested trying the
gpmc against Linus' ToT. Which locks up before it even has a chance to get
going. So this series is against v3.9.
The current state of the dts file has been to silence warnings/errors. I
disabled a bunch of unused devices, and added the pinctrl nodes in order to
remove the pins not found kind of errors. As for their correctness, I haven't
been able to test yet.
I've done a liberal amount of copying from the provided sources for u-boot and
the kernel. If you're motivated, grepping those sources for 'satellite|vavni'
locates most of the changes made by Seagate.
Current Problem:
There are several gaps in my understanding of how far along TI's conversion to
DT is. Should I be doing a separate board file for initializing the legacy
items? I was hoping to do it all with DT.
Obviously, I don't expect anybody to run out and buy one of these, take it
apart, and try to boot this code. But if the omap guys could take a look at
this and give me a few pointers, I'd appreciate it. I'm kind of spinning my
wheels at the moment.
Primarily, I'd like to get nand and usb working, so that I can read/write,
mount a rootfs and do better testing.
thx,
Jason.
[1] http://www.seagate.com/support/downloads/item/satellite-gpl-fw-master-dl/
Jason Cooper (3):
ARM: omap3: Seagate Wireless Plus board
ARM: omap3: Seagate Wireless Plus DT entry
ARM: omap3: wireless plus gpmc wip
arch/arm/boot/dts/Makefile | 1 +
arch/arm/boot/dts/omap3-wireless_plus.dts | 331 +++++++++++++++++++++
arch/arm/mach-omap2/board-generic.c | 26 ++
arch/arm/mach-omap2/sdram-hynix-h8kds0un0mer-4em.h | 30 ++
4 files changed, 388 insertions(+)
create mode 100644 arch/arm/boot/dts/omap3-wireless_plus.dts
create mode 100644 arch/arm/mach-omap2/sdram-hynix-h8kds0un0mer-4em.h
--
1.8.2.1
^ permalink raw reply [flat|nested] 11+ messages in thread
* [RFC PATCH 1/3] ARM: omap3: Seagate Wireless Plus board
2013-05-08 19:23 [RFC PATCH 0/3] ARM: omap3: add Seagate Wireless Plus board Jason Cooper
@ 2013-05-08 19:23 ` Jason Cooper
2013-05-08 19:23 ` [RFC PATCH 2/3] ARM: omap3: Seagate Wireless Plus DT entry Jason Cooper
` (3 subsequent siblings)
4 siblings, 0 replies; 11+ messages in thread
From: Jason Cooper @ 2013-05-08 19:23 UTC (permalink / raw)
To: linux-arm-kernel
Hynix include file copied from vendor supplied source code.
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
---
arch/arm/mach-omap2/board-generic.c | 26 +++++++++++++++++++
arch/arm/mach-omap2/sdram-hynix-h8kds0un0mer-4em.h | 30 ++++++++++++++++++++++
2 files changed, 56 insertions(+)
create mode 100644 arch/arm/mach-omap2/sdram-hynix-h8kds0un0mer-4em.h
diff --git a/arch/arm/mach-omap2/board-generic.c b/arch/arm/mach-omap2/board-generic.c
index e54a480..10b567c 100644
--- a/arch/arm/mach-omap2/board-generic.c
+++ b/arch/arm/mach-omap2/board-generic.c
@@ -21,6 +21,7 @@
#include "common.h"
#include "common-board-devices.h"
#include "dss-common.h"
+#include "sdram-hynix-h8kds0un0mer-4em.h"
#if !(defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3))
#define intc_of_init NULL
@@ -51,6 +52,13 @@ static void __init omap_generic_init(void)
omap_4430sdp_display_init_of();
}
+static void __init seagate_wireless_plus_init(void)
+{
+ omap_sdrc_init(h8kds0un0mer4em_sdrc_params, NULL);
+
+ of_platform_populate(NULL, omap_dt_match_table, NULL, NULL);
+}
+
#ifdef CONFIG_SOC_OMAP2420
static const char *omap242x_boards_compat[] __initdata = {
"ti,omap2420",
@@ -90,6 +98,24 @@ MACHINE_END
#endif
#ifdef CONFIG_ARCH_OMAP3
+static const char *seagate_wireless_plus_compat[] __initdata = {
+ "seagate,wireless-plus",
+ NULL,
+};
+
+DT_MACHINE_START(SEAGATE_WIRELESS_PLUS_DT, "Seagate Wireless Plus (Flattened Device Tree)")
+ .reserve = omap_reserve,
+ .map_io = omap3_map_io,
+ .init_early = omap3430_init_early,
+ .init_irq = omap_intc_of_init,
+ .handle_irq = omap3_intc_handle_irq,
+ .init_machine = seagate_wireless_plus_init,
+ .init_late = omap3_init_late,
+ .init_time = omap3_sync32k_timer_init,
+ .dt_compat = seagate_wireless_plus_compat,
+ .restart = omap3xxx_restart,
+MACHINE_END
+
static const char *omap3_boards_compat[] __initdata = {
"ti,omap3",
NULL,
diff --git a/arch/arm/mach-omap2/sdram-hynix-h8kds0un0mer-4em.h b/arch/arm/mach-omap2/sdram-hynix-h8kds0un0mer-4em.h
new file mode 100644
index 0000000..82b58131
--- /dev/null
+++ b/arch/arm/mach-omap2/sdram-hynix-h8kds0un0mer-4em.h
@@ -0,0 +1,30 @@
+/*
+ * SDRC register values for the Hynix H8KDS0UN0MER-4EM
+ *
+ * Copyright (C) 2010 Texas Instruments, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef __ARCH_ARM_MACH_OMAP2_SDRAM_HYNIX_H8KDS0UN0MER4EM
+#define __ARCH_ARM_MACH_OMAP2_SDRAM_HYNIX_H8KDS0UN0MER4EM
+
+#include "sdrc.h"
+
+/* Hynix H8KDS0UN0MER-4EM */
+static struct omap_sdrc_params h8kds0un0mer4em_sdrc_params[] = {
+ [0] = {
+ .rate = 200000000,
+ .actim_ctrla = 0x92e1c4c6,
+ .actim_ctrlb = 0x0002111c,
+ .rfr_ctrl = 0x0004dc01,
+ .mr = 0x00000032,
+ },
+ [1] = {
+ .rate = 0
+ },
+};
+
+#endif
--
1.8.2.1
^ permalink raw reply related [flat|nested] 11+ messages in thread
* [RFC PATCH 2/3] ARM: omap3: Seagate Wireless Plus DT entry
2013-05-08 19:23 [RFC PATCH 0/3] ARM: omap3: add Seagate Wireless Plus board Jason Cooper
2013-05-08 19:23 ` [RFC PATCH 1/3] ARM: omap3: " Jason Cooper
@ 2013-05-08 19:23 ` Jason Cooper
2013-05-08 19:23 ` [RFC PATCH 3/3] ARM: omap3: wireless plus gpmc wip Jason Cooper
` (2 subsequent siblings)
4 siblings, 0 replies; 11+ messages in thread
From: Jason Cooper @ 2013-05-08 19:23 UTC (permalink / raw)
To: linux-arm-kernel
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
---
NOTE: please see coverletter for details.
arch/arm/boot/dts/Makefile | 1 +
arch/arm/boot/dts/omap3-wireless_plus.dts | 314 ++++++++++++++++++++++++++++++
2 files changed, 315 insertions(+)
create mode 100644 arch/arm/boot/dts/omap3-wireless_plus.dts
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 9c62558..a022a42 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -119,6 +119,7 @@ dtb-$(CONFIG_ARCH_OMAP2PLUS) += omap2420-h4.dtb \
omap3-beagle-xm.dtb \
omap3-evm.dtb \
omap3-tobi.dtb \
+ omap3-wireless_plus.dtb \
omap4-panda.dtb \
omap4-panda-a4.dtb \
omap4-panda-es.dtb \
diff --git a/arch/arm/boot/dts/omap3-wireless_plus.dts b/arch/arm/boot/dts/omap3-wireless_plus.dts
new file mode 100644
index 0000000..8a0acdf
--- /dev/null
+++ b/arch/arm/boot/dts/omap3-wireless_plus.dts
@@ -0,0 +1,314 @@
+/*
+ * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+/dts-v1/;
+
+/include/ "omap3.dtsi"
+
+/ {
+ model = "Seagate Wireless Plus (AM3703)";
+ compatible = "seagate,wireless-plus", "ti,omap3";
+
+ memory {
+ device_type = "memory";
+ reg = <0x80000000 0x10000000>; /* 256 MB */
+ };
+};
+
+&omap3_pmx_core {
+
+ /*
+ * map all board specific static pins enabled by the pinctrl driver
+ * itself during the boot (or just set them up in the bootloader)
+ */
+ pinctrl-names = "default";
+ pinctrl-0 = <&sdrc_pins &gpmc_pins &hsusb1_pins>;
+
+ /* AM3703CUS pins for this board */
+ sdrc_pins: pinmux_sdrc_pins {
+ pinctrl-single,pins = <
+ 0x0000 0x100 /* SDRC_D0 (IEN | PTD | DIS | M0) */
+ 0x0002 0x100 /* SDRC_D1 (IEN | PTD | DIS | M0) */
+ 0x0004 0x100 /* SDRC_D2 (IEN | PTD | DIS | M0) */
+ 0x0006 0x100 /* SDRC_D3 (IEN | PTD | DIS | M0) */
+ 0x0008 0x100 /* SDRC_D4 (IEN | PTD | DIS | M0) */
+ 0x000A 0x100 /* SDRC_D5 (IEN | PTD | DIS | M0) */
+ 0x000C 0x100 /* SDRC_D6 (IEN | PTD | DIS | M0) */
+ 0x000E 0x100 /* SDRC_D7 (IEN | PTD | DIS | M0) */
+ 0x0010 0x100 /* SDRC_D8 (IEN | PTD | DIS | M0) */
+ 0x0012 0x100 /* SDRC_D9 (IEN | PTD | DIS | M0) */
+ 0x0014 0x100 /* SDRC_D10 (IEN | PTD | DIS | M0) */
+ 0x0016 0x100 /* SDRC_D11 (IEN | PTD | DIS | M0) */
+ 0x0018 0x100 /* SDRC_D12 (IEN | PTD | DIS | M0) */
+ 0x001A 0x100 /* SDRC_D13 (IEN | PTD | DIS | M0) */
+ 0x001C 0x100 /* SDRC_D14 (IEN | PTD | DIS | M0) */
+ 0x001E 0x100 /* SDRC_D15 (IEN | PTD | DIS | M0) */
+ 0x0020 0x100 /* SDRC_D16 (IEN | PTD | DIS | M0) */
+ 0x0022 0x100 /* SDRC_D17 (IEN | PTD | DIS | M0) */
+ 0x0024 0x100 /* SDRC_D18 (IEN | PTD | DIS | M0) */
+ 0x0026 0x100 /* SDRC_D19 (IEN | PTD | DIS | M0) */
+ 0x0028 0x100 /* SDRC_D20 (IEN | PTD | DIS | M0) */
+ 0x002A 0x100 /* SDRC_D21 (IEN | PTD | DIS | M0) */
+ 0x002C 0x100 /* SDRC_D22 (IEN | PTD | DIS | M0) */
+ 0x002E 0x100 /* SDRC_D23 (IEN | PTD | DIS | M0) */
+ 0x0030 0x100 /* SDRC_D24 (IEN | PTD | DIS | M0) */
+ 0x0032 0x100 /* SDRC_D25 (IEN | PTD | DIS | M0) */
+ 0x0034 0x100 /* SDRC_D26 (IEN | PTD | DIS | M0) */
+ 0x0036 0x100 /* SDRC_D27 (IEN | PTD | DIS | M0) */
+ 0x0038 0x100 /* SDRC_D28 (IEN | PTD | DIS | M0) */
+ 0x003A 0x100 /* SDRC_D29 (IEN | PTD | DIS | M0) */
+ 0x003C 0x100 /* SDRC_D30 (IEN | PTD | DIS | M0) */
+ 0x003E 0x100 /* SDRC_D31 (IEN | PTD | DIS | M0) */
+ 0x0040 0x100 /* SDRC_CLK (IEN | PTD | DIS | M0) */
+ 0x0042 0x100 /* SDRC_DQS0 (IEN | PTD | DIS | M0) */
+ 0x0044 0x100 /* SDRC_DQS1 (IEN | PTD | DIS | M0) */
+ 0x0046 0x100 /* SDRC_DQS2 (IEN | PTD | DIS | M0) */
+ 0x0048 0x100 /* SDRC_DQS3 (IEN | PTD | DIS | M0) */
+ >;
+ };
+
+ gpmc_pins: pinmux_gpmc_pins {
+ pinctrl-single,pins = <
+ 0x004A 0x018 /* GPMC_A1 (IDIS | PTU | EN | M0) */
+ 0x004C 0x018 /* GPMC_A2 (IDIS | PTU | EN | M0) */
+ 0x004E 0x018 /* GPMC_A3 (IDIS | PTU | EN | M0) */
+ 0x0050 0x018 /* GPMC_A4 (IDIS | PTU | EN | M0) */
+ 0x0052 0x018 /* GPMC_A5 (IDIS | PTU | EN | M0) */
+ 0x0054 0x018 /* GPMC_A6 (IDIS | PTU | EN | M0) */
+ 0x0056 0x018 /* GPMC_A7 (IDIS | PTU | EN | M0) */
+ 0x0058 0x018 /* GPMC_A8 (IDIS | PTU | EN | M0) */
+ 0x005A 0x018 /* GPMC_A9 (IDIS | PTU | EN | M0) */
+ 0x005C 0x018 /* GPMC_A10 (IDIS | PTU | EN | M0) */
+ 0x005E 0x118 /* GPMC_D0 (IEN | PTU | EN | M0) */
+ 0x0060 0x118 /* GPMC_D1 (IEN | PTU | EN | M0) */
+ 0x0062 0x118 /* GPMC_D2 (IEN | PTU | EN | M0) */
+ 0x0064 0x118 /* GPMC_D3 (IEN | PTU | EN | M0) */
+ 0x0066 0x118 /* GPMC_D4 (IEN | PTU | EN | M0) */
+ 0x0068 0x118 /* GPMC_D5 (IEN | PTU | EN | M0) */
+ 0x006A 0x118 /* GPMC_D6 (IEN | PTU | EN | M0) */
+ 0x006C 0x118 /* GPMC_D7 (IEN | PTU | EN | M0) */
+ 0x006E 0x118 /* GPMC_D8 (IEN | PTU | EN | M0) */
+ 0x0070 0x118 /* GPMC_D9 (IEN | PTU | EN | M0) */
+ 0x0072 0x118 /* GPMC_D1 (IEN | PTU | EN | M0) */
+ 0x0074 0x118 /* GPMC_D11 (IEN | PTU | EN | M0) */
+ 0x0076 0x118 /* GPMC_D12 (IEN | PTU | EN | M0) */
+ 0x0078 0x118 /* GPMC_D13 (IEN | PTU | EN | M0) */
+ 0x007A 0x118 /* GPMC_D14 (IEN | PTU | EN | M0) */
+ 0x007C 0x118 /* GPMC_D15 (IEN | PTU | EN | M0) */
+ 0x007E 0x018 /* GPMC_NCS0 (IDIS | PTU | EN | M0) */
+ 0x0080 0x018 /* GPMC_NCS1 (IDIS | PTU | EN | M0) */
+ 0x0082 0x018 /* GPMC_NCS2 (IDIS | PTU | EN | M0) */
+ 0x0084 0x018 /* GPMC_NCS3 (IDIS | PTU | EN | M0) */
+ 0x0086 0x118 /* GPMC_NCS4 (IEN | PTU | EN | M0) */
+ 0x0088 0x018 /* GPMC_NCS5 (IDIS | PTU | EN | M0) */
+ 0x008A 0x100 /* GPMC_NCS6 (IEN | PTD | DIS | M0) */
+ 0x008C 0x118 /* GPMC_NCS7 (IEN | PTU | EN | M0) */
+ 0x008E 0x018 /* GPMC_CLK (IDIS | PTU | EN | M0) */
+ 0x0090 0x000 /* GPMC_NADV_ALE (IDIS | PTD | DIS | M0) */
+ 0x0092 0x000 /* GPMC_NOE (IDIS | PTD | DIS | M0) */
+ 0x0094 0x000 /* GPMC_NWE (IDIS | PTD | DIS | M0) */
+ 0x0096 0x018 /* GPMC_NBE0_CLE (IDIS | PTU | EN | M0) */
+ 0x0098 0x118 /* GPMC_NBE1 (IEN | PTU | EN | M0) */
+ 0x009A 0x100 /* GPMC_NWP (IEN | PTD | DIS | M0) */
+ 0x009C 0x118 /* GPMC_WAIT0 (IEN | PTU | EN | M0) */
+ 0x009E 0x118 /* GPMC_WAIT1 (IEN | PTU | EN | M0) */
+ 0x00A0 0x11C /* GPIO_64 (IEN | PTU | EN | M4) */
+ 0x00A2 0x118 /* GPMC_WAIT3 (IEN | PTU | EN | M0) */
+ >;
+ };
+
+ mmc1_pins: pinmux_mmc1_pins {
+ pincntl-single,pins = <
+ 0x0114 0x018 /* MMC1_CLK (IDIS | PTU | EN | M0) */
+ 0x0116 0x118 /* MMC1_CMD (IEN | PTU | EN | M0) */
+ 0x0118 0x118 /* MMC1_DAT0 (IEN | PTU | EN | M0) */
+ 0x011A 0x118 /* MMC1_DAT1 (IEN | PTU | EN | M0) */
+ 0x011C 0x118 /* MMC1_DAT2 (IEN | PTU | EN | M0) */
+ 0x011E 0x118 /* MMC1_DAT3 (IEN | PTU | EN | M0) */
+ 0x0120 0x118 /* MMC1_DAT4 (IEN | PTU | EN | M0) */
+ 0x0122 0x118 /* MMC1_DAT5 (IEN | PTU | EN | M0) */
+ 0x0124 0x118 /* MMC1_DAT6 (IEN | PTU | EN | M0) */
+ 0x0126 0x118 /* MMC1_DAT7 (IEN | PTU | EN | M0) */
+ >;
+ };
+
+ mmc2_pins: pinmux_mmc2_pins {
+ pinctrl-single,pins = <
+ 0x0128 0x100 /* MMC2_CLK (IEN | PTD | DIS | M0) */
+ 0x012A 0x118 /* MMC2_CMD (IEN | PTU | EN | M0) */
+ 0x012C 0x118 /* MMC2_DAT0 (IEN | PTU | EN | M0) */
+ 0x012E 0x118 /* MMC2_DAT1 (IEN | PTU | EN | M0) */
+ 0x0130 0x118 /* MMC2_DAT2 (IEN | PTU | EN | M0) */
+ 0x0132 0x118 /* MMC2_DAT3 (IEN | PTU | EN | M0) */
+ 0x0134 0x000 /* MMC2_DAT4 (IDIS | PTD | DIS | M0) */
+ 0x0136 0x000 /* MMC2_DAT5 (IDIS | PTD | DIS | M0) */
+ 0x0138 0x000 /* MMC2_DAT6 (IDIS | PTD | DIS | M0) */
+ 0x013A 0x118 /* MMC2_DAT7 (IEN | PTU | EN | M0) */
+ >;
+ };
+
+ uart1_pins: pinmux_uart1_pins {
+ pinctrl-single,pins = <
+ 0x014C 0x000 /* UART1_TX (IDIS | PTD | DIS | M0) */
+ 0x014E 0x000 /* UART1_RTS (IDIS | PTD | DIS | M0) */
+ 0x0150 0x110 /* UART1_CTS (IEN | PTU | DIS | M0) */
+ 0x0152 0x100 /* UART1_RX (IEN | PTD | DIS | M0) */
+ >;
+ };
+
+ hsusb1_pins: pinmux_hsusb1_pins {
+ pinctrl-single,pins = <
+ 0x0172 0x100 /* HSUSB0_CLK (IEN | PTD | DIS | M0) */
+ 0x0174 0x018 /* HSUSB0_STP (IDIS | PTU | EN | M0) */
+ 0x0176 0x100 /* HSUSB0_DIR (IEN | PTD | DIS | M0) */
+ 0x0178 0x100 /* HSUSB0_NXT (IEN | PTD | DIS | M0) */
+ 0x017A 0x100 /* HSUSB0_DATA0 (IEN | PTD | DIS | M0) */
+ 0x017C 0x100 /* HSUSB0_DATA1 (IEN | PTD | DIS | M0) */
+ 0x017E 0x100 /* HSUSB0_DATA2 (IEN | PTD | DIS | M0) */
+ 0x0180 0x100 /* HSUSB0_DATA3 (IEN | PTD | DIS | M0) */
+ 0x0182 0x100 /* HSUSB0_DATA4 (IEN | PTD | DIS | M0) */
+ 0x0184 0x100 /* HSUSB0_DATA5 (IEN | PTD | DIS | M0) */
+ 0x0186 0x100 /* HSUSB0_DATA6 (IEN | PTD | DIS | M0) */
+ 0x0188 0x100 /* HSUSB0_DATA7 (IEN | PTD | DIS | M0) */
+ >;
+ };
+
+ i2c1_pins: pinmux_i2c1_pins {
+ pinctrl-single,pins = <
+ 0x018A 0x118 /* I2C1_SCL (IEN | PTU | EN | M0) */
+ 0x018C 0x118 /* I2C1_SDA (IEN | PTU | EN | M0) */
+ >;
+ };
+
+ i2c4_pins: pinmux_i2c4_pins {
+ pinctrl-single,pins = <
+ 0x09D0 0x007 /* I2C4_SCL (IDIS | PTD | DIS | M7) */
+ 0x09D2 0x007 /* I2C4_SDA (IDIS | PTD | DIS | M7) */
+ >;
+ };
+
+ gpio170_pin: pinmux_gpio170_pin {
+ /* GPIO_170 Power_ON pin */
+ pinctrl-single,pins = <
+ 0x0196 0x01C /* HDQ_SIO (IDIS | PTU | EN | M4) */
+ >;
+ };
+
+ gpio95_pin: pinmux_gpio95_pin {
+ /* GPIO_95 WLAN RESET keep low */
+ pinctrl-single,pins = <
+ 0x00DE 0x00C /* CAM_VS (IDIS | PTD | EN | M4) */
+ >;
+ };
+
+
+
+
+};
+
+&uart1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart1_pins>;
+};
+
+&i2c1 {
+ clock-frequency = <100000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c1_pins>;
+
+ pmu: tps6507x at 48 {
+ compatible = "ti,tps6507x";
+ reg = <0x48>;
+
+ regulators {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ vdcdc1_reg: regulator at 0 {
+ regulator-compatible = "VDCDC1";
+ reg = <0>;
+ regulator-min-microvolt = <725000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+ vdcdc2_reg: regulator at 1 {
+ regulator-compatible = "VDCDC2";
+ reg = <1>;
+ regulator-min-microvolt = <725000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-always-on;
+ regulator-boot-on;
+ defdcdc_default = <1>;
+ };
+ vdcdc3_reg: regulator at 2 {
+ regulator-compatible = "VDCDC3";
+ reg = <2>;
+ regulator-min-microvolt = <725000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-always-on;
+ regulator-boot-on;
+ defdcdc_default = <1>;
+ };
+ ldo1_reg: regulator at 3 {
+ regulator-compatible = "LDO1";
+ reg = <3>;
+ regulator-min-microvolt = <1000000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+ ldo2_reg: regulator at 4 {
+ regulator-compatible = "LDO2";
+ reg = <4>;
+ regulator-min-microvolt = <725000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+ };
+ };
+};
+
+/* optional on board WiFi */
+&mmc2 {
+ bus-width = <4>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc2_pins>;
+};
+
+&i2c2 {
+ status = "disabled";
+};
+
+&i2c3 {
+ status = "disabled";
+};
+
+&uart2 {
+ status = "disabled";
+};
+
+&uart3 {
+ status = "disabled";
+};
+
+&mcspi1 {
+ status = "disabled";
+};
+
+&mcspi2 {
+ status = "disabled";
+};
+
+&mcspi3 {
+ status = "disabled";
+};
+
+&mcspi4 {
+ status = "disabled";
+};
--
1.8.2.1
^ permalink raw reply related [flat|nested] 11+ messages in thread
* [RFC PATCH 3/3] ARM: omap3: wireless plus gpmc wip
2013-05-08 19:23 [RFC PATCH 0/3] ARM: omap3: add Seagate Wireless Plus board Jason Cooper
2013-05-08 19:23 ` [RFC PATCH 1/3] ARM: omap3: " Jason Cooper
2013-05-08 19:23 ` [RFC PATCH 2/3] ARM: omap3: Seagate Wireless Plus DT entry Jason Cooper
@ 2013-05-08 19:23 ` Jason Cooper
2013-05-08 19:45 ` [RFC PATCH 0/3] ARM: omap3: add Seagate Wireless Plus board Tony Lindgren
2013-05-08 19:51 ` Tony Lindgren
4 siblings, 0 replies; 11+ messages in thread
From: Jason Cooper @ 2013-05-08 19:23 UTC (permalink / raw)
To: linux-arm-kernel
Need this in order to add the nand node and then the partitions.
in it's current state, crashes the system. :(
---
arch/arm/boot/dts/omap3-wireless_plus.dts | 19 ++++++++++++++++++-
1 file changed, 18 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/omap3-wireless_plus.dts b/arch/arm/boot/dts/omap3-wireless_plus.dts
index 8a0acdf..6f33731 100644
--- a/arch/arm/boot/dts/omap3-wireless_plus.dts
+++ b/arch/arm/boot/dts/omap3-wireless_plus.dts
@@ -17,6 +17,23 @@
device_type = "memory";
reg = <0x80000000 0x10000000>; /* 256 MB */
};
+
+ gpmc: gpmc at 6800A000 {
+ compatible = "ti,omap2430-gpmc";
+ ti,hwmods = "gpmc";
+ reg = <0x6800A000 0x2000>;
+ /* interrupts = <100>; */
+ pinctrl-names = "default";
+ pinctrl-0 = <&gpmc_pins>;
+
+ gpmc,num-cs = <8>;
+ gpmc,num-waitpins = <2>;
+ #address-cells = <2>;
+ #size-cells = <1>;
+ ranges = <0 0 0x08000000 0x10000000>;
+
+ /* child nodes go here */
+ };
};
&omap3_pmx_core {
@@ -26,7 +43,7 @@
* itself during the boot (or just set them up in the bootloader)
*/
pinctrl-names = "default";
- pinctrl-0 = <&sdrc_pins &gpmc_pins &hsusb1_pins>;
+ pinctrl-0 = <&sdrc_pins &hsusb1_pins>;
/* AM3703CUS pins for this board */
sdrc_pins: pinmux_sdrc_pins {
--
1.8.2.1
^ permalink raw reply related [flat|nested] 11+ messages in thread
* [RFC PATCH 0/3] ARM: omap3: add Seagate Wireless Plus board
2013-05-08 19:23 [RFC PATCH 0/3] ARM: omap3: add Seagate Wireless Plus board Jason Cooper
` (2 preceding siblings ...)
2013-05-08 19:23 ` [RFC PATCH 3/3] ARM: omap3: wireless plus gpmc wip Jason Cooper
@ 2013-05-08 19:45 ` Tony Lindgren
2013-05-09 0:36 ` Jason Cooper
2013-05-08 19:51 ` Tony Lindgren
4 siblings, 1 reply; 11+ messages in thread
From: Tony Lindgren @ 2013-05-08 19:45 UTC (permalink / raw)
To: linux-arm-kernel
* Jason Cooper <jason@lakedaemon.net> [130508 12:29]:
>
> Tony has been helping me out offline with this, and he suggested trying the
> gpmc against Linus' ToT. Which locks up before it even has a chance to get
> going. So this series is against v3.9.
You may have better luck with today's mainline treeand the following fix:
http://lkml.org/lkml/2013/5/8/374#
Regards,
Tony
^ permalink raw reply [flat|nested] 11+ messages in thread
* [RFC PATCH 0/3] ARM: omap3: add Seagate Wireless Plus board
2013-05-08 19:23 [RFC PATCH 0/3] ARM: omap3: add Seagate Wireless Plus board Jason Cooper
` (3 preceding siblings ...)
2013-05-08 19:45 ` [RFC PATCH 0/3] ARM: omap3: add Seagate Wireless Plus board Tony Lindgren
@ 2013-05-08 19:51 ` Tony Lindgren
2013-05-08 21:58 ` Jason Cooper
4 siblings, 1 reply; 11+ messages in thread
From: Tony Lindgren @ 2013-05-08 19:51 UTC (permalink / raw)
To: linux-arm-kernel
* Jason Cooper <jason@lakedaemon.net> [130508 12:29]:
>
> Current Problem:
>
> There are several gaps in my understanding of how far along TI's conversion to
> DT is. Should I be doing a separate board file for initializing the legacy
> items? I was hoping to do it all with DT.
Sorry forgot to reply to this.. No seprate board file should be needed,
some devices may still need to be initialized with pdata based on the
compatible flag.
> Obviously, I don't expect anybody to run out and buy one of these, take it
> apart, and try to boot this code. But if the omap guys could take a look at
> this and give me a few pointers, I'd appreciate it. I'm kind of spinning my
> wheels at the moment.
>
> Primarily, I'd like to get nand and usb working, so that I can read/write,
> mount a rootfs and do better testing.
The USB should be doable with device tree. At least both echi and
musb are working properly on pandaboard. I think people have been
using NAND with the gpmc DT patches, but I don't know the current
status for sure.
Is the hard drive on the EHCI bus or how is it connected to omap?
Regards,
Tony
^ permalink raw reply [flat|nested] 11+ messages in thread
* [RFC PATCH 0/3] ARM: omap3: add Seagate Wireless Plus board
2013-05-08 19:51 ` Tony Lindgren
@ 2013-05-08 21:58 ` Jason Cooper
2013-05-08 22:30 ` Tony Lindgren
0 siblings, 1 reply; 11+ messages in thread
From: Jason Cooper @ 2013-05-08 21:58 UTC (permalink / raw)
To: linux-arm-kernel
On Wed, May 08, 2013 at 12:51:53PM -0700, Tony Lindgren wrote:
> * Jason Cooper <jason@lakedaemon.net> [130508 12:29]:
> >
> > Current Problem:
> >
> > There are several gaps in my understanding of how far along TI's conversion to
> > DT is. Should I be doing a separate board file for initializing the legacy
> > items? I was hoping to do it all with DT.
>
> Sorry forgot to reply to this.. No seprate board file should be needed,
> some devices may still need to be initialized with pdata based on the
> compatible flag.
ti,hwmod, right?
> > Obviously, I don't expect anybody to run out and buy one of these, take it
> > apart, and try to boot this code. But if the omap guys could take a look at
> > this and give me a few pointers, I'd appreciate it. I'm kind of spinning my
> > wheels at the moment.
> >
> > Primarily, I'd like to get nand and usb working, so that I can read/write,
> > mount a rootfs and do better testing.
>
> The USB should be doable with device tree. At least both echi and
> musb are working properly on pandaboard. I think people have been
> using NAND with the gpmc DT patches, but I don't know the current
> status for sure.
I'll try your suggestion in your other email for ToT and see if I can
get gpmc going.
> Is the hard drive on the EHCI bus or how is it connected to omap?
via ehci. They brutalized the tps driver to detect if the goflex cable
was attached or not. Once I get something stable, I'll probably write a
separate driver for that code. Or, push it out to userspace.
thx,
Jason.
^ permalink raw reply [flat|nested] 11+ messages in thread
* [RFC PATCH 0/3] ARM: omap3: add Seagate Wireless Plus board
2013-05-08 21:58 ` Jason Cooper
@ 2013-05-08 22:30 ` Tony Lindgren
0 siblings, 0 replies; 11+ messages in thread
From: Tony Lindgren @ 2013-05-08 22:30 UTC (permalink / raw)
To: linux-arm-kernel
* Jason Cooper <jason@lakedaemon.net> [130508 15:04]:
> On Wed, May 08, 2013 at 12:51:53PM -0700, Tony Lindgren wrote:
> > * Jason Cooper <jason@lakedaemon.net> [130508 12:29]:
> > >
> > > Current Problem:
> > >
> > > There are several gaps in my understanding of how far along TI's conversion to
> > > DT is. Should I be doing a separate board file for initializing the legacy
> > > items? I was hoping to do it all with DT.
> >
> > Sorry forgot to reply to this.. No seprate board file should be needed,
> > some devices may still need to be initialized with pdata based on the
> > compatible flag.
>
> ti,hwmod, right?
Yes.. see mach-omap2/devices.c for the list that's still not initialized
via DT.
> > > Obviously, I don't expect anybody to run out and buy one of these, take it
> > > apart, and try to boot this code. But if the omap guys could take a look at
> > > this and give me a few pointers, I'd appreciate it. I'm kind of spinning my
> > > wheels at the moment.
> > >
> > > Primarily, I'd like to get nand and usb working, so that I can read/write,
> > > mount a rootfs and do better testing.
> >
> > The USB should be doable with device tree. At least both echi and
> > musb are working properly on pandaboard. I think people have been
> > using NAND with the gpmc DT patches, but I don't know the current
> > status for sure.
>
> I'll try your suggestion in your other email for ToT and see if I can
> get gpmc going.
>
> > Is the hard drive on the EHCI bus or how is it connected to omap?
>
> via ehci. They brutalized the tps driver to detect if the goflex cable
> was attached or not. Once I get something stable, I'll probably write a
> separate driver for that code. Or, push it out to userspace.
OK. I guess you need to disconnect the drive from EHCI if the goflex
is attached to avoid disk corruption?
Regards,
Tony
^ permalink raw reply [flat|nested] 11+ messages in thread
* [RFC PATCH 0/3] ARM: omap3: add Seagate Wireless Plus board
2013-05-08 19:45 ` [RFC PATCH 0/3] ARM: omap3: add Seagate Wireless Plus board Tony Lindgren
@ 2013-05-09 0:36 ` Jason Cooper
2013-05-09 15:56 ` Tony Lindgren
0 siblings, 1 reply; 11+ messages in thread
From: Jason Cooper @ 2013-05-09 0:36 UTC (permalink / raw)
To: linux-arm-kernel
On Wed, May 08, 2013 at 12:45:04PM -0700, Tony Lindgren wrote:
> * Jason Cooper <jason@lakedaemon.net> [130508 12:29]:
> >
> > Tony has been helping me out offline with this, and he suggested trying the
> > gpmc against Linus' ToT. Which locks up before it even has a chance to get
> > going. So this series is against v3.9.
>
> You may have better luck with today's mainline treeand the following fix:
>
> http://lkml.org/lkml/2013/5/8/374#
Ok, I'm attempting to do that, but got this for 'make dtbs':
ERROR (phandle_references): Reference to non-existent node or label "usb2_phy"
ERROR: Input tree has errors, aborting (use -f to force output)
make[1]: *** [arch/arm/boot/dts/omap3-wireless_plus.dtb] Error 2
make[1]: *** Waiting for unfinished jobs....
make: *** [dtbs] Error 2
which was created by:
ad871c10 ARM: dts: OMAP: Add usb_otg and glue data to OMAP3+ boards
It assumes the board has twl4030 (and then includes it). Bootlogs from
the vendor provided kernel don't show a single message from twl4030, so
I've omitted it.
Assuming I did the correct thing by omitting the twl4030, I think the
correct answer is to declare the phy in the dts files, like so:
---->8-----
commit c369d84600bd85b35d83807ce7ba893cea116fb4
Author: Jason Cooper <jason@lakedaemon.net>
Date: Thu May 9 00:33:48 2013 +0000
ARM: omap3: dts: don't assume boards are using twl4030
If a board isn't using twl4030, then dtc will complain about the missing
phandle (which is in twl4030.dtsi). Move the phy declaration to the dts
files.
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
diff --git a/arch/arm/boot/dts/omap3-beagle-xm.dts b/arch/arm/boot/dts/omap3-beagle-xm.dts
index 5a31964..3046d1f 100644
--- a/arch/arm/boot/dts/omap3-beagle-xm.dts
+++ b/arch/arm/boot/dts/omap3-beagle-xm.dts
@@ -122,6 +122,7 @@
&usb_otg_hs {
interface-type = <0>;
+ usb-phy = <&usb2_phy>;
mode = <3>;
power = <50>;
};
diff --git a/arch/arm/boot/dts/omap3-evm.dts b/arch/arm/boot/dts/omap3-evm.dts
index 05f51e1..96d1c20 100644
--- a/arch/arm/boot/dts/omap3-evm.dts
+++ b/arch/arm/boot/dts/omap3-evm.dts
@@ -68,6 +68,7 @@
&usb_otg_hs {
interface-type = <0>;
+ usb-phy = <&usb2_phy>;
mode = <3>;
power = <50>;
};
diff --git a/arch/arm/boot/dts/omap3-overo.dtsi b/arch/arm/boot/dts/omap3-overo.dtsi
index d4a7280..a626c50 100644
--- a/arch/arm/boot/dts/omap3-overo.dtsi
+++ b/arch/arm/boot/dts/omap3-overo.dtsi
@@ -73,6 +73,7 @@
&usb_otg_hs {
interface-type = <0>;
+ usb-phy = <&usb2_phy>;
mode = <3>;
power = <50>;
};
diff --git a/arch/arm/boot/dts/omap3.dtsi b/arch/arm/boot/dts/omap3.dtsi
index 4ad03d9..82a404d 100644
--- a/arch/arm/boot/dts/omap3.dtsi
+++ b/arch/arm/boot/dts/omap3.dtsi
@@ -519,7 +519,6 @@
interrupts = <0 92 0x4>, <0 93 0x4>;
interrupt-names = "mc", "dma";
ti,hwmods = "usb_otg_hs";
- usb-phy = <&usb2_phy>;
multipoint = <1>;
num-eps = <16>;
ram-bits = <12>;
^ permalink raw reply related [flat|nested] 11+ messages in thread
* [RFC PATCH 0/3] ARM: omap3: add Seagate Wireless Plus board
2013-05-09 0:36 ` Jason Cooper
@ 2013-05-09 15:56 ` Tony Lindgren
2013-05-09 16:05 ` Tony Lindgren
0 siblings, 1 reply; 11+ messages in thread
From: Tony Lindgren @ 2013-05-09 15:56 UTC (permalink / raw)
To: linux-arm-kernel
* Jason Cooper <jason@lakedaemon.net> [130508 17:41]:
> On Wed, May 08, 2013 at 12:45:04PM -0700, Tony Lindgren wrote:
> > * Jason Cooper <jason@lakedaemon.net> [130508 12:29]:
> > >
> > > Tony has been helping me out offline with this, and he suggested trying the
> > > gpmc against Linus' ToT. Which locks up before it even has a chance to get
> > > going. So this series is against v3.9.
> >
> > You may have better luck with today's mainline treeand the following fix:
> >
> > http://lkml.org/lkml/2013/5/8/374#
>
> Ok, I'm attempting to do that, but got this for 'make dtbs':
>
> ERROR (phandle_references): Reference to non-existent node or label "usb2_phy"
>
> ERROR: Input tree has errors, aborting (use -f to force output)
> make[1]: *** [arch/arm/boot/dts/omap3-wireless_plus.dtb] Error 2
> make[1]: *** Waiting for unfinished jobs....
> make: *** [dtbs] Error 2
>
> which was created by:
>
> ad871c10 ARM: dts: OMAP: Add usb_otg and glue data to OMAP3+ boards
>
> It assumes the board has twl4030 (and then includes it). Bootlogs from
> the vendor provided kernel don't show a single message from twl4030, so
> I've omitted it.
>
> Assuming I did the correct thing by omitting the twl4030, I think the
> correct answer is to declare the phy in the dts files, like so:
Thanks, that is correct. We should not assume any PMIC with a processor
as it can also be a custom chip. For example, Nokia n8x0 is using their
retu + tahvo chips instead of tps chips.
I'll apply your patch into omap-for-v3.10/fixes.
Regards,
Tony
^ permalink raw reply [flat|nested] 11+ messages in thread
* [RFC PATCH 0/3] ARM: omap3: add Seagate Wireless Plus board
2013-05-09 15:56 ` Tony Lindgren
@ 2013-05-09 16:05 ` Tony Lindgren
0 siblings, 0 replies; 11+ messages in thread
From: Tony Lindgren @ 2013-05-09 16:05 UTC (permalink / raw)
To: linux-arm-kernel
* Tony Lindgren <tony@atomide.com> [130509 09:03]:
> * Jason Cooper <jason@lakedaemon.net> [130508 17:41]:
> > On Wed, May 08, 2013 at 12:45:04PM -0700, Tony Lindgren wrote:
> > > * Jason Cooper <jason@lakedaemon.net> [130508 12:29]:
> > > >
> > > > Tony has been helping me out offline with this, and he suggested trying the
> > > > gpmc against Linus' ToT. Which locks up before it even has a chance to get
> > > > going. So this series is against v3.9.
> > >
> > > You may have better luck with today's mainline treeand the following fix:
> > >
> > > http://lkml.org/lkml/2013/5/8/374#
> >
> > Ok, I'm attempting to do that, but got this for 'make dtbs':
> >
> > ERROR (phandle_references): Reference to non-existent node or label "usb2_phy"
> >
> > ERROR: Input tree has errors, aborting (use -f to force output)
> > make[1]: *** [arch/arm/boot/dts/omap3-wireless_plus.dtb] Error 2
> > make[1]: *** Waiting for unfinished jobs....
> > make: *** [dtbs] Error 2
> >
> > which was created by:
> >
> > ad871c10 ARM: dts: OMAP: Add usb_otg and glue data to OMAP3+ boards
> >
> > It assumes the board has twl4030 (and then includes it). Bootlogs from
> > the vendor provided kernel don't show a single message from twl4030, so
> > I've omitted it.
> >
> > Assuming I did the correct thing by omitting the twl4030, I think the
> > correct answer is to declare the phy in the dts files, like so:
>
> Thanks, that is correct. We should not assume any PMIC with a processor
> as it can also be a custom chip. For example, Nokia n8x0 is using their
> retu + tahvo chips instead of tps chips.
>
> I'll apply your patch into omap-for-v3.10/fixes.
I mean omap-for-v3.10/dt-fixes instead of fixes since it's .dts changes.
> Regards,
>
> Tony
>
>
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 11+ messages in thread
end of thread, other threads:[~2013-05-09 16:05 UTC | newest]
Thread overview: 11+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2013-05-08 19:23 [RFC PATCH 0/3] ARM: omap3: add Seagate Wireless Plus board Jason Cooper
2013-05-08 19:23 ` [RFC PATCH 1/3] ARM: omap3: " Jason Cooper
2013-05-08 19:23 ` [RFC PATCH 2/3] ARM: omap3: Seagate Wireless Plus DT entry Jason Cooper
2013-05-08 19:23 ` [RFC PATCH 3/3] ARM: omap3: wireless plus gpmc wip Jason Cooper
2013-05-08 19:45 ` [RFC PATCH 0/3] ARM: omap3: add Seagate Wireless Plus board Tony Lindgren
2013-05-09 0:36 ` Jason Cooper
2013-05-09 15:56 ` Tony Lindgren
2013-05-09 16:05 ` Tony Lindgren
2013-05-08 19:51 ` Tony Lindgren
2013-05-08 21:58 ` Jason Cooper
2013-05-08 22:30 ` Tony Lindgren
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