From mboxrd@z Thu Jan  1 00:00:00 1970
From: catalin.marinas@arm.com (Catalin Marinas)
Date: Wed, 22 May 2013 09:43:28 +0100
Subject: [PATCH 14/14] ARM: elf: add new hwcap for identifying atomic
 ldrd/strd instructions
In-Reply-To: <20130521180201.GB26251@mudshark.cambridge.arm.com>
References: <1368810473-26070-1-git-send-email-will.deacon@arm.com>
 <1368810473-26070-15-git-send-email-will.deacon@arm.com>
 <20130520141809.GA27473@arm.com>
 <20130520142459.GN31359@mudshark.cambridge.arm.com>
 <20130520151158.GA3520@MacBook-Pro.local>
 <20130520160407.GS31359@mudshark.cambridge.arm.com>
 <20130520171349.GM3639@MacBook-Pro.local>
 <20130521180201.GB26251@mudshark.cambridge.arm.com>
Message-ID: <20130522084328.GC14322@arm.com>
To: linux-arm-kernel@lists.infradead.org
List-Id: linux-arm-kernel.lists.infradead.org

On Tue, May 21, 2013 at 07:02:01PM +0100, Will Deacon wrote:
> On Mon, May 20, 2013 at 06:13:52PM +0100, Catalin Marinas wrote:
> > On Mon, May 20, 2013 at 05:04:07PM +0100, Will Deacon wrote:
> > > On Mon, May 20, 2013 at 04:11:58PM +0100, Catalin Marinas wrote:
> > > > Given that the ARM ARM isn't clear (though this is the case on the
> > > > actual implementations), user space may not necessarily assume that
> > > > LPAE==atomic doubles. That's why I think reporting the actual atomic
> > > > feature is better.
> > > 
> > > The ARM ARM isn't too bad: it's just avoiding mandating 64-bit-wide paths
> > > around the entire SoC (and I've checked this with the architects). The only
> > > way we can probe this feature is using the MMFR0 and checking if LPAE is
> > > supported, and that's exactly what userspace will need to rely on.
> > 
> > Well, LPAE implies atomic doubles but I wouldn't say that's the "only"
> > way, it can always be a feature of the CPU. Now, would the user
> > developers fully understand the implications of LPAE?
> 
> I don't think it *can* be a feature of the CPU, because it depends on
> system-wide support. It could be a feature of an SoC, but per-SoC hwcaps
> isn't something we currently support. As I said, the only reason we can even
> probe this is because the architecture helps us out.

LPAE is also a feature of the CPU, not the SoC.

-- 
Catalin