[PATCH 0/4] Update for Renesas INTC External IRQ pin driver for v3.11

[PATCH 0/4] Update for Renesas INTC External IRQ pin driver for v3.11

[Simon Horman]

Hi Olof, Hi Arnd,

The following changes since commit c7788792a5e7b0d5d7f96d0766b4cb6112d47d75:

  Linux 3.10-rc2 (2013-05-20 14:37:38 -0700)

are available in the git repository at:

  git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas.git tags/renesas-intc-external-irq-for-v3.11

for you to fetch changes up to 14d064ad3881f47ae0a6f247c992652053c7f4d5:

  irqchip: Add irqchip_init dummy function (2013-05-22 21:55:41 +0900)

----------------------------------------------------------------
Update for Renesas INTC External IRQ pin driver for v3.11

Add runtime PM support
Add DT binding for sense bitfield width
Correct error handing in irqc_probe
Add irqchip_init dummy function

----------------------------------------------------------------
Axel Lin (1):
      irqchip: renesas-irqc: Fix irqc_probe error handling

Bastian Hecht (1):
      irqchip: Add irqchip_init dummy function

Guennadi Liakhovetski (1):
      irqchip: renesas-intc-irqpin: DT binding for sense bitfield width

Simon Horman (1):
      irqchip: irqc: Add runtime PM support

 .../bindings/interrupt-controller/renesas,intc-irqpin.txt   | 13 +++++++++++++
 drivers/irqchip/irq-renesas-intc-irqpin.c                   |  4 ++++
 drivers/irqchip/irq-renesas-irqc.c                          | 12 ++++++++++--
 include/linux/irqchip.h                                     |  4 ++++
 4 files changed, 31 insertions(+), 2 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/interrupt-controller/renesas,intc-irqpin.txt

-- 
1.8.2.1

[PATCH 1/4] irqchip: irqc: Add runtime PM support

[Simon Horman]

This was tested using the SMSC LAN on the APE6EVM board.

Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
 drivers/irqchip/irq-renesas-irqc.c | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/drivers/irqchip/irq-renesas-irqc.c b/drivers/irqchip/irq-renesas-irqc.c
index 927bff3..649cd69 100644
--- a/drivers/irqchip/irq-renesas-irqc.c
+++ b/drivers/irqchip/irq-renesas-irqc.c
@@ -19,6 +19,7 @@
 
 #include <linux/init.h>
 #include <linux/platform_device.h>
+#include <linux/pm_runtime.h>
 #include <linux/spinlock.h>
 #include <linux/interrupt.h>
 #include <linux/ioport.h>
@@ -181,6 +182,9 @@ static int irqc_probe(struct platform_device *pdev)
 		goto err1;
 	}
 
+	pm_runtime_enable(&pdev->dev);
+	pm_runtime_get_sync(&pdev->dev);
+
 	/* allow any number of IRQs between 1 and IRQC_IRQ_MAX */
 	for (k = 0; k < IRQC_IRQ_MAX; k++) {
 		irq = platform_get_resource(pdev, IORESOURCE_IRQ, k);
@@ -255,6 +259,8 @@ err3:
 err2:
 	iounmap(p->iomem);
 err1:
+	pm_runtime_put_sync(&pdev->dev);
+	pm_runtime_disable(&pdev->dev);
 	kfree(p);
 err0:
 	return ret;
@@ -270,6 +276,8 @@ static int irqc_remove(struct platform_device *pdev)
 
 	irq_domain_remove(p->irq_domain);
 	iounmap(p->iomem);
+	pm_runtime_put_sync(&pdev->dev);
+	pm_runtime_disable(&pdev->dev);
 	kfree(p);
 	return 0;
 }
-- 
1.8.2.1

[PATCH 2/4] irqchip: renesas-intc-irqpin: DT binding for sense bitfield width

[Simon Horman]

From: Guennadi Liakhovetski <g.liakhovetski@gmx.de>

Most Renesas irqpin controllers have 4-bit sense fields, however, some
have different widths. This patch adds a DT binding to optionally
specify such non-standard values.

Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
Acked-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
 .../bindings/interrupt-controller/renesas,intc-irqpin.txt   | 13 +++++++++++++
 drivers/irqchip/irq-renesas-intc-irqpin.c                   |  4 ++++
 2 files changed, 17 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/interrupt-controller/renesas,intc-irqpin.txt

diff --git a/Documentation/devicetree/bindings/interrupt-controller/renesas,intc-irqpin.txt b/Documentation/devicetree/bindings/interrupt-controller/renesas,intc-irqpin.txt
new file mode 100644
index 0000000..c6f09b7
--- /dev/null
+++ b/Documentation/devicetree/bindings/interrupt-controller/renesas,intc-irqpin.txt
@@ -0,0 +1,13 @@
+DT bindings for the R-/SH-Mobile irqpin controller
+
+Required properties:
+
+- compatible: has to be "renesas,intc-irqpin"
+- #interrupt-cells: has to be <2>
+
+Optional properties:
+
+- any properties, listed in interrupts.txt in this directory, and any standard
+  resource allocation properties
+- sense-bitfield-width: width of a single sense bitfield in the SENSE register,
+  if different from the default 4 bits
diff --git a/drivers/irqchip/irq-renesas-intc-irqpin.c b/drivers/irqchip/irq-renesas-intc-irqpin.c
index 5a68e5a..4aca1b2 100644
--- a/drivers/irqchip/irq-renesas-intc-irqpin.c
+++ b/drivers/irqchip/irq-renesas-intc-irqpin.c
@@ -18,6 +18,7 @@
  */
 
 #include <linux/init.h>
+#include <linux/of.h>
 #include <linux/platform_device.h>
 #include <linux/spinlock.h>
 #include <linux/interrupt.h>
@@ -349,6 +350,9 @@ static int intc_irqpin_probe(struct platform_device *pdev)
 	/* deal with driver instance configuration */
 	if (pdata)
 		memcpy(&p->config, pdata, sizeof(*pdata));
+	else
+		of_property_read_u32(pdev->dev.of_node, "sense-bitfield-width",
+				     &p->config.sense_bitfield_width);
 	if (!p->config.sense_bitfield_width)
 		p->config.sense_bitfield_width = 4; /* default to 4 bits */
 
-- 
1.8.2.1

[PATCH 3/4] irqchip: renesas-irqc: Fix irqc_probe error handling

[Simon Horman]

From: Axel Lin <axel.lin@ingics.com>

The code in goto err3 path is wrong because it will call fee_irq() with k == 0,
which means it does free_irq(p->irq[-1].requested_irq, &p->irq[-1]);

Signed-off-by: Axel Lin <axel.lin@ingics.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
 drivers/irqchip/irq-renesas-irqc.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/irqchip/irq-renesas-irqc.c b/drivers/irqchip/irq-renesas-irqc.c
index 649cd69..3651f77 100644
--- a/drivers/irqchip/irq-renesas-irqc.c
+++ b/drivers/irqchip/irq-renesas-irqc.c
@@ -252,8 +252,8 @@ static int irqc_probe(struct platform_device *pdev)
 
 	return 0;
 err3:
-	for (; k >= 0; k--)
-		free_irq(p->irq[k - 1].requested_irq, &p->irq[k - 1]);
+	while (--k >= 0)
+		free_irq(p->irq[k].requested_irq, &p->irq[k]);
 
 	irq_domain_remove(p->irq_domain);
 err2:
-- 
1.8.2.1

[PATCH 4/4] irqchip: Add irqchip_init dummy function

[Simon Horman]

From: Bastian Hecht <hechtb@gmail.com>

We add an empty irqchip_init dummy function for cases in which
CONFIG_IRQCHIP is not used. In these cases irqchip.c is not compiled,
but a funtion call may still be present in architecture code, that in
runtime doesn't get hit.

E.g. this is needed in the arch/arm/mach-shmobile/intc-r8a7740.c
interrupt setup code where OF use and non OF us is both handled in one
file.

Signed-off-by: Bastian Hecht <hechtb+renesas@gmail.com>
[horms+renesas at verge.net.au: Make non-CONFIG_IRQCHIP version static inline
 and remove trailing ';'.]
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
 include/linux/irqchip.h | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/include/linux/irqchip.h b/include/linux/irqchip.h
index e0006f1..14d7913 100644
--- a/include/linux/irqchip.h
+++ b/include/linux/irqchip.h
@@ -11,6 +11,10 @@
 #ifndef _LINUX_IRQCHIP_H
 #define _LINUX_IRQCHIP_H
 
+#ifdef CONFIG_IRQCHIP
 void irqchip_init(void);
+#else
+static inline void irqchip_init(void) {}
+#endif
 
 #endif
-- 
1.8.2.1

[GIT PULL 0/4] Update for Renesas INTC External IRQ pin driver for v3.11

[Simon Horman]

[ fix up subject to say GIT PULL ]

On Wed, Jun 05, 2013 at 01:32:27PM +0900, Simon Horman wrote:
> Hi Olof, Hi Arnd,
> 
> The following changes since commit c7788792a5e7b0d5d7f96d0766b4cb6112d47d75:
> 
>   Linux 3.10-rc2 (2013-05-20 14:37:38 -0700)
> 
> are available in the git repository at:
> 
>   git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas.git tags/renesas-intc-external-irq-for-v3.11
> 
> for you to fetch changes up to 14d064ad3881f47ae0a6f247c992652053c7f4d5:
> 
>   irqchip: Add irqchip_init dummy function (2013-05-22 21:55:41 +0900)
> 
> ----------------------------------------------------------------
> Update for Renesas INTC External IRQ pin driver for v3.11
> 
> Add runtime PM support
> Add DT binding for sense bitfield width
> Correct error handing in irqc_probe
> Add irqchip_init dummy function
> 
> ----------------------------------------------------------------
> Axel Lin (1):
>       irqchip: renesas-irqc: Fix irqc_probe error handling
> 
> Bastian Hecht (1):
>       irqchip: Add irqchip_init dummy function
> 
> Guennadi Liakhovetski (1):
>       irqchip: renesas-intc-irqpin: DT binding for sense bitfield width
> 
> Simon Horman (1):
>       irqchip: irqc: Add runtime PM support
> 
>  .../bindings/interrupt-controller/renesas,intc-irqpin.txt   | 13 +++++++++++++
>  drivers/irqchip/irq-renesas-intc-irqpin.c                   |  4 ++++
>  drivers/irqchip/irq-renesas-irqc.c                          | 12 ++++++++++--
>  include/linux/irqchip.h                                     |  4 ++++
>  4 files changed, 31 insertions(+), 2 deletions(-)
>  create mode 100644 Documentation/devicetree/bindings/interrupt-controller/renesas,intc-irqpin.txt
> 
> -- 
> 1.8.2.1
> 

[PATCH 1/4] irqchip: irqc: Add runtime PM support

[Magnus Damm]

Hi Simon and Morimoto-san,

On Wed, Jun 5, 2013 at 1:32 PM, Simon Horman <horms+renesas@verge.net.au> wrote:
> This was tested using the SMSC LAN on the APE6EVM board.
>
> Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
> ---
>  drivers/irqchip/irq-renesas-irqc.c | 8 ++++++++
>  1 file changed, 8 insertions(+)

Thanks for your patch. I am trying to understand how this controls the
actual hardware. Which clock and/or power domain is being controlled
using this patch?

Cheers,

/ magnus

[PATCH 2/4] irqchip: renesas-intc-irqpin: DT binding for sense bitfield width

[Arnd Bergmann]

On Wednesday 05 June 2013, Simon Horman wrote:
> @@ -0,0 +1,13 @@
> +DT bindings for the R-/SH-Mobile irqpin controller
> +
> +Required properties:
> +
> +- compatible: has to be "renesas,intc-irqpin"
> +- #interrupt-cells: has to be <2>
> +
> +Optional properties:
> +
> +- any properties, listed in interrupts.txt in this directory, and any standard
> +  resource allocation properties
> +- sense-bitfield-width: width of a single sense bitfield in the SENSE register,
> +  if different from the default 4 bits

I think you should add documentation here about how the two interrupt cells
are to be interpreted, to allow people to fill the values from a data sheet
or board schematic.

	Arnd

[PATCH 1/4] irqchip: irqc: Add runtime PM support

[Simon Horman]

On Wed, Jun 05, 2013 at 04:03:26PM +0900, Magnus Damm wrote:
> Hi Simon and Morimoto-san,
> 
> On Wed, Jun 5, 2013 at 1:32 PM, Simon Horman <horms+renesas@verge.net.au> wrote:
> > This was tested using the SMSC LAN on the APE6EVM board.
> >
> > Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
> > Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
> > ---
> >  drivers/irqchip/irq-renesas-irqc.c | 8 ++++++++
> >  1 file changed, 8 insertions(+)
> 
> Thanks for your patch. I am trying to understand how this controls the
> actual hardware. Which clock and/or power domain is being controlled
> using this patch?

This patch appears to resolve a problem which I discussed with
Morimoto-san on the linux-sh ML and for which he proposed this solution.
However, I never fully analysed its effect. I think that
the best thing would be for me to drop this patch from the
renesas tree for now it and come back to this problem later.

[PATCH 2/4] irqchip: renesas-intc-irqpin: DT binding for sense bitfield width

[Simon Horman]

On Wed, Jun 05, 2013 at 01:52:52PM +0200, Arnd Bergmann wrote:
> On Wednesday 05 June 2013, Simon Horman wrote:
> > @@ -0,0 +1,13 @@
> > +DT bindings for the R-/SH-Mobile irqpin controller
> > +
> > +Required properties:
> > +
> > +- compatible: has to be "renesas,intc-irqpin"
> > +- #interrupt-cells: has to be <2>
> > +
> > +Optional properties:
> > +
> > +- any properties, listed in interrupts.txt in this directory, and any standard
> > +  resource allocation properties
> > +- sense-bitfield-width: width of a single sense bitfield in the SENSE register,
> > +  if different from the default 4 bits
> 
> I think you should add documentation here about how the two interrupt cells
> are to be interpreted, to allow people to fill the values from a data sheet
> or board schematic.

I will drop this patch from the renesas tree pending some more work
on the documentation.

I'll put together an updated pull request for renesas-intc-irqpin
without this or the runtime-pm patch, which Magnus commented on elsewhere.