[PATCH] clk: tegra: fix pllre initilization

[PATCH] clk: tegra: fix pllre initilization

[Peter De Schrijver]

The PLLRE flags weren't set correctly. Fixed in this patch.

Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
---
 drivers/clk/tegra/clk-pll.c |    3 +--
 1 files changed, 1 insertions(+), 2 deletions(-)

diff --git a/drivers/clk/tegra/clk-pll.c b/drivers/clk/tegra/clk-pll.c
index 4293643..197074a 100644
--- a/drivers/clk/tegra/clk-pll.c
+++ b/drivers/clk/tegra/clk-pll.c
@@ -1424,7 +1424,7 @@ struct clk *tegra_clk_register_pllre(const char *name, const char *parent_name,
 	struct tegra_clk_pll *pll;
 	struct clk *clk;
 
-	pll_flags |= TEGRA_PLL_HAS_LOCK_ENABLE;
+	pll_flags |= TEGRA_PLL_HAS_LOCK_ENABLE | TEGRA_PLL_LOCK_MISC;
 	pll = _tegra_init_pll(clk_base, pmc, fixed_rate, pll_params, pll_flags,
 			      freq_table, lock);
 	if (IS_ERR(pll))
@@ -1451,7 +1451,6 @@ struct clk *tegra_clk_register_pllre(const char *name, const char *parent_name,
 	val &= ~BIT(29);
 	pll_writel_misc(val, pll);
 
-	pll_flags |= TEGRA_PLL_LOCK_MISC;
 	clk = _tegra_clk_register_pll(pll, name, parent_name, flags,
 				      &tegra_clk_pllre_ops);
 	if (IS_ERR(clk))
-- 
1.7.7.rc0.72.g4b5ea.dirty

[PATCH] clk: tegra: fix pllre initilization

[Stephen Warren]

On 06/05/2013 08:21 AM, Peter De Schrijver wrote:
> The PLLRE flags weren't set correctly. Fixed in this patch.

Tested-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Stephen Warren <swarren@nvidia.com>

[PATCH] clk: tegra: fix pllre initilization

[Mike Turquette]

Quoting Peter De Schrijver (2013-06-05 07:21:46)
> The PLLRE flags weren't set correctly. Fixed in this patch.
> 
> Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>

Taken into clk-next.

Thanks,
Mike

> ---
>  drivers/clk/tegra/clk-pll.c |    3 +--
>  1 files changed, 1 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/clk/tegra/clk-pll.c b/drivers/clk/tegra/clk-pll.c
> index 4293643..197074a 100644
> --- a/drivers/clk/tegra/clk-pll.c
> +++ b/drivers/clk/tegra/clk-pll.c
> @@ -1424,7 +1424,7 @@ struct clk *tegra_clk_register_pllre(const char *name, const char *parent_name,
>         struct tegra_clk_pll *pll;
>         struct clk *clk;
>  
> -       pll_flags |= TEGRA_PLL_HAS_LOCK_ENABLE;
> +       pll_flags |= TEGRA_PLL_HAS_LOCK_ENABLE | TEGRA_PLL_LOCK_MISC;
>         pll = _tegra_init_pll(clk_base, pmc, fixed_rate, pll_params, pll_flags,
>                               freq_table, lock);
>         if (IS_ERR(pll))
> @@ -1451,7 +1451,6 @@ struct clk *tegra_clk_register_pllre(const char *name, const char *parent_name,
>         val &= ~BIT(29);
>         pll_writel_misc(val, pll);
>  
> -       pll_flags |= TEGRA_PLL_LOCK_MISC;
>         clk = _tegra_clk_register_pll(pll, name, parent_name, flags,
>                                       &tegra_clk_pllre_ops);
>         if (IS_ERR(clk))
> -- 
> 1.7.7.rc0.72.g4b5ea.dirty