[PATCH] irqchip: gic: fix boot for chained gics

[PATCH] irqchip: gic: fix boot for chained gics

[Mark Rutland]

As of c0114709ed: "irqchip: gic: Perform the gic_secondary_init() call
via CPU notifier", booting on a platform with chained gics (e.g.
Realview EB ARM11MPCore) will result in the gic_cpu_notifier being
registered twice, corrupting the cpu notifier list and rendering the
platform unbootable.

This patch ensures that we only register the notifier for the first gic,
allowing platforms with chained gics to boot. At the same time we limit
the pointlessly duplicated calls to set_smp_cross_call and
set_handle_irq to the first gic registered.

Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
---
 drivers/irqchip/irq-gic.c | 9 +++++----
 1 file changed, 5 insertions(+), 4 deletions(-)

diff --git a/drivers/irqchip/irq-gic.c b/drivers/irqchip/irq-gic.c
index 1760ceb..1a12bdf 100644
--- a/drivers/irqchip/irq-gic.c
+++ b/drivers/irqchip/irq-gic.c
@@ -808,12 +808,13 @@ void __init gic_init_bases(unsigned int gic_nr, int irq_start,
 	if (WARN_ON(!gic->domain))
 		return;
 
+	if (gic_nr == 0) {
 #ifdef CONFIG_SMP
-	set_smp_cross_call(gic_raise_softirq);
-	register_cpu_notifier(&gic_cpu_notifier);
+		set_smp_cross_call(gic_raise_softirq);
+		register_cpu_notifier(&gic_cpu_notifier);
 #endif
-
-	set_handle_irq(gic_handle_irq);
+		set_handle_irq(gic_handle_irq);
+	}
 
 	gic_chip.flags |= gic_arch_extn.flags;
 	gic_dist_init(gic);
-- 
1.8.1.1

[PATCH] irqchip: gic: fix boot for chained gics

[Catalin Marinas]

On Fri, Jun 14, 2013 at 05:24:57PM +0100, Mark Rutland wrote:
> As of c0114709ed: "irqchip: gic: Perform the gic_secondary_init() call
> via CPU notifier", booting on a platform with chained gics (e.g.
> Realview EB ARM11MPCore) will result in the gic_cpu_notifier being
> registered twice, corrupting the cpu notifier list and rendering the
> platform unbootable.
> 
> This patch ensures that we only register the notifier for the first gic,
> allowing platforms with chained gics to boot. At the same time we limit
> the pointlessly duplicated calls to set_smp_cross_call and
> set_handle_irq to the first gic registered.
> 
> Signed-off-by: Mark Rutland <mark.rutland@arm.com>
> Cc: Catalin Marinas <catalin.marinas@arm.com>
> Cc: Thomas Gleixner <tglx@linutronix.de>

Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>

[PATCH] irqchip: gic: fix boot for chained gics

[Sudeep KarkadaNagesha]

On 14/06/13 17:24, Mark Rutland wrote:
> As of c0114709ed: "irqchip: gic: Perform the gic_secondary_init() call
> via CPU notifier", booting on a platform with chained gics (e.g.
> Realview EB ARM11MPCore) will result in the gic_cpu_notifier being
> registered twice, corrupting the cpu notifier list and rendering the
> platform unbootable.

Hi Mark,

This patch is still not in the mainline. I am unable to boot my Realview
EB ARM11MPCore without this patch.

Regards,
Sudeep

> 
> This patch ensures that we only register the notifier for the first gic,
> allowing platforms with chained gics to boot. At the same time we limit
> the pointlessly duplicated calls to set_smp_cross_call and
> set_handle_irq to the first gic registered.
> 
> Signed-off-by: Mark Rutland <mark.rutland@arm.com>
> Cc: Catalin Marinas <catalin.marinas@arm.com>
> Cc: Thomas Gleixner <tglx@linutronix.de>
> ---
>  drivers/irqchip/irq-gic.c | 9 +++++----
>  1 file changed, 5 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/irqchip/irq-gic.c b/drivers/irqchip/irq-gic.c
> index 1760ceb..1a12bdf 100644
> --- a/drivers/irqchip/irq-gic.c
> +++ b/drivers/irqchip/irq-gic.c
> @@ -808,12 +808,13 @@ void __init gic_init_bases(unsigned int gic_nr, int irq_start,
>  	if (WARN_ON(!gic->domain))
>  		return;
>  
> +	if (gic_nr == 0) {
>  #ifdef CONFIG_SMP
> -	set_smp_cross_call(gic_raise_softirq);
> -	register_cpu_notifier(&gic_cpu_notifier);
> +		set_smp_cross_call(gic_raise_softirq);
> +		register_cpu_notifier(&gic_cpu_notifier);
>  #endif
> -
> -	set_handle_irq(gic_handle_irq);
> +		set_handle_irq(gic_handle_irq);
> +	}
>  
>  	gic_chip.flags |= gic_arch_extn.flags;
>  	gic_dist_init(gic);
>