* [PATCH] ARM: keystone: remove hand-coded smc instruction @ 2013-06-21 20:28 Arnd Bergmann 2013-06-21 20:35 ` Arnd Bergmann 0 siblings, 1 reply; 15+ messages in thread From: Arnd Bergmann @ 2013-06-21 20:28 UTC (permalink / raw) To: linux-arm-kernel This lets us build keystone with CONFIG_THUMB2_KERNEL enabled, without the patch we get this error: Error: cannot determine Thumb instruction size. Use .inst.n/.inst.w instead This follows the same change for all other platforms done earlier. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Cc: Santosh Shilimkar <santosh.shilimkar@ti.com> diff --git a/arch/arm/mach-keystone/platsmp.c b/arch/arm/mach-keystone/platsmp.c index 630ab3bd..1800c33 100644 --- a/arch/arm/mach-keystone/platsmp.c +++ b/arch/arm/mach-keystone/platsmp.c @@ -34,7 +34,7 @@ static int __cpuinit keystone_smp_boot_secondary(unsigned int cpu, "mov r0, #0\n" /* power on cmd */ "mov r1, %1\n" /* cpu */ "mov r2, %2\n" /* start */ - ".inst 0xe1600070\n" /* smc #0 */ + "smc #0\n" /* smc #0 */ "mov %0, r0\n" : "=r" (error) : "r"(cpu), "r"(start) ^ permalink raw reply related [flat|nested] 15+ messages in thread
* [PATCH] ARM: keystone: remove hand-coded smc instruction 2013-06-21 20:28 [PATCH] ARM: keystone: remove hand-coded smc instruction Arnd Bergmann @ 2013-06-21 20:35 ` Arnd Bergmann 2013-06-21 20:49 ` Santosh Shilimkar 0 siblings, 1 reply; 15+ messages in thread From: Arnd Bergmann @ 2013-06-21 20:35 UTC (permalink / raw) To: linux-arm-kernel On Friday 21 June 2013, Arnd Bergmann wrote: > This lets us build keystone with CONFIG_THUMB2_KERNEL enabled, > without the patch we get this error: > > Error: cannot determine Thumb instruction size. Use .inst.n/.inst.w instead > > This follows the same change for all other platforms done > earlier. > > Signed-off-by: Arnd Bergmann <arnd@arndb.de> > Cc: Santosh Shilimkar <santosh.shilimkar@ti.com> > > diff --git a/arch/arm/mach-keystone/platsmp.c b/arch/arm/mach-keystone/platsmp.c > index 630ab3bd..1800c33 100644 > --- a/arch/arm/mach-keystone/platsmp.c > +++ b/arch/arm/mach-keystone/platsmp.c > @@ -34,7 +34,7 @@ static int __cpuinit keystone_smp_boot_secondary(unsigned int cpu, > "mov r0, #0\n" /* power on cmd */ > "mov r1, %1\n" /* cpu */ > "mov r2, %2\n" /* start */ > - ".inst 0xe1600070\n" /* smc #0 */ > + "smc #0\n" /* smc #0 */ > "mov %0, r0\n" > : "=r" (error) > : "r"(cpu), "r"(start) Ah, damm, now I get this error for building an ARMv6+ARMv7 combined kernel: /tmp/ccSWHCik.s:55: Error: selected processor does not support ARM mode `smc #0' I'll add a -march=armv7-a gcc flag as well. Arnd ^ permalink raw reply [flat|nested] 15+ messages in thread
* [PATCH] ARM: keystone: remove hand-coded smc instruction 2013-06-21 20:35 ` Arnd Bergmann @ 2013-06-21 20:49 ` Santosh Shilimkar 2013-06-21 21:13 ` Arnd Bergmann 2013-06-25 14:07 ` Dave Martin 0 siblings, 2 replies; 15+ messages in thread From: Santosh Shilimkar @ 2013-06-21 20:49 UTC (permalink / raw) To: linux-arm-kernel On Friday 21 June 2013 04:35 PM, Arnd Bergmann wrote: > On Friday 21 June 2013, Arnd Bergmann wrote: >> This lets us build keystone with CONFIG_THUMB2_KERNEL enabled, >> without the patch we get this error: >> >> Error: cannot determine Thumb instruction size. Use .inst.n/.inst.w instead >> >> This follows the same change for all other platforms done >> earlier. >> >> Signed-off-by: Arnd Bergmann <arnd@arndb.de> >> Cc: Santosh Shilimkar <santosh.shilimkar@ti.com> >> >> diff --git a/arch/arm/mach-keystone/platsmp.c b/arch/arm/mach-keystone/platsmp.c >> index 630ab3bd..1800c33 100644 >> --- a/arch/arm/mach-keystone/platsmp.c >> +++ b/arch/arm/mach-keystone/platsmp.c >> @@ -34,7 +34,7 @@ static int __cpuinit keystone_smp_boot_secondary(unsigned int cpu, >> "mov r0, #0\n" /* power on cmd */ >> "mov r1, %1\n" /* cpu */ >> "mov r2, %2\n" /* start */ >> - ".inst 0xe1600070\n" /* smc #0 */ >> + "smc #0\n" /* smc #0 */ >> "mov %0, r0\n" >> : "=r" (error) >> : "r"(cpu), "r"(start) > > Ah, damm, now I get this error for building an ARMv6+ARMv7 combined kernel: > > /tmp/ccSWHCik.s:55: Error: selected processor does not support ARM mode `smc #0' > > I'll add a -march=armv7-a gcc flag as well. > I was just typing about the error. I started with smc first but then hit the below one which lead me to write an opcode. I couldn't compile c file for v7 only build and hence letf it in encoded format. I will be moving this code to separate asm file along with other smc API support. Regards, Santosh ^ permalink raw reply [flat|nested] 15+ messages in thread
* [PATCH] ARM: keystone: remove hand-coded smc instruction 2013-06-21 20:49 ` Santosh Shilimkar @ 2013-06-21 21:13 ` Arnd Bergmann 2013-06-21 21:20 ` Santosh Shilimkar 2013-06-25 14:07 ` Dave Martin 1 sibling, 1 reply; 15+ messages in thread From: Arnd Bergmann @ 2013-06-21 21:13 UTC (permalink / raw) To: linux-arm-kernel On Friday 21 June 2013, Santosh Shilimkar wrote: > On Friday 21 June 2013 04:35 PM, Arnd Bergmann wrote: > > On Friday 21 June 2013, Arnd Bergmann wrote: > >> This lets us build keystone with CONFIG_THUMB2_KERNEL enabled, > >> without the patch we get this error: > >> > >> Error: cannot determine Thumb instruction size. Use .inst.n/.inst.w instead > >> > >> This follows the same change for all other platforms done > >> earlier. > >> > >> Signed-off-by: Arnd Bergmann <arnd@arndb.de> > >> Cc: Santosh Shilimkar <santosh.shilimkar@ti.com> > >> > >> diff --git a/arch/arm/mach-keystone/platsmp.c b/arch/arm/mach-keystone/platsmp.c > >> index 630ab3bd..1800c33 100644 > >> --- a/arch/arm/mach-keystone/platsmp.c > >> +++ b/arch/arm/mach-keystone/platsmp.c > >> @@ -34,7 +34,7 @@ static int __cpuinit keystone_smp_boot_secondary(unsigned int cpu, > >> "mov r0, #0\n" /* power on cmd */ > >> "mov r1, %1\n" /* cpu */ > >> "mov r2, %2\n" /* start */ > >> - ".inst 0xe1600070\n" /* smc #0 */ > >> + "smc #0\n" /* smc #0 */ > >> "mov %0, r0\n" > >> : "=r" (error) > >> : "r"(cpu), "r"(start) > > > > Ah, damm, now I get this error for building an ARMv6+ARMv7 combined kernel: > > > > /tmp/ccSWHCik.s:55: Error: selected processor does not support ARM mode `smc #0' > > > > I'll add a -march=armv7-a gcc flag as well. > > > I was just typing about the error. I started with smc first but then > hit the below one which lead me to write an opcode. I couldn't compile c file > for v7 only build and hence letf it in encoded format. > > I will be moving this code to separate asm file along with other smc > API support. > Ok, I'll wait for a patch from you then. My second attempt to fix it up also didn't work. Arnd ^ permalink raw reply [flat|nested] 15+ messages in thread
* [PATCH] ARM: keystone: remove hand-coded smc instruction 2013-06-21 21:13 ` Arnd Bergmann @ 2013-06-21 21:20 ` Santosh Shilimkar 2013-06-21 21:41 ` Arnd Bergmann 0 siblings, 1 reply; 15+ messages in thread From: Santosh Shilimkar @ 2013-06-21 21:20 UTC (permalink / raw) To: linux-arm-kernel On Friday 21 June 2013 05:13 PM, Arnd Bergmann wrote: > On Friday 21 June 2013, Santosh Shilimkar wrote: >> On Friday 21 June 2013 04:35 PM, Arnd Bergmann wrote: >>> On Friday 21 June 2013, Arnd Bergmann wrote: >>>> This lets us build keystone with CONFIG_THUMB2_KERNEL enabled, >>>> without the patch we get this error: >>>> >>>> Error: cannot determine Thumb instruction size. Use .inst.n/.inst.w instead >>>> >>>> This follows the same change for all other platforms done >>>> earlier. >>>> >>>> Signed-off-by: Arnd Bergmann <arnd@arndb.de> >>>> Cc: Santosh Shilimkar <santosh.shilimkar@ti.com> >>>> >>>> diff --git a/arch/arm/mach-keystone/platsmp.c b/arch/arm/mach-keystone/platsmp.c >>>> index 630ab3bd..1800c33 100644 >>>> --- a/arch/arm/mach-keystone/platsmp.c >>>> +++ b/arch/arm/mach-keystone/platsmp.c >>>> @@ -34,7 +34,7 @@ static int __cpuinit keystone_smp_boot_secondary(unsigned int cpu, >>>> "mov r0, #0\n" /* power on cmd */ >>>> "mov r1, %1\n" /* cpu */ >>>> "mov r2, %2\n" /* start */ >>>> - ".inst 0xe1600070\n" /* smc #0 */ >>>> + "smc #0\n" /* smc #0 */ >>>> "mov %0, r0\n" >>>> : "=r" (error) >>>> : "r"(cpu), "r"(start) >>> >>> Ah, damm, now I get this error for building an ARMv6+ARMv7 combined kernel: >>> >>> /tmp/ccSWHCik.s:55: Error: selected processor does not support ARM mode `smc #0' >>> >>> I'll add a -march=armv7-a gcc flag as well. >>> >> I was just typing about the error. I started with smc first but then >> hit the below one which lead me to write an opcode. I couldn't compile c file >> for v7 only build and hence letf it in encoded format. >> >> I will be moving this code to separate asm file along with other smc >> API support. >> > > Ok, I'll wait for a patch from you then. My second attempt to fix it > up also didn't work. > I was curious how you will fix that for a c file. Just to be clear, I was planning to do that in 3.11-rcx/3.12 time. Let me know if it needs to be done earlier than that. Regards, Santosh ^ permalink raw reply [flat|nested] 15+ messages in thread
* [PATCH] ARM: keystone: remove hand-coded smc instruction 2013-06-21 21:20 ` Santosh Shilimkar @ 2013-06-21 21:41 ` Arnd Bergmann 2013-06-21 22:54 ` Santosh Shilimkar 0 siblings, 1 reply; 15+ messages in thread From: Arnd Bergmann @ 2013-06-21 21:41 UTC (permalink / raw) To: linux-arm-kernel On Friday 21 June 2013, Santosh Shilimkar wrote: > > > I was curious how you will fix that for a c file. > Just to be clear, I was planning to do that in 3.11-rcx/3.12 > time. Let me know if it needs to be done earlier than that. It breaks randconfig builds on arm-soc at the moment, so I'd like the fix as early as possible for 3.11. Arnd ^ permalink raw reply [flat|nested] 15+ messages in thread
* [PATCH] ARM: keystone: remove hand-coded smc instruction 2013-06-21 21:41 ` Arnd Bergmann @ 2013-06-21 22:54 ` Santosh Shilimkar 2013-06-25 14:13 ` Dave Martin 0 siblings, 1 reply; 15+ messages in thread From: Santosh Shilimkar @ 2013-06-21 22:54 UTC (permalink / raw) To: linux-arm-kernel On Friday 21 June 2013 05:41 PM, Arnd Bergmann wrote: > On Friday 21 June 2013, Santosh Shilimkar wrote: >>> >> I was curious how you will fix that for a c file. >> Just to be clear, I was planning to do that in 3.11-rcx/3.12 >> time. Let me know if it needs to be done earlier than that. > > It breaks randconfig builds on arm-soc at the moment, so I'd > like the fix as early as possible for 3.11. > Ok, fix is at end of the email. Let me know if it makes to pass both the builds now. I have build and boot tested both ARM and THUMB2 builds on Keystone board. Regards, Santosh >From 05d6a5b6cad624fb3791e8c1f8eb7c774f0790d9 Mon Sep 17 00:00:00 2001 From: Santosh Shilimkar <santosh.shilimkar@ti.com> Date: Fri, 21 Jun 2013 18:35:32 -0400 Subject: [PATCH] ARM: keystone: Move CPU bringup code to dedicated asm file Because of inline asm usage in platsmp.c, smc instruction creates build failure for ARM V6+V7 build where as using instruction encoding for smc breaks the thumb2 build. So move the code snippet to separate asm file and mark it with 'armv7-a$(plus_sec)' to avoid any build issues. Cc: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> --- arch/arm/mach-keystone/Makefile | 6 +++++- arch/arm/mach-keystone/keystone.h | 6 ++++++ arch/arm/mach-keystone/platsmp.c | 15 +++------------ arch/arm/mach-keystone/smc.S | 29 +++++++++++++++++++++++++++++ 4 files changed, 43 insertions(+), 13 deletions(-) create mode 100644 arch/arm/mach-keystone/smc.S diff --git a/arch/arm/mach-keystone/Makefile b/arch/arm/mach-keystone/Makefile index 3f6b8ab..ddc52b0 100644 --- a/arch/arm/mach-keystone/Makefile +++ b/arch/arm/mach-keystone/Makefile @@ -1,2 +1,6 @@ -obj-y := keystone.o +obj-y := keystone.o smc.o + +plus_sec := $(call as-instr,.arch_extension sec,+sec) +AFLAGS_smc.o :=-Wa,-march=armv7-a$(plus_sec) + obj-$(CONFIG_SMP) += platsmp.o diff --git a/arch/arm/mach-keystone/keystone.h b/arch/arm/mach-keystone/keystone.h index 43a1b47..60bef9d 100644 --- a/arch/arm/mach-keystone/keystone.h +++ b/arch/arm/mach-keystone/keystone.h @@ -11,7 +11,13 @@ #ifndef __KEYSTONE_H__ #define __KEYSTONE_H__ +#define KEYSTONE_MON_CPU_UP_IDX 0x00 + +#ifndef __ASSEMBLER__ + extern struct smp_operations keystone_smp_ops; extern void secondary_startup(void); +extern u32 keystone_cpu_smc(u32 command, u32 cpu, u32 addr); +#endif /* __ASSEMBLER__ */ #endif /* __KEYSTONE_H__ */ diff --git a/arch/arm/mach-keystone/platsmp.c b/arch/arm/mach-keystone/platsmp.c index 630ab3b..1d4181e 100644 --- a/arch/arm/mach-keystone/platsmp.c +++ b/arch/arm/mach-keystone/platsmp.c @@ -30,18 +30,9 @@ static int __cpuinit keystone_smp_boot_secondary(unsigned int cpu, pr_debug("keystone-smp: booting cpu %d, vector %08lx\n", cpu, start); - asm volatile ( - "mov r0, #0\n" /* power on cmd */ - "mov r1, %1\n" /* cpu */ - "mov r2, %2\n" /* start */ - ".inst 0xe1600070\n" /* smc #0 */ - "mov %0, r0\n" - : "=r" (error) - : "r"(cpu), "r"(start) - : "cc", "r0", "r1", "r2", "memory" - ); - - pr_debug("keystone-smp: monitor returned %d\n", error); + error = keystone_cpu_smc(KEYSTONE_MON_CPU_UP_IDX, cpu, start); + if (error) + pr_err("CPU %d bringup failed with %d\n", cpu, error); return error; } diff --git a/arch/arm/mach-keystone/smc.S b/arch/arm/mach-keystone/smc.S new file mode 100644 index 0000000..9b9e4f7 --- /dev/null +++ b/arch/arm/mach-keystone/smc.S @@ -0,0 +1,29 @@ +/* + * Keystone Secure APIs + * + * Copyright (C) 2013 Texas Instruments, Inc. + * Santosh Shilimkar <santosh.shilimkar@ti.com> + * + * This program is free software,you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include <linux/linkage.h> + +/** + * u32 keystone_cpu_smc(u32 command, u32 cpu, u32 addr) + * + * Low level CPU monitor API + * @command: Monitor command. + * @cpu: CPU Number + * @addr: Kernel jump address for boot CPU + * + * Return: Non zero value on failure + */ +ENTRY(keystone_cpu_smc) + stmfd sp!, {r4-r12, lr} + smc #0 + dsb + ldmfd sp!, {r4-r12, pc} +ENDPROC(keystone_cpu_smc) -- 1.7.9.5 ^ permalink raw reply related [flat|nested] 15+ messages in thread
* [PATCH] ARM: keystone: remove hand-coded smc instruction 2013-06-21 22:54 ` Santosh Shilimkar @ 2013-06-25 14:13 ` Dave Martin 2013-06-25 14:27 ` Santosh Shilimkar 0 siblings, 1 reply; 15+ messages in thread From: Dave Martin @ 2013-06-25 14:13 UTC (permalink / raw) To: linux-arm-kernel On Fri, Jun 21, 2013 at 06:54:47PM -0400, Santosh Shilimkar wrote: > On Friday 21 June 2013 05:41 PM, Arnd Bergmann wrote: > > On Friday 21 June 2013, Santosh Shilimkar wrote: > >>> > >> I was curious how you will fix that for a c file. > >> Just to be clear, I was planning to do that in 3.11-rcx/3.12 > >> time. Let me know if it needs to be done earlier than that. > > > > It breaks randconfig builds on arm-soc at the moment, so I'd > > like the fix as early as possible for 3.11. > > > Ok, fix is at end of the email. Let me know if it makes > to pass both the builds now. I have build and boot tested > both ARM and THUMB2 builds on Keystone board. > > Regards, > Santosh > > From 05d6a5b6cad624fb3791e8c1f8eb7c774f0790d9 Mon Sep 17 00:00:00 2001 > From: Santosh Shilimkar <santosh.shilimkar@ti.com> > Date: Fri, 21 Jun 2013 18:35:32 -0400 > Subject: [PATCH] ARM: keystone: Move CPU bringup code to dedicated asm file > > Because of inline asm usage in platsmp.c, smc instruction > creates build failure for ARM V6+V7 build where as using instruction > encoding for smc breaks the thumb2 build. > > So move the code snippet to separate asm file and mark > it with 'armv7-a$(plus_sec)' to avoid any build issues. > > Cc: Arnd Bergmann <arnd@arndb.de> > > Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> > --- > arch/arm/mach-keystone/Makefile | 6 +++++- > arch/arm/mach-keystone/keystone.h | 6 ++++++ > arch/arm/mach-keystone/platsmp.c | 15 +++------------ > arch/arm/mach-keystone/smc.S | 29 +++++++++++++++++++++++++++++ > 4 files changed, 43 insertions(+), 13 deletions(-) > create mode 100644 arch/arm/mach-keystone/smc.S > > diff --git a/arch/arm/mach-keystone/Makefile b/arch/arm/mach-keystone/Makefile > index 3f6b8ab..ddc52b0 100644 > --- a/arch/arm/mach-keystone/Makefile > +++ b/arch/arm/mach-keystone/Makefile > @@ -1,2 +1,6 @@ > -obj-y := keystone.o > +obj-y := keystone.o smc.o > + > +plus_sec := $(call as-instr,.arch_extension sec,+sec) > +AFLAGS_smc.o :=-Wa,-march=armv7-a$(plus_sec) > + > obj-$(CONFIG_SMP) += platsmp.o > diff --git a/arch/arm/mach-keystone/keystone.h b/arch/arm/mach-keystone/keystone.h > index 43a1b47..60bef9d 100644 > --- a/arch/arm/mach-keystone/keystone.h > +++ b/arch/arm/mach-keystone/keystone.h > @@ -11,7 +11,13 @@ > #ifndef __KEYSTONE_H__ > #define __KEYSTONE_H__ > > +#define KEYSTONE_MON_CPU_UP_IDX 0x00 > + > +#ifndef __ASSEMBLER__ > + > extern struct smp_operations keystone_smp_ops; > extern void secondary_startup(void); > +extern u32 keystone_cpu_smc(u32 command, u32 cpu, u32 addr); > > +#endif /* __ASSEMBLER__ */ > #endif /* __KEYSTONE_H__ */ > diff --git a/arch/arm/mach-keystone/platsmp.c b/arch/arm/mach-keystone/platsmp.c > index 630ab3b..1d4181e 100644 > --- a/arch/arm/mach-keystone/platsmp.c > +++ b/arch/arm/mach-keystone/platsmp.c > @@ -30,18 +30,9 @@ static int __cpuinit keystone_smp_boot_secondary(unsigned int cpu, > pr_debug("keystone-smp: booting cpu %d, vector %08lx\n", > cpu, start); > > - asm volatile ( > - "mov r0, #0\n" /* power on cmd */ > - "mov r1, %1\n" /* cpu */ > - "mov r2, %2\n" /* start */ > - ".inst 0xe1600070\n" /* smc #0 */ > - "mov %0, r0\n" > - : "=r" (error) > - : "r"(cpu), "r"(start) > - : "cc", "r0", "r1", "r2", "memory" > - ); > - > - pr_debug("keystone-smp: monitor returned %d\n", error); > + error = keystone_cpu_smc(KEYSTONE_MON_CPU_UP_IDX, cpu, start); > + if (error) > + pr_err("CPU %d bringup failed with %d\n", cpu, error); > > return error; > } > diff --git a/arch/arm/mach-keystone/smc.S b/arch/arm/mach-keystone/smc.S > new file mode 100644 > index 0000000..9b9e4f7 > --- /dev/null > +++ b/arch/arm/mach-keystone/smc.S > @@ -0,0 +1,29 @@ > +/* > + * Keystone Secure APIs > + * > + * Copyright (C) 2013 Texas Instruments, Inc. > + * Santosh Shilimkar <santosh.shilimkar@ti.com> > + * > + * This program is free software,you can redistribute it and/or modify > + * it under the terms of the GNU General Public License version 2 as > + * published by the Free Software Foundation. > + */ > + > +#include <linux/linkage.h> > + > +/** > + * u32 keystone_cpu_smc(u32 command, u32 cpu, u32 addr) > + * > + * Low level CPU monitor API > + * @command: Monitor command. > + * @cpu: CPU Number > + * @addr: Kernel jump address for boot CPU > + * > + * Return: Non zero value on failure > + */ Oops, looks like I missed the final mail on this thread. Ignore my previous mail. I still think it would be a good idea to try to consolidate all these trivial SMC wrappers, but this remains debatable. Anyway, this looks like it should work, except: > +ENTRY(keystone_cpu_smc) > + stmfd sp!, {r4-r12, lr} > + smc #0 > + dsb What's this DSB for? (You didn't have it in the inline asm version) > + ldmfd sp!, {r4-r12, pc} > +ENDPROC(keystone_cpu_smc) r12 is caller-save btw; you don't need to preserve it. Cheers ---Dave ^ permalink raw reply [flat|nested] 15+ messages in thread
* [PATCH] ARM: keystone: remove hand-coded smc instruction 2013-06-25 14:13 ` Dave Martin @ 2013-06-25 14:27 ` Santosh Shilimkar 2013-06-25 14:32 ` Dave Martin 0 siblings, 1 reply; 15+ messages in thread From: Santosh Shilimkar @ 2013-06-25 14:27 UTC (permalink / raw) To: linux-arm-kernel On Tuesday 25 June 2013 10:13 AM, Dave Martin wrote: > On Fri, Jun 21, 2013 at 06:54:47PM -0400, Santosh Shilimkar wrote: >> On Friday 21 June 2013 05:41 PM, Arnd Bergmann wrote: >>> On Friday 21 June 2013, Santosh Shilimkar wrote: >>>>> >>>> I was curious how you will fix that for a c file. >>>> Just to be clear, I was planning to do that in 3.11-rcx/3.12 >>>> time. Let me know if it needs to be done earlier than that. >>> >>> It breaks randconfig builds on arm-soc at the moment, so I'd >>> like the fix as early as possible for 3.11. >>> >> Ok, fix is at end of the email. Let me know if it makes >> to pass both the builds now. I have build and boot tested >> both ARM and THUMB2 builds on Keystone board. >> >> Regards, >> Santosh >> >> From 05d6a5b6cad624fb3791e8c1f8eb7c774f0790d9 Mon Sep 17 00:00:00 2001 >> From: Santosh Shilimkar <santosh.shilimkar@ti.com> >> Date: Fri, 21 Jun 2013 18:35:32 -0400 >> Subject: [PATCH] ARM: keystone: Move CPU bringup code to dedicated asm file >> >> Because of inline asm usage in platsmp.c, smc instruction >> creates build failure for ARM V6+V7 build where as using instruction >> encoding for smc breaks the thumb2 build. >> >> So move the code snippet to separate asm file and mark >> it with 'armv7-a$(plus_sec)' to avoid any build issues. >> >> Cc: Arnd Bergmann <arnd@arndb.de> >> >> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> >> --- [..] >> diff --git a/arch/arm/mach-keystone/smc.S b/arch/arm/mach-keystone/smc.S >> new file mode 100644 >> index 0000000..9b9e4f7 >> --- /dev/null >> +++ b/arch/arm/mach-keystone/smc.S >> @@ -0,0 +1,29 @@ >> +/* >> + * Keystone Secure APIs >> + * >> + * Copyright (C) 2013 Texas Instruments, Inc. >> + * Santosh Shilimkar <santosh.shilimkar@ti.com> >> + * >> + * This program is free software,you can redistribute it and/or modify >> + * it under the terms of the GNU General Public License version 2 as >> + * published by the Free Software Foundation. >> + */ >> + >> +#include <linux/linkage.h> >> + >> +/** >> + * u32 keystone_cpu_smc(u32 command, u32 cpu, u32 addr) >> + * >> + * Low level CPU monitor API >> + * @command: Monitor command. >> + * @cpu: CPU Number >> + * @addr: Kernel jump address for boot CPU >> + * >> + * Return: Non zero value on failure >> + */ > > Oops, looks like I missed the final mail on this thread. Ignore my > previous mail. > > I still think it would be a good idea to try to consolidate all these > trivial SMC wrappers, but this remains debatable. > > > > Anyway, this looks like it should work, except: > >> +ENTRY(keystone_cpu_smc) >> + stmfd sp!, {r4-r12, lr} >> + smc #0 >> + dsb > > What's this DSB for? (You didn't have it in the inline asm version) > Just to drain the write buffer before resuming on non-secure side. I actually added it while moving it to asm file. >> + ldmfd sp!, {r4-r12, pc} >> +ENDPROC(keystone_cpu_smc) > > r12 is caller-save btw; you don't need to preserve it. > Indeed. Will update it while adding some more SMC APIs. Its not harmful as such for now. Regards, Santosh ^ permalink raw reply [flat|nested] 15+ messages in thread
* [PATCH] ARM: keystone: remove hand-coded smc instruction 2013-06-25 14:27 ` Santosh Shilimkar @ 2013-06-25 14:32 ` Dave Martin 2013-06-25 14:40 ` Santosh Shilimkar 0 siblings, 1 reply; 15+ messages in thread From: Dave Martin @ 2013-06-25 14:32 UTC (permalink / raw) To: linux-arm-kernel On Tue, Jun 25, 2013 at 10:27:11AM -0400, Santosh Shilimkar wrote: > On Tuesday 25 June 2013 10:13 AM, Dave Martin wrote: > > On Fri, Jun 21, 2013 at 06:54:47PM -0400, Santosh Shilimkar wrote: > >> On Friday 21 June 2013 05:41 PM, Arnd Bergmann wrote: > >>> On Friday 21 June 2013, Santosh Shilimkar wrote: > >>>>> > >>>> I was curious how you will fix that for a c file. > >>>> Just to be clear, I was planning to do that in 3.11-rcx/3.12 > >>>> time. Let me know if it needs to be done earlier than that. > >>> > >>> It breaks randconfig builds on arm-soc at the moment, so I'd > >>> like the fix as early as possible for 3.11. > >>> > >> Ok, fix is at end of the email. Let me know if it makes > >> to pass both the builds now. I have build and boot tested > >> both ARM and THUMB2 builds on Keystone board. > >> > >> Regards, > >> Santosh > >> > >> From 05d6a5b6cad624fb3791e8c1f8eb7c774f0790d9 Mon Sep 17 00:00:00 2001 > >> From: Santosh Shilimkar <santosh.shilimkar@ti.com> > >> Date: Fri, 21 Jun 2013 18:35:32 -0400 > >> Subject: [PATCH] ARM: keystone: Move CPU bringup code to dedicated asm file > >> > >> Because of inline asm usage in platsmp.c, smc instruction > >> creates build failure for ARM V6+V7 build where as using instruction > >> encoding for smc breaks the thumb2 build. > >> > >> So move the code snippet to separate asm file and mark > >> it with 'armv7-a$(plus_sec)' to avoid any build issues. > >> > >> Cc: Arnd Bergmann <arnd@arndb.de> > >> > >> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> > >> --- > > [..] > > >> diff --git a/arch/arm/mach-keystone/smc.S b/arch/arm/mach-keystone/smc.S > >> new file mode 100644 > >> index 0000000..9b9e4f7 > >> --- /dev/null > >> +++ b/arch/arm/mach-keystone/smc.S > >> @@ -0,0 +1,29 @@ > >> +/* > >> + * Keystone Secure APIs > >> + * > >> + * Copyright (C) 2013 Texas Instruments, Inc. > >> + * Santosh Shilimkar <santosh.shilimkar@ti.com> > >> + * > >> + * This program is free software,you can redistribute it and/or modify > >> + * it under the terms of the GNU General Public License version 2 as > >> + * published by the Free Software Foundation. > >> + */ > >> + > >> +#include <linux/linkage.h> > >> + > >> +/** > >> + * u32 keystone_cpu_smc(u32 command, u32 cpu, u32 addr) > >> + * > >> + * Low level CPU monitor API > >> + * @command: Monitor command. > >> + * @cpu: CPU Number > >> + * @addr: Kernel jump address for boot CPU > >> + * > >> + * Return: Non zero value on failure > >> + */ > > > > Oops, looks like I missed the final mail on this thread. Ignore my > > previous mail. > > > > I still think it would be a good idea to try to consolidate all these > > trivial SMC wrappers, but this remains debatable. > > > > > > > > Anyway, this looks like it should work, except: > > > >> +ENTRY(keystone_cpu_smc) > >> + stmfd sp!, {r4-r12, lr} > >> + smc #0 > >> + dsb > > > > What's this DSB for? (You didn't have it in the inline asm version) > > > Just to drain the write buffer before resuming on non-secure side. Why do you need to do that? > I actually added it while moving it to asm file. > > >> + ldmfd sp!, {r4-r12, pc} > >> +ENDPROC(keystone_cpu_smc) > > > > r12 is caller-save btw; you don't need to preserve it. > > > Indeed. Will update it while adding some more SMC APIs. > Its not harmful as such for now. If you could change that as soon as you make another modification to this file, that would be appreciated. These code snippets get cut and pasted recklessly. Cheers ---Dave ^ permalink raw reply [flat|nested] 15+ messages in thread
* [PATCH] ARM: keystone: remove hand-coded smc instruction 2013-06-25 14:32 ` Dave Martin @ 2013-06-25 14:40 ` Santosh Shilimkar 2013-06-25 15:39 ` Dave Martin 0 siblings, 1 reply; 15+ messages in thread From: Santosh Shilimkar @ 2013-06-25 14:40 UTC (permalink / raw) To: linux-arm-kernel On Tuesday 25 June 2013 10:32 AM, Dave Martin wrote: > On Tue, Jun 25, 2013 at 10:27:11AM -0400, Santosh Shilimkar wrote: >> On Tuesday 25 June 2013 10:13 AM, Dave Martin wrote: >>> On Fri, Jun 21, 2013 at 06:54:47PM -0400, Santosh Shilimkar wrote: >>>> On Friday 21 June 2013 05:41 PM, Arnd Bergmann wrote: >>>>> On Friday 21 June 2013, Santosh Shilimkar wrote: >>>>>>> >>>>>> I was curious how you will fix that for a c file. >>>>>> Just to be clear, I was planning to do that in 3.11-rcx/3.12 >>>>>> time. Let me know if it needs to be done earlier than that. >>>>> >>>>> It breaks randconfig builds on arm-soc at the moment, so I'd >>>>> like the fix as early as possible for 3.11. >>>>> >>>> Ok, fix is at end of the email. Let me know if it makes >>>> to pass both the builds now. I have build and boot tested >>>> both ARM and THUMB2 builds on Keystone board. >>>> >>>> Regards, >>>> Santosh >>>> >>>> From 05d6a5b6cad624fb3791e8c1f8eb7c774f0790d9 Mon Sep 17 00:00:00 2001 >>>> From: Santosh Shilimkar <santosh.shilimkar@ti.com> >>>> Date: Fri, 21 Jun 2013 18:35:32 -0400 >>>> Subject: [PATCH] ARM: keystone: Move CPU bringup code to dedicated asm file >>>> >>>> Because of inline asm usage in platsmp.c, smc instruction >>>> creates build failure for ARM V6+V7 build where as using instruction >>>> encoding for smc breaks the thumb2 build. >>>> >>>> So move the code snippet to separate asm file and mark >>>> it with 'armv7-a$(plus_sec)' to avoid any build issues. >>>> >>>> Cc: Arnd Bergmann <arnd@arndb.de> >>>> >>>> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> >>>> --- >> >> [..] >> >>>> diff --git a/arch/arm/mach-keystone/smc.S b/arch/arm/mach-keystone/smc.S >>>> new file mode 100644 >>>> index 0000000..9b9e4f7 >>>> --- /dev/null >>>> +++ b/arch/arm/mach-keystone/smc.S >>>> @@ -0,0 +1,29 @@ >>>> +/* >>>> + * Keystone Secure APIs >>>> + * >>>> + * Copyright (C) 2013 Texas Instruments, Inc. >>>> + * Santosh Shilimkar <santosh.shilimkar@ti.com> >>>> + * >>>> + * This program is free software,you can redistribute it and/or modify >>>> + * it under the terms of the GNU General Public License version 2 as >>>> + * published by the Free Software Foundation. >>>> + */ >>>> + >>>> +#include <linux/linkage.h> >>>> + >>>> +/** >>>> + * u32 keystone_cpu_smc(u32 command, u32 cpu, u32 addr) >>>> + * >>>> + * Low level CPU monitor API >>>> + * @command: Monitor command. >>>> + * @cpu: CPU Number >>>> + * @addr: Kernel jump address for boot CPU >>>> + * >>>> + * Return: Non zero value on failure >>>> + */ >>> >>> Oops, looks like I missed the final mail on this thread. Ignore my >>> previous mail. >>> >>> I still think it would be a good idea to try to consolidate all these >>> trivial SMC wrappers, but this remains debatable. >>> >>> >>> >>> Anyway, this looks like it should work, except: >>> >>>> +ENTRY(keystone_cpu_smc) >>>> + stmfd sp!, {r4-r12, lr} >>>> + smc #0 >>>> + dsb >>> >>> What's this DSB for? (You didn't have it in the inline asm version) >>> >> Just to drain the write buffer before resuming on non-secure side. > > Why do you need to do that? > To commit any secure side pending writes. I don't remember exactly the issues but I remember facing issues in power management sequencing with SMC calls in between. That time a dsb did the trick. In fact I use to keep 1 before SMC and 1 after. >> I actually added it while moving it to asm file. >> >>>> + ldmfd sp!, {r4-r12, pc} >>>> +ENDPROC(keystone_cpu_smc) >>> >>> r12 is caller-save btw; you don't need to preserve it. >>> >> Indeed. Will update it while adding some more SMC APIs. >> Its not harmful as such for now. > > If you could change that as soon as you make another modification to > this file, that would be appreciated. These code snippets get > cut and pasted recklessly. > Yep. Thats what I mean. Regards, Santosh ^ permalink raw reply [flat|nested] 15+ messages in thread
* [PATCH] ARM: keystone: remove hand-coded smc instruction 2013-06-25 14:40 ` Santosh Shilimkar @ 2013-06-25 15:39 ` Dave Martin 2013-06-25 15:51 ` Santosh Shilimkar 0 siblings, 1 reply; 15+ messages in thread From: Dave Martin @ 2013-06-25 15:39 UTC (permalink / raw) To: linux-arm-kernel On Tue, Jun 25, 2013 at 10:40:57AM -0400, Santosh Shilimkar wrote: > On Tuesday 25 June 2013 10:32 AM, Dave Martin wrote: > > On Tue, Jun 25, 2013 at 10:27:11AM -0400, Santosh Shilimkar wrote: > >> On Tuesday 25 June 2013 10:13 AM, Dave Martin wrote: > >>> On Fri, Jun 21, 2013 at 06:54:47PM -0400, Santosh Shilimkar wrote: > >>>> On Friday 21 June 2013 05:41 PM, Arnd Bergmann wrote: > >>>>> On Friday 21 June 2013, Santosh Shilimkar wrote: > >>>>>>> > >>>>>> I was curious how you will fix that for a c file. > >>>>>> Just to be clear, I was planning to do that in 3.11-rcx/3.12 > >>>>>> time. Let me know if it needs to be done earlier than that. > >>>>> > >>>>> It breaks randconfig builds on arm-soc at the moment, so I'd > >>>>> like the fix as early as possible for 3.11. > >>>>> > >>>> Ok, fix is at end of the email. Let me know if it makes > >>>> to pass both the builds now. I have build and boot tested > >>>> both ARM and THUMB2 builds on Keystone board. > >>>> > >>>> Regards, > >>>> Santosh > >>>> > >>>> From 05d6a5b6cad624fb3791e8c1f8eb7c774f0790d9 Mon Sep 17 00:00:00 2001 > >>>> From: Santosh Shilimkar <santosh.shilimkar@ti.com> > >>>> Date: Fri, 21 Jun 2013 18:35:32 -0400 > >>>> Subject: [PATCH] ARM: keystone: Move CPU bringup code to dedicated asm file > >>>> > >>>> Because of inline asm usage in platsmp.c, smc instruction > >>>> creates build failure for ARM V6+V7 build where as using instruction > >>>> encoding for smc breaks the thumb2 build. > >>>> > >>>> So move the code snippet to separate asm file and mark > >>>> it with 'armv7-a$(plus_sec)' to avoid any build issues. > >>>> > >>>> Cc: Arnd Bergmann <arnd@arndb.de> > >>>> > >>>> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> > >>>> --- > >> > >> [..] > >> > >>>> diff --git a/arch/arm/mach-keystone/smc.S b/arch/arm/mach-keystone/smc.S > >>>> new file mode 100644 > >>>> index 0000000..9b9e4f7 > >>>> --- /dev/null > >>>> +++ b/arch/arm/mach-keystone/smc.S > >>>> @@ -0,0 +1,29 @@ > >>>> +/* > >>>> + * Keystone Secure APIs > >>>> + * > >>>> + * Copyright (C) 2013 Texas Instruments, Inc. > >>>> + * Santosh Shilimkar <santosh.shilimkar@ti.com> > >>>> + * > >>>> + * This program is free software,you can redistribute it and/or modify > >>>> + * it under the terms of the GNU General Public License version 2 as > >>>> + * published by the Free Software Foundation. > >>>> + */ > >>>> + > >>>> +#include <linux/linkage.h> > >>>> + > >>>> +/** > >>>> + * u32 keystone_cpu_smc(u32 command, u32 cpu, u32 addr) > >>>> + * > >>>> + * Low level CPU monitor API > >>>> + * @command: Monitor command. > >>>> + * @cpu: CPU Number > >>>> + * @addr: Kernel jump address for boot CPU > >>>> + * > >>>> + * Return: Non zero value on failure > >>>> + */ > >>> > >>> Oops, looks like I missed the final mail on this thread. Ignore my > >>> previous mail. > >>> > >>> I still think it would be a good idea to try to consolidate all these > >>> trivial SMC wrappers, but this remains debatable. > >>> > >>> > >>> > >>> Anyway, this looks like it should work, except: > >>> > >>>> +ENTRY(keystone_cpu_smc) > >>>> + stmfd sp!, {r4-r12, lr} > >>>> + smc #0 > >>>> + dsb > >>> > >>> What's this DSB for? (You didn't have it in the inline asm version) > >>> > >> Just to drain the write buffer before resuming on non-secure side. > > > > Why do you need to do that? > > > To commit any secure side pending writes. I don't remember exactly the > issues but I remember facing issues in power management sequencing with > SMC calls in between. That time a dsb did the trick. In fact I use to > keep 1 before SMC and 1 after. Can we at least have a comment (as recommended in Documentation/development-process/4.Coding)? We don't want other people reading this and concluding that SMC always needs barriers -- in general, this shouldn't be necessary and could indicate bugs lurking somewhere. Cheers ---Dave ^ permalink raw reply [flat|nested] 15+ messages in thread
* [PATCH] ARM: keystone: remove hand-coded smc instruction 2013-06-25 15:39 ` Dave Martin @ 2013-06-25 15:51 ` Santosh Shilimkar 0 siblings, 0 replies; 15+ messages in thread From: Santosh Shilimkar @ 2013-06-25 15:51 UTC (permalink / raw) To: linux-arm-kernel On Tuesday 25 June 2013 11:39 AM, Dave Martin wrote: > On Tue, Jun 25, 2013 at 10:40:57AM -0400, Santosh Shilimkar wrote: >> On Tuesday 25 June 2013 10:32 AM, Dave Martin wrote: >>> On Tue, Jun 25, 2013 at 10:27:11AM -0400, Santosh Shilimkar wrote: >>>> On Tuesday 25 June 2013 10:13 AM, Dave Martin wrote: >>>>> On Fri, Jun 21, 2013 at 06:54:47PM -0400, Santosh Shilimkar wrote: >>>>>> On Friday 21 June 2013 05:41 PM, Arnd Bergmann wrote: >>>>>>> On Friday 21 June 2013, Santosh Shilimkar wrote: >>>>>>>>> >>>>>>>> I was curious how you will fix that for a c file. >>>>>>>> Just to be clear, I was planning to do that in 3.11-rcx/3.12 >>>>>>>> time. Let me know if it needs to be done earlier than that. >>>>>>> >>>>>>> It breaks randconfig builds on arm-soc at the moment, so I'd >>>>>>> like the fix as early as possible for 3.11. >>>>>>> >>>>>> Ok, fix is at end of the email. Let me know if it makes >>>>>> to pass both the builds now. I have build and boot tested >>>>>> both ARM and THUMB2 builds on Keystone board. >>>>>> >>>>>> Regards, >>>>>> Santosh >>>>>> >>>>>> From 05d6a5b6cad624fb3791e8c1f8eb7c774f0790d9 Mon Sep 17 00:00:00 2001 >>>>>> From: Santosh Shilimkar <santosh.shilimkar@ti.com> >>>>>> Date: Fri, 21 Jun 2013 18:35:32 -0400 >>>>>> Subject: [PATCH] ARM: keystone: Move CPU bringup code to dedicated asm file >>>>>> >>>>>> Because of inline asm usage in platsmp.c, smc instruction >>>>>> creates build failure for ARM V6+V7 build where as using instruction >>>>>> encoding for smc breaks the thumb2 build. >>>>>> >>>>>> So move the code snippet to separate asm file and mark >>>>>> it with 'armv7-a$(plus_sec)' to avoid any build issues. >>>>>> >>>>>> Cc: Arnd Bergmann <arnd@arndb.de> >>>>>> >>>>>> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> >>>>>> --- [..] >>>>> Anyway, this looks like it should work, except: >>>>> >>>>>> +ENTRY(keystone_cpu_smc) >>>>>> + stmfd sp!, {r4-r12, lr} >>>>>> + smc #0 >>>>>> + dsb >>>>> >>>>> What's this DSB for? (You didn't have it in the inline asm version) >>>>> >>>> Just to drain the write buffer before resuming on non-secure side. >>> >>> Why do you need to do that? >>> >> To commit any secure side pending writes. I don't remember exactly the >> issues but I remember facing issues in power management sequencing with >> SMC calls in between. That time a dsb did the trick. In fact I use to >> keep 1 before SMC and 1 after. > > Can we at least have a comment (as recommended in > Documentation/development-process/4.Coding)? > > We don't want other people reading this and concluding that SMC always > needs barriers -- in general, this shouldn't be necessary and could > indicate bugs lurking somewhere. > Agree. Comment should have been there to avoid confusion. Will do. Regards, Santosh ^ permalink raw reply [flat|nested] 15+ messages in thread
* [PATCH] ARM: keystone: remove hand-coded smc instruction 2013-06-21 20:49 ` Santosh Shilimkar 2013-06-21 21:13 ` Arnd Bergmann @ 2013-06-25 14:07 ` Dave Martin 2013-06-25 14:10 ` Santosh Shilimkar 1 sibling, 1 reply; 15+ messages in thread From: Dave Martin @ 2013-06-25 14:07 UTC (permalink / raw) To: linux-arm-kernel On Fri, Jun 21, 2013 at 04:49:30PM -0400, Santosh Shilimkar wrote: > On Friday 21 June 2013 04:35 PM, Arnd Bergmann wrote: > > On Friday 21 June 2013, Arnd Bergmann wrote: > >> This lets us build keystone with CONFIG_THUMB2_KERNEL enabled, > >> without the patch we get this error: > >> > >> Error: cannot determine Thumb instruction size. Use .inst.n/.inst.w instead > >> > >> This follows the same change for all other platforms done > >> earlier. > >> > >> Signed-off-by: Arnd Bergmann <arnd@arndb.de> > >> Cc: Santosh Shilimkar <santosh.shilimkar@ti.com> > >> > >> diff --git a/arch/arm/mach-keystone/platsmp.c b/arch/arm/mach-keystone/platsmp.c > >> index 630ab3bd..1800c33 100644 > >> --- a/arch/arm/mach-keystone/platsmp.c > >> +++ b/arch/arm/mach-keystone/platsmp.c > >> @@ -34,7 +34,7 @@ static int __cpuinit keystone_smp_boot_secondary(unsigned int cpu, > >> "mov r0, #0\n" /* power on cmd */ > >> "mov r1, %1\n" /* cpu */ > >> "mov r2, %2\n" /* start */ > >> - ".inst 0xe1600070\n" /* smc #0 */ > >> + "smc #0\n" /* smc #0 */ > >> "mov %0, r0\n" > >> : "=r" (error) > >> : "r"(cpu), "r"(start) > > > > Ah, damm, now I get this error for building an ARMv6+ARMv7 combined kernel: > > > > /tmp/ccSWHCik.s:55: Error: selected processor does not support ARM mode `smc #0' > > > > I'll add a -march=armv7-a gcc flag as well. > > > I was just typing about the error. I started with smc first but then > hit the below one which lead me to write an opcode. I couldn't compile c file > for v7 only build and hence letf it in encoded format. > > I will be moving this code to separate asm file along with other smc > API support. I think the correct way to fix this is to use ".arch_extension sec" and "smc" in the C inline asm, and put CFLAGS_platsmp.o := -march=armv7-a in arch/arm/mach-keystone/Makefile This approach is followed in a few other places. Or put the SMC in a separate .S file with suitable AFLAGS if not on a performance-critical hot path (for boot_secondary() it doesn't sounds like a problem). Cheers ---Dave ^ permalink raw reply [flat|nested] 15+ messages in thread
* [PATCH] ARM: keystone: remove hand-coded smc instruction 2013-06-25 14:07 ` Dave Martin @ 2013-06-25 14:10 ` Santosh Shilimkar 0 siblings, 0 replies; 15+ messages in thread From: Santosh Shilimkar @ 2013-06-25 14:10 UTC (permalink / raw) To: linux-arm-kernel On Tuesday 25 June 2013 10:07 AM, Dave Martin wrote: > On Fri, Jun 21, 2013 at 04:49:30PM -0400, Santosh Shilimkar wrote: >> On Friday 21 June 2013 04:35 PM, Arnd Bergmann wrote: >>> On Friday 21 June 2013, Arnd Bergmann wrote: >>>> This lets us build keystone with CONFIG_THUMB2_KERNEL enabled, >>>> without the patch we get this error: >>>> >>>> Error: cannot determine Thumb instruction size. Use .inst.n/.inst.w instead >>>> >>>> This follows the same change for all other platforms done >>>> earlier. >>>> >>>> Signed-off-by: Arnd Bergmann <arnd@arndb.de> >>>> Cc: Santosh Shilimkar <santosh.shilimkar@ti.com> >>>> >>>> diff --git a/arch/arm/mach-keystone/platsmp.c b/arch/arm/mach-keystone/platsmp.c >>>> index 630ab3bd..1800c33 100644 >>>> --- a/arch/arm/mach-keystone/platsmp.c >>>> +++ b/arch/arm/mach-keystone/platsmp.c >>>> @@ -34,7 +34,7 @@ static int __cpuinit keystone_smp_boot_secondary(unsigned int cpu, >>>> "mov r0, #0\n" /* power on cmd */ >>>> "mov r1, %1\n" /* cpu */ >>>> "mov r2, %2\n" /* start */ >>>> - ".inst 0xe1600070\n" /* smc #0 */ >>>> + "smc #0\n" /* smc #0 */ >>>> "mov %0, r0\n" >>>> : "=r" (error) >>>> : "r"(cpu), "r"(start) >>> >>> Ah, damm, now I get this error for building an ARMv6+ARMv7 combined kernel: >>> >>> /tmp/ccSWHCik.s:55: Error: selected processor does not support ARM mode `smc #0' >>> >>> I'll add a -march=armv7-a gcc flag as well. >>> >> I was just typing about the error. I started with smc first but then >> hit the below one which lead me to write an opcode. I couldn't compile c file >> for v7 only build and hence letf it in encoded format. >> >> I will be moving this code to separate asm file along with other smc >> API support. > > I think the correct way to fix this is to use ".arch_extension sec" and "smc" in > the C inline asm, and put > > CFLAGS_platsmp.o := -march=armv7-a > > in arch/arm/mach-keystone/Makefile > > This approach is followed in a few other places. > > > Or put the SMC in a separate .S file with suitable AFLAGS if not on a > performance-critical hot path (for boot_secondary() it doesn't sounds > like a problem). > Yep. Separate .S file patch is already submitted. Thanks Regards, Santosh ^ permalink raw reply [flat|nested] 15+ messages in thread
end of thread, other threads:[~2013-06-25 15:51 UTC | newest] Thread overview: 15+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2013-06-21 20:28 [PATCH] ARM: keystone: remove hand-coded smc instruction Arnd Bergmann 2013-06-21 20:35 ` Arnd Bergmann 2013-06-21 20:49 ` Santosh Shilimkar 2013-06-21 21:13 ` Arnd Bergmann 2013-06-21 21:20 ` Santosh Shilimkar 2013-06-21 21:41 ` Arnd Bergmann 2013-06-21 22:54 ` Santosh Shilimkar 2013-06-25 14:13 ` Dave Martin 2013-06-25 14:27 ` Santosh Shilimkar 2013-06-25 14:32 ` Dave Martin 2013-06-25 14:40 ` Santosh Shilimkar 2013-06-25 15:39 ` Dave Martin 2013-06-25 15:51 ` Santosh Shilimkar 2013-06-25 14:07 ` Dave Martin 2013-06-25 14:10 ` Santosh Shilimkar
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