From mboxrd@z Thu Jan 1 00:00:00 1970 From: maxime.ripard@free-electrons.com (Maxime Ripard) Date: Tue, 23 Jul 2013 15:15:24 +0200 Subject: [PATCH RFC 3/8] clk: sunxi: add gating support to PLL1 In-Reply-To: <1374541272-32173-4-git-send-email-emilio@elopez.com.ar> References: <1374541272-32173-1-git-send-email-emilio@elopez.com.ar> <1374541272-32173-4-git-send-email-emilio@elopez.com.ar> Message-ID: <20130723131524.GD10389@lukather> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org On Mon, Jul 22, 2013 at 10:01:07PM -0300, Emilio L?pez wrote: > This commit adds gating support to PLL1 on the clock driver. This makes > the PLL1 implementation fully compatible with PLL4 as well. > > Signed-off-by: Emilio L?pez Acked-by: Maxime Ripard -- Maxime Ripard, Free Electrons Embedded Linux, Kernel and Android engineering http://free-electrons.com -------------- next part -------------- A non-text attachment was scrubbed... Name: signature.asc Type: application/pgp-signature Size: 836 bytes Desc: Digital signature URL: