From: grant.likely@secretlab.ca (Grant Likely)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCHv5 05/11] of: pci: add registry of MSI chips
Date: Sat, 27 Jul 2013 22:33:10 -0600 [thread overview]
Message-ID: <20130728043310.6CF1D3E08FE@localhost> (raw)
In-Reply-To: <51E41F7A.4010502@gmail.com>
On Mon, 15 Jul 2013 11:12:42 -0500, Rob Herring <robherring2@gmail.com> wrote:
> On 07/15/2013 06:52 AM, Thomas Petazzoni wrote:
> > This commit adds a very basic registry of msi_chip structures, so that
> > an IRQ controller driver can register an msi_chip, and a PCIe host
> > controller can find it, based on a 'struct device_node'.
> >
> > Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
>
> Acked-by: Rob Herring <rob.herring@calxeda.com>
Actually, I'm going to disagree on this one and say NAK. I don't think
it is a good idea to create a completely separate registry of msi_chips
for binding to dt nodes. I think it would be better to include the
msi_chip pointer directly into the irq_domain which has to be there
anyway. It then becomes another feature for irq controllers if it can
support doing MSI.
In fact, I would even go so far as to say it would make sense for the
msi_chip functionality to be rolled directly into the irq_domain without
a separate structure; but I'm not nacking on that point.
g.
>
>
> > ---
> > drivers/of/of_pci.c | 45 +++++++++++++++++++++++++++++++++++++++++++++
> > include/linux/msi.h | 2 ++
> > include/linux/of_pci.h | 12 ++++++++++++
> > 3 files changed, 59 insertions(+)
> >
> > diff --git a/drivers/of/of_pci.c b/drivers/of/of_pci.c
> > index 42c687a..e5ca008 100644
> > --- a/drivers/of/of_pci.c
> > +++ b/drivers/of/of_pci.c
> > @@ -89,3 +89,48 @@ int of_pci_parse_bus_range(struct device_node *node, struct resource *res)
> > return 0;
> > }
> > EXPORT_SYMBOL_GPL(of_pci_parse_bus_range);
> > +
> > +#ifdef CONFIG_PCI_MSI
> > +
> > +static LIST_HEAD(of_pci_msi_chip_list);
> > +static DEFINE_MUTEX(of_pci_msi_chip_mutex);
> > +
> > +int of_pci_msi_chip_add(struct msi_chip *chip)
> > +{
> > + if (!of_property_read_bool(chip->of_node, "msi-controller"))
> > + return -EINVAL;
> > +
> > + mutex_lock(&of_pci_msi_chip_mutex);
> > + list_add(&chip->list, &of_pci_msi_chip_list);
> > + mutex_unlock(&of_pci_msi_chip_mutex);
> > +
> > + return 0;
> > +}
> > +EXPORT_SYMBOL_GPL(of_pci_msi_chip_add);
> > +
> > +void of_pci_msi_chip_remove(struct msi_chip *chip)
> > +{
> > + mutex_lock(&of_pci_msi_chip_mutex);
> > + list_del(&chip->list);
> > + mutex_unlock(&of_pci_msi_chip_mutex);
> > +}
> > +EXPORT_SYMBOL_GPL(of_pci_msi_chip_remove);
> > +
> > +struct msi_chip *of_pci_find_msi_chip_by_node(struct device_node *of_node)
> > +{
> > + struct msi_chip *c;
> > +
> > + mutex_lock(&of_pci_msi_chip_mutex);
> > + list_for_each_entry(c, &of_pci_msi_chip_list, list) {
> > + if (c->of_node == of_node) {
> > + mutex_unlock(&of_pci_msi_chip_mutex);
> > + return c;
> > + }
> > + }
> > + mutex_unlock(&of_pci_msi_chip_mutex);
> > +
> > + return NULL;
> > +}
> > +EXPORT_SYMBOL_GPL(of_pci_find_msi_chip_by_node);
> > +
> > +#endif /* CONFIG_PCI_MSI */
> > diff --git a/include/linux/msi.h b/include/linux/msi.h
> > index cbf5d05..80900e0 100644
> > --- a/include/linux/msi.h
> > +++ b/include/linux/msi.h
> > @@ -67,6 +67,8 @@ void default_teardown_msi_irqs(struct pci_dev *dev);
> > struct msi_chip {
> > struct module *owner;
> > struct device *dev;
> > + struct device_node *of_node;
> > + struct list_head list;
> >
> > int (*setup_irq)(struct msi_chip *chip, struct pci_dev *dev,
> > struct msi_desc *desc);
> > diff --git a/include/linux/of_pci.h b/include/linux/of_pci.h
> > index 7a04826..29631eb 100644
> > --- a/include/linux/of_pci.h
> > +++ b/include/linux/of_pci.h
> > @@ -2,6 +2,7 @@
> > #define __OF_PCI_H
> >
> > #include <linux/pci.h>
> > +#include <linux/msi.h>
> >
> > struct pci_dev;
> > struct of_irq;
> > @@ -13,4 +14,15 @@ struct device_node *of_pci_find_child_device(struct device_node *parent,
> > int of_pci_get_devfn(struct device_node *np);
> > int of_pci_parse_bus_range(struct device_node *node, struct resource *res);
> >
> > +#if defined(CONFIG_OF) && defined(CONFIG_PCI_MSI)
> > +int of_pci_msi_chip_add(struct msi_chip *chip);
> > +void of_pci_msi_chip_remove(struct msi_chip *chip);
> > +struct msi_chip *of_pci_find_msi_chip_by_node(struct device_node *of_node);
> > +#else
> > +static inline int of_pci_msi_chip_add(struct msi_chip *chip) { return -EINVAL; }
> > +static inline void of_pci_msi_chip_remove(struct msi_chip *chip) { }
> > +static inline struct msi_chip *
> > +of_pci_find_msi_chip_by_node(struct device_node *of_node) { return NULL };
> > +#endif
> > +
> > #endif
> >
>
next prev parent reply other threads:[~2013-07-28 4:33 UTC|newest]
Thread overview: 49+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-07-15 11:52 [PATCHv5 00/11] MSI support for Marvell EBU PCIe driver Thomas Petazzoni
2013-07-15 11:52 ` [PATCHv5 01/11] irqdomain: add irq_alloc_mapping() function Thomas Petazzoni
2013-07-16 8:31 ` Thomas Petazzoni
2013-07-28 4:11 ` Grant Likely
2013-07-15 11:52 ` [PATCHv5 02/11] PCI: use weak functions for MSI arch-specific functions Thomas Petazzoni
2013-07-25 18:37 ` Thierry Reding
2013-07-25 20:27 ` Bjorn Helgaas
2013-07-15 11:52 ` [PATCHv5 03/11] PCI: remove ARCH_SUPPORTS_MSI kconfig option Thomas Petazzoni
2013-07-15 11:52 ` [PATCHv5 04/11] PCI: Introduce new MSI chip infrastructure Thomas Petazzoni
2013-07-25 18:40 ` Thierry Reding
2013-07-25 20:26 ` Bjorn Helgaas
2013-07-15 11:52 ` [PATCHv5 05/11] of: pci: add registry of MSI chips Thomas Petazzoni
2013-07-15 16:12 ` Rob Herring
2013-07-28 4:33 ` Grant Likely [this message]
2013-07-28 14:27 ` Thomas Petazzoni
2013-07-29 6:54 ` Thierry Reding
2013-07-29 12:26 ` Thomas Petazzoni
2013-07-29 12:58 ` Thierry Reding
2013-07-29 13:04 ` Thomas Petazzoni
2013-08-01 9:17 ` Thomas Petazzoni
2013-07-31 15:14 ` Thomas Petazzoni
2013-07-15 11:52 ` [PATCHv5 06/11] irqchip: armada-370-xp: properly request resources Thomas Petazzoni
2013-07-15 11:52 ` [PATCHv5 07/11] irqchip: armada-370-xp: implement MSI support Thomas Petazzoni
2013-07-15 11:52 ` [PATCHv5 08/11] ARM: pci: add ->add_bus() and ->remove_bus() hooks to hw_pci Thomas Petazzoni
2013-07-16 8:29 ` Thomas Petazzoni
2013-07-25 16:53 ` Thierry Reding
2013-08-07 9:13 ` Thomas Petazzoni
2013-08-07 13:37 ` Thierry Reding
2013-08-07 15:06 ` Thomas Petazzoni
2013-07-25 16:57 ` Thierry Reding
2013-07-26 8:13 ` Thomas Petazzoni
2013-07-26 11:49 ` Jason Cooper
2013-07-26 22:46 ` Russell King - ARM Linux
2013-07-29 12:31 ` Thierry Reding
2013-07-15 11:52 ` [PATCHv5 09/11] ARM: mvebu: the MPIC now provides MSI controller features Thomas Petazzoni
2013-07-15 11:52 ` [PATCHv5 10/11] PCI: mvebu: add support for MSI Thomas Petazzoni
2013-07-15 11:52 ` [PATCHv5 11/11] ARM: mvebu: link PCIe controllers to the MSI controller Thomas Petazzoni
2013-07-15 15:34 ` [PATCHv5 00/11] MSI support for Marvell EBU PCIe driver Stephen Warren
2013-07-15 16:27 ` Thierry Reding
2013-07-16 8:33 ` Thomas Petazzoni
2013-07-16 21:05 ` Thierry Reding
2013-07-16 21:43 ` Thomas Petazzoni
2013-07-23 0:30 ` Bjorn Helgaas
2013-07-15 17:33 ` Jason Cooper
2013-07-16 8:43 ` Thomas Petazzoni
2013-07-16 13:15 ` Jason Cooper
2013-07-16 13:39 ` Thomas Petazzoni
2013-07-25 18:49 ` Thierry Reding
2013-07-25 19:02 ` Jason Cooper
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20130728043310.6CF1D3E08FE@localhost \
--to=grant.likely@secretlab.ca \
--cc=linux-arm-kernel@lists.infradead.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).