From: mark.rutland@arm.com (Mark Rutland)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 1/7] dt: update PSCI binding documentation for v0.2
Date: Tue, 30 Jul 2013 13:56:50 +0100 [thread overview]
Message-ID: <20130730125650.GD28716@e106331-lin.cambridge.arm.com> (raw)
In-Reply-To: <51F7B4C9.2060500@gmail.com>
On Tue, Jul 30, 2013 at 01:42:49PM +0100, Rob Herring wrote:
> On 07/30/2013 04:49 AM, Mark Rutland wrote:
> > On Mon, Jul 29, 2013 at 09:18:43PM +0100, Rob Herring wrote:
> >> On 07/29/2013 05:13 AM, Mark Rutland wrote:
> >>> Hi Rob,
> >>>
> >>> On Sun, Jul 28, 2013 at 10:56:32PM +0100, Rob Herring wrote:
> >>>> From: Rob Herring <rob.herring@calxeda.com>
>
> [snip]
>
> >>> One of the things changed in PSCI 0.2 was the SMC calling convention,
> >>> though this isn't clear in the PSCI document. The function IDs for 32bit
> >>> and 64bit callers may differ, and we need to support describing an
> >>> arbitrary configuration of the two (same ID for both, different across
> >>> 32-bit/64-bit, only supported for 64-bit, only supported for 32-bit).
> >>>
> >>> I'd like to ensure the binding can deal with that from the start. We
> >>> could do this by having -32 and -64 variants of each function id (e.g.
> >>> cpu_off-64) , if the IDs actually differ, and use the regular combined
> >>> ID if they don't.
> >>
> >> Uggg. I guess I should have read the SMC calling convention doc... I was
> >> simply documenting what is already in the PSCI doc, but obviously that
> >> is not fully flushed out.
> >>
> >> How about something like this (for the complicated case of both 32 and
> >> 64 bit):
> >>
> >> method = "smc", "smc64";
> >> psci_version = <0x84000000 0xc4000000>;
> >> cpu_suspend = <0x84000001 0xc4000001>;
> >> cpu_off = <0x84000002 0xc4000002>;
> >> cpu_on = <0x84000003 0xc4000003>;
> >>
> >> "smc" is a synonym for smc32 for compatibility. The number and order of
> >> methods determines the number and order of function IDs.
> >
> > While this may be compatible with the arm implementation, it won't be
> > compatible with the arm64 implementation, which assumes smc64 by
> > default.
> >
> > As far as I am aware, the implementations currently in use (KVM and Xen)
> > use the same ID for both, so I think "smc" should cover an ID valid for
> > a native register width calling convention, and "smc64" and "smc32"
> > describing values only valid for 64-bit wide and 32-bit wide calling
> > conventions respectively.
>
> The problem is that does not work for a 32-bit kernel on 64-bit h/w as
> native from the dts perspective is smc64. Just like the cpu bindings,
> the binding cannot change based on 32 or 64 bit OS. I don't think we
> really have to deal with that here. We can simply say "smc" is only for
> "arm,psci" and deprecated for "arm,psci-0.2".
Agreed. I'd be happy with only having "smc32" and "smc64" for
"arm,psci-0.2".
Thanks,
Mark.
next prev parent reply other threads:[~2013-07-30 12:56 UTC|newest]
Thread overview: 35+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-07-28 21:56 [PATCH v3 0/7] PSCI support for highbank Rob Herring
2013-07-28 21:56 ` [PATCH 1/7] dt: update PSCI binding documentation for v0.2 Rob Herring
2013-07-29 10:13 ` Mark Rutland
2013-07-29 20:18 ` Rob Herring
2013-07-30 9:49 ` Mark Rutland
2013-07-30 12:42 ` Rob Herring
2013-07-30 12:56 ` Mark Rutland [this message]
2013-07-30 13:44 ` Mark Rutland
2013-07-30 14:33 ` Stefano Stabellini
2013-07-30 14:42 ` Ian Campbell
2013-07-30 17:48 ` Matt Sealey
2013-07-31 8:55 ` Ian Campbell
2013-07-31 13:49 ` Mark Rutland
2013-07-31 17:24 ` Matt Sealey
2013-07-31 17:49 ` Rob Herring
2013-08-01 17:51 ` Dave Martin
2013-08-01 19:02 ` Rob Herring
2013-08-01 21:04 ` Matt Sealey
2013-07-31 13:07 ` Mark Rutland
2013-07-30 19:34 ` Rob Herring
2013-07-31 8:57 ` Ian Campbell
2013-07-31 13:05 ` Mark Rutland
2013-07-30 10:01 ` Dave Martin
2013-07-28 21:56 ` [PATCH 2/7] ARM: PSCI: remove unnecessary include of arm-gic.h Rob Herring
2013-07-28 21:56 ` [PATCH 3/7] ARM: PSCI: add ops for system restart and power off Rob Herring
2013-07-28 21:56 ` [PATCH 4/7] cpuidle: calxeda: add support to use PSCI calls Rob Herring
2013-07-29 14:14 ` Daniel Lezcano
2013-07-29 14:39 ` Rob Herring
2013-07-29 14:46 ` Daniel Lezcano
2013-07-28 21:56 ` [PATCH 5/7] ARM: highbank: clean-up some unused includes Rob Herring
2013-07-28 21:56 ` [PATCH 6/7] ARM: highbank: adapt to use ARM PSCI calls Rob Herring
2013-07-28 21:56 ` [PATCH 7/7] dts: calxeda: add ARM PSCI binding Rob Herring
2013-07-29 10:24 ` Mark Rutland
2013-07-29 13:13 ` Rob Herring
2013-07-29 14:30 ` Mark Rutland
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20130730125650.GD28716@e106331-lin.cambridge.arm.com \
--to=mark.rutland@arm.com \
--cc=linux-arm-kernel@lists.infradead.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).