* [PATCH 00/02] ARM: shmobile: Initial r8a7790 APMU SMP code
@ 2013-08-09 10:07 Magnus Damm
2013-08-09 10:07 ` [PATCH 01/02] ARM: shmobile: Add r8a7790 SMP support using APMU code Magnus Damm
2013-08-09 10:08 ` [PATCH 02/02] ARM: shmobile: Add r8a7790 CA15 CPU cores and APMU as DTS Magnus Damm
0 siblings, 2 replies; 4+ messages in thread
From: Magnus Damm @ 2013-08-09 10:07 UTC (permalink / raw)
To: linux-arm-kernel
ARM: shmobile: Initial r8a7790 APMU SMP code
[PATCH 01/02] ARM: shmobile: Add r8a7790 SMP support using APMU code
[PATCH 02/02] ARM: shmobile: Add r8a7790 CA15 CPU cores and APMU as DTS
This series adds SMP support to r8a7790 using the APMU code. With these
patches applied r8a7790 CA15 support for SMP boot and CPU Hotplug is
known to be working.
Signed-off-by: Magnus Damm <damm@opensource.se>
---
Written against renesas.git renesas-devel-20130807 and
[PATCH 00/05] ARM: shmobile: Yet another SMP series
[PATCH 00/02] ARM: shmobile: Rename to r8a73a4/r8a7790_init_early()
[PATCH] ARM: shmobile: Shared APMU SMP support code
[PATCH 00/02] ARM: shmobile: Initial r8a73a4 APMU SMP code
arch/arm/boot/dts/r8a7790.dtsi | 27 ++++++++++
arch/arm/mach-shmobile/Makefile | 1
arch/arm/mach-shmobile/include/mach/r8a7790.h | 1
arch/arm/mach-shmobile/setup-r8a7790.c | 3 +
arch/arm/mach-shmobile/smp-r8a7790.c | 67 +++++++++++++++++++++++++
5 files changed, 99 insertions(+)
^ permalink raw reply [flat|nested] 4+ messages in thread
* [PATCH 01/02] ARM: shmobile: Add r8a7790 SMP support using APMU code
2013-08-09 10:07 [PATCH 00/02] ARM: shmobile: Initial r8a7790 APMU SMP code Magnus Damm
@ 2013-08-09 10:07 ` Magnus Damm
2013-08-21 9:14 ` Simon Horman
2013-08-09 10:08 ` [PATCH 02/02] ARM: shmobile: Add r8a7790 CA15 CPU cores and APMU as DTS Magnus Damm
1 sibling, 1 reply; 4+ messages in thread
From: Magnus Damm @ 2013-08-09 10:07 UTC (permalink / raw)
To: linux-arm-kernel
From: Magnus Damm <damm@opensource.se>
Add r8a7790 SMP support using the shared APMU code. To enable
SMP the r8a7790 specific DTS needs to be updated to include
CPU cores, and this is happening in a separate patch.
Signed-off-by: Magnus Damm <damm@opensource.se>
---
arch/arm/mach-shmobile/Makefile | 1
arch/arm/mach-shmobile/include/mach/r8a7790.h | 1
arch/arm/mach-shmobile/setup-r8a7790.c | 3 +
arch/arm/mach-shmobile/smp-r8a7790.c | 67 +++++++++++++++++++++++++
4 files changed, 72 insertions(+)
--- 0011/arch/arm/mach-shmobile/Makefile
+++ work/arch/arm/mach-shmobile/Makefile 2013-08-07 20:10:54.000000000 +0900
@@ -35,6 +35,7 @@ smp-y := platsmp.o headsmp.o
smp-$(CONFIG_ARCH_SH73A0) += smp-sh73a0.o headsmp-scu.o platsmp-scu.o
smp-$(CONFIG_ARCH_R8A73A4) += smp-r8a73a4.o platsmp-apmu.o
smp-$(CONFIG_ARCH_R8A7779) += smp-r8a7779.o headsmp-scu.o platsmp-scu.o
+smp-$(CONFIG_ARCH_R8A7790) += smp-r8a7790.o platsmp-apmu.o
smp-$(CONFIG_ARCH_EMEV2) += smp-emev2.o headsmp-scu.o platsmp-scu.o
# IRQ objects
--- 0009/arch/arm/mach-shmobile/include/mach/r8a7790.h
+++ work/arch/arm/mach-shmobile/include/mach/r8a7790.h 2013-08-07 20:10:54.000000000 +0900
@@ -7,6 +7,7 @@ void r8a7790_clock_init(void);
void r8a7790_pinmux_init(void);
void r8a7790_init_early(void);
void r8a7790_timer_init(void);
+extern struct smp_operations r8a7790_smp_ops;
#define MD(nr) BIT(nr)
u32 r8a7790_read_mode_pins(void);
--- 0009/arch/arm/mach-shmobile/setup-r8a7790.c
+++ work/arch/arm/mach-shmobile/setup-r8a7790.c 2013-08-07 20:10:54.000000000 +0900
@@ -272,6 +272,9 @@ void __init r8a7790_init_early(void)
#ifndef CONFIG_ARM_ARCH_TIMER
shmobile_setup_delay(1300, 2, 4); /* Cortex-A15 @ 1300MHz */
#endif
+#ifdef CONFIG_SMP
+ smp_set_ops(&r8a7790_smp_ops);
+#endif
}
#ifdef CONFIG_USE_OF
--- /dev/null
+++ work/arch/arm/mach-shmobile/smp-r8a7790.c 2013-08-07 20:10:55.000000000 +0900
@@ -0,0 +1,67 @@
+/*
+ * SMP support for r8a7790
+ *
+ * Copyright (C) 2012-2013 Renesas Solutions Corp.
+ * Copyright (C) 2012 Takashi Yoshii <takashi.yoshii.ze@renesas.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/smp.h>
+#include <linux/io.h>
+#include <asm/smp_plat.h>
+#include <mach/common.h>
+
+#define RST 0xe6160000
+#define CA15BAR 0x0020
+#define CA7BAR 0x0030
+#define CA15RESCNT 0x0040
+#define CA7RESCNT 0x0044
+#define MERAM 0xe8080000
+
+static void __init r8a7790_smp_prepare_cpus(unsigned int max_cpus)
+{
+ void __iomem *p;
+ u32 bar;
+
+ /* let APMU code install data related to shmobile_boot_vector */
+ shmobile_smp_apmu_prepare_cpus(max_cpus);
+
+ /* MERAM for jump stub, because BAR requires 256KB aligned address */
+ p = ioremap_nocache(MERAM, shmobile_boot_size);
+ memcpy_toio(p, shmobile_boot_vector, shmobile_boot_size);
+ iounmap(p);
+
+ /* setup reset vectors */
+ p = ioremap_nocache(RST, 0x63);
+ bar = (MERAM >> 8) & 0xfffffc00;
+ writel_relaxed(bar, p + CA15BAR);
+ writel_relaxed(bar, p + CA7BAR);
+ writel_relaxed(bar | 0x10, p + CA15BAR);
+ writel_relaxed(bar | 0x10, p + CA7BAR);
+
+ /* enable clocks to all CPUs */
+ writel_relaxed((readl_relaxed(p + CA15RESCNT) & ~0x0f) | 0xa5a50000,
+ p + CA15RESCNT);
+ writel_relaxed((readl_relaxed(p + CA7RESCNT) & ~0x0f) | 0x5a5a0000,
+ p + CA7RESCNT);
+ iounmap(p);
+}
+
+struct smp_operations r8a7790_smp_ops __initdata = {
+ .smp_prepare_cpus = r8a7790_smp_prepare_cpus,
+ .smp_boot_secondary = shmobile_smp_apmu_boot_secondary,
+#ifdef CONFIG_HOTPLUG_CPU
+ .cpu_disable = shmobile_smp_cpu_disable,
+ .cpu_die = shmobile_smp_apmu_cpu_die,
+ .cpu_kill = shmobile_smp_apmu_cpu_kill,
+#endif
+};
^ permalink raw reply [flat|nested] 4+ messages in thread
* [PATCH 02/02] ARM: shmobile: Add r8a7790 CA15 CPU cores and APMU as DTS
2013-08-09 10:07 [PATCH 00/02] ARM: shmobile: Initial r8a7790 APMU SMP code Magnus Damm
2013-08-09 10:07 ` [PATCH 01/02] ARM: shmobile: Add r8a7790 SMP support using APMU code Magnus Damm
@ 2013-08-09 10:08 ` Magnus Damm
1 sibling, 0 replies; 4+ messages in thread
From: Magnus Damm @ 2013-08-09 10:08 UTC (permalink / raw)
To: linux-arm-kernel
From: Magnus Damm <damm@opensource.se>
Add CA15 CPU cores to r8a7790 for a total of 4 x CA15
and also add an APMU node for SMP power management.
Signed-off-by: Magnus Damm <damm@opensource.se>
---
arch/arm/boot/dts/r8a7790.dtsi | 27 +++++++++++++++++++++++++++
1 file changed, 27 insertions(+)
--- 0001/arch/arm/boot/dts/r8a7790.dtsi
+++ work/arch/arm/boot/dts/r8a7790.dtsi 2013-08-07 20:14:31.000000000 +0900
@@ -24,6 +24,33 @@
reg = <0>;
clock-frequency = <1300000000>;
};
+
+ cpu1: cpu at 1 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a15";
+ reg = <1>;
+ clock-frequency = <1300000000>;
+ };
+
+ cpu2: cpu at 2 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a15";
+ reg = <2>;
+ clock-frequency = <1300000000>;
+ };
+
+ cpu3: cpu at 3 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a15";
+ reg = <3>;
+ clock-frequency = <1300000000>;
+ };
+ };
+
+ apmu at e6152000 {
+ compatible = "renesas,r8a7790-apmu", "renesas,apmu";
+ reg = <0 0xe6152000 0 0x88>;
+ cpus = <&cpu0 &cpu1 &cpu2 &cpu3>;
};
gic: interrupt-controller at f1001000 {
^ permalink raw reply [flat|nested] 4+ messages in thread
* [PATCH 01/02] ARM: shmobile: Add r8a7790 SMP support using APMU code
2013-08-09 10:07 ` [PATCH 01/02] ARM: shmobile: Add r8a7790 SMP support using APMU code Magnus Damm
@ 2013-08-21 9:14 ` Simon Horman
0 siblings, 0 replies; 4+ messages in thread
From: Simon Horman @ 2013-08-21 9:14 UTC (permalink / raw)
To: linux-arm-kernel
On Fri, Aug 09, 2013 at 07:07:55PM +0900, Magnus Damm wrote:
> From: Magnus Damm <damm@opensource.se>
>
> Add r8a7790 SMP support using the shared APMU code. To enable
> SMP the r8a7790 specific DTS needs to be updated to include
> CPU cores, and this is happening in a separate patch.
>
> Signed-off-by: Magnus Damm <damm@opensource.se>
> ---
>
> arch/arm/mach-shmobile/Makefile | 1
> arch/arm/mach-shmobile/include/mach/r8a7790.h | 1
> arch/arm/mach-shmobile/setup-r8a7790.c | 3 +
> arch/arm/mach-shmobile/smp-r8a7790.c | 67 +++++++++++++++++++++++++
> 4 files changed, 72 insertions(+)
>
> --- 0011/arch/arm/mach-shmobile/Makefile
> +++ work/arch/arm/mach-shmobile/Makefile 2013-08-07 20:10:54.000000000 +0900
> @@ -35,6 +35,7 @@ smp-y := platsmp.o headsmp.o
> smp-$(CONFIG_ARCH_SH73A0) += smp-sh73a0.o headsmp-scu.o platsmp-scu.o
> smp-$(CONFIG_ARCH_R8A73A4) += smp-r8a73a4.o platsmp-apmu.o
> smp-$(CONFIG_ARCH_R8A7779) += smp-r8a7779.o headsmp-scu.o platsmp-scu.o
> +smp-$(CONFIG_ARCH_R8A7790) += smp-r8a7790.o platsmp-apmu.o
> smp-$(CONFIG_ARCH_EMEV2) += smp-emev2.o headsmp-scu.o platsmp-scu.o
>
> # IRQ objects
> --- 0009/arch/arm/mach-shmobile/include/mach/r8a7790.h
> +++ work/arch/arm/mach-shmobile/include/mach/r8a7790.h 2013-08-07 20:10:54.000000000 +0900
> @@ -7,6 +7,7 @@ void r8a7790_clock_init(void);
> void r8a7790_pinmux_init(void);
> void r8a7790_init_early(void);
> void r8a7790_timer_init(void);
> +extern struct smp_operations r8a7790_smp_ops;
>
> #define MD(nr) BIT(nr)
> u32 r8a7790_read_mode_pins(void);
> --- 0009/arch/arm/mach-shmobile/setup-r8a7790.c
> +++ work/arch/arm/mach-shmobile/setup-r8a7790.c 2013-08-07 20:10:54.000000000 +0900
> @@ -272,6 +272,9 @@ void __init r8a7790_init_early(void)
> #ifndef CONFIG_ARM_ARCH_TIMER
> shmobile_setup_delay(1300, 2, 4); /* Cortex-A15 @ 1300MHz */
> #endif
> +#ifdef CONFIG_SMP
> + smp_set_ops(&r8a7790_smp_ops);
> +#endif
> }
>
> #ifdef CONFIG_USE_OF
As per your email to Olof and Arnd regarding the r8a73a4 version of this
change, I am holding off on this until there is some determination if it is
preferred to set smp_set_ops() in ->init_early(i) or to use the (more
traditional) method of setting smp_ops directly in the per-board
DT_MACHINE_START.
> --- /dev/null
> +++ work/arch/arm/mach-shmobile/smp-r8a7790.c 2013-08-07 20:10:55.000000000 +0900
> @@ -0,0 +1,67 @@
> +/*
> + * SMP support for r8a7790
> + *
> + * Copyright (C) 2012-2013 Renesas Solutions Corp.
> + * Copyright (C) 2012 Takashi Yoshii <takashi.yoshii.ze@renesas.com>
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License as published by
> + * the Free Software Foundation; version 2 of the License.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + */
> +#include <linux/kernel.h>
> +#include <linux/init.h>
> +#include <linux/smp.h>
> +#include <linux/io.h>
> +#include <asm/smp_plat.h>
> +#include <mach/common.h>
> +
> +#define RST 0xe6160000
> +#define CA15BAR 0x0020
> +#define CA7BAR 0x0030
> +#define CA15RESCNT 0x0040
> +#define CA7RESCNT 0x0044
> +#define MERAM 0xe8080000
> +
> +static void __init r8a7790_smp_prepare_cpus(unsigned int max_cpus)
> +{
> + void __iomem *p;
> + u32 bar;
> +
> + /* let APMU code install data related to shmobile_boot_vector */
> + shmobile_smp_apmu_prepare_cpus(max_cpus);
> +
> + /* MERAM for jump stub, because BAR requires 256KB aligned address */
> + p = ioremap_nocache(MERAM, shmobile_boot_size);
> + memcpy_toio(p, shmobile_boot_vector, shmobile_boot_size);
> + iounmap(p);
> +
> + /* setup reset vectors */
> + p = ioremap_nocache(RST, 0x63);
> + bar = (MERAM >> 8) & 0xfffffc00;
> + writel_relaxed(bar, p + CA15BAR);
> + writel_relaxed(bar, p + CA7BAR);
> + writel_relaxed(bar | 0x10, p + CA15BAR);
> + writel_relaxed(bar | 0x10, p + CA7BAR);
> +
> + /* enable clocks to all CPUs */
> + writel_relaxed((readl_relaxed(p + CA15RESCNT) & ~0x0f) | 0xa5a50000,
> + p + CA15RESCNT);
> + writel_relaxed((readl_relaxed(p + CA7RESCNT) & ~0x0f) | 0x5a5a0000,
> + p + CA7RESCNT);
> + iounmap(p);
> +}
> +
> +struct smp_operations r8a7790_smp_ops __initdata = {
> + .smp_prepare_cpus = r8a7790_smp_prepare_cpus,
> + .smp_boot_secondary = shmobile_smp_apmu_boot_secondary,
> +#ifdef CONFIG_HOTPLUG_CPU
> + .cpu_disable = shmobile_smp_cpu_disable,
> + .cpu_die = shmobile_smp_apmu_cpu_die,
> + .cpu_kill = shmobile_smp_apmu_cpu_kill,
> +#endif
> +};
> --
> To unsubscribe from this list: send the line "unsubscribe linux-sh" in
> the body of a message to majordomo at vger.kernel.org
> More majordomo info at http://vger.kernel.org/majordomo-info.html
>
^ permalink raw reply [flat|nested] 4+ messages in thread
end of thread, other threads:[~2013-08-21 9:14 UTC | newest]
Thread overview: 4+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2013-08-09 10:07 [PATCH 00/02] ARM: shmobile: Initial r8a7790 APMU SMP code Magnus Damm
2013-08-09 10:07 ` [PATCH 01/02] ARM: shmobile: Add r8a7790 SMP support using APMU code Magnus Damm
2013-08-21 9:14 ` Simon Horman
2013-08-09 10:08 ` [PATCH 02/02] ARM: shmobile: Add r8a7790 CA15 CPU cores and APMU as DTS Magnus Damm
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).