[PATCH] KVM: ARM: ignore guest L2 cache control SMCs on Highbank and OMAP

[christoffer.dall@linaro.org (Christoffer Dall)]

On Wed, Aug 14, 2013 at 11:30:03AM +0100, Marc Zyngier wrote:
> On 2013-08-14 11:22, Peter Maydell wrote:
> > On 14 August 2013 10:32, Marc Zyngier <marc.zyngier@arm.com> wrote:
> >> On 2013-08-14 10:22, Andre Przywara wrote:
> >
> >>> +static int kvm_ignore_l2x0_call(struct kvm_vcpu *vcpu)
> >>> +{
> >>> +     unsigned long fn_nr = *vcpu_reg(vcpu, 12) & ~((u32) 0);
> >>> +
> >>> +     if (fn_nr == 0x102) {
> >>> +             kvm_skip_instr(vcpu, kvm_vcpu_trap_il_is32bit(vcpu));
> >>> +             return 1;
> >>> +     }
> >>> +
> >>> +     return 0;
> >>> +}
> >>
> >> And what if I run mach-foo which uses r12 to request bar services 
> >> from
> >> secure mode? Is it safe to ignore it? We need something much better 
> >> than
> >> just testing random registers to guess what the guest wants.
> >
> > Definitely. This needs to be addressed via the kernel providing
> > some mechanism so that userspace and/or a KVM-specific bit
> > of 'firmware' running in the guest VM can handle the SMC
> > calls the guest tries to make, because it's totally board
> > specific.
> 
> Right. We're in violent agreement here.
> 
> What I can imagine is some kind of feature bit that would cause an exit 
> all the way to userspace, letting QEMU handle the call.
> 
> That would be simple enough to implement, I believe. At least on the 
> kernel side.
> 
How would we distinguish between a PSCI call that the kernel should
support and a call to secure firmware that needs to be forwarded to
QEMU?  Is this simply a binary config at VM creation time?

-Christoffer