* [PATCH v4] ARM: Add check for Cortex-A15 errata 798181 ECO
@ 2013-08-25 14:25 Rob Herring
2013-08-30 9:11 ` Will Deacon
2013-09-02 13:58 ` Russell King - ARM Linux
0 siblings, 2 replies; 6+ messages in thread
From: Rob Herring @ 2013-08-25 14:25 UTC (permalink / raw)
To: linux-arm-kernel
From: Rob Herring <rob.herring@calxeda.com>
The work-around for A15 errata 798181 is not needed if appropriate ECO
fixes have been applied to r3p2 and earlier core revisions. This can be
checked by reading REVIDR register bits 4 and 9. If only bit 4 is set,
then the IPI broadcast can be skipped.
Signed-off-by: Rob Herring <rob.herring@calxeda.com>
---
v4:
- Move code from setup.c back to smp_tlb.c
- Use IS_ENABLED macro
v3:
- Rebase to v3.11-rc5 due to commit 1f49856 (ARM: 7789/1: Do not run
dummy_flush_tlb_a15_erratum() on non-Cortex-A15)
- Move the revision checking out of line and use function ptrs.
v2:
- Determine the work-around needed and save in a static varible instead
of re-reading the ID registers.
arch/arm/include/asm/cputype.h | 1 +
arch/arm/include/asm/tlbflush.h | 34 +++++++---------------------------
arch/arm/kernel/setup.c | 2 ++
arch/arm/kernel/smp_tlb.c | 39 +++++++++++++++++++++++++++++++++++++--
arch/arm/mm/context.c | 3 +--
5 files changed, 48 insertions(+), 31 deletions(-)
diff --git a/arch/arm/include/asm/cputype.h b/arch/arm/include/asm/cputype.h
index 9672e97..acdde76 100644
--- a/arch/arm/include/asm/cputype.h
+++ b/arch/arm/include/asm/cputype.h
@@ -10,6 +10,7 @@
#define CPUID_TLBTYPE 3
#define CPUID_MPUIR 4
#define CPUID_MPIDR 5
+#define CPUID_REVIDR 6
#ifdef CONFIG_CPU_V7M
#define CPUID_EXT_PFR0 0x40
diff --git a/arch/arm/include/asm/tlbflush.h b/arch/arm/include/asm/tlbflush.h
index f467e9b..decff8d 100644
--- a/arch/arm/include/asm/tlbflush.h
+++ b/arch/arm/include/asm/tlbflush.h
@@ -443,36 +443,16 @@ static inline void local_flush_bp_all(void)
isb();
}
-#include <asm/cputype.h>
-#ifdef CONFIG_ARM_ERRATA_798181
-static inline int erratum_a15_798181(void)
-{
- unsigned int midr = read_cpuid_id();
-
- /* Cortex-A15 r0p0..r3p2 affected */
- if ((midr & 0xff0ffff0) != 0x410fc0f0 || midr > 0x413fc0f2)
- return 0;
- return 1;
-}
-
-static inline void dummy_flush_tlb_a15_erratum(void)
-{
- /*
- * Dummy TLBIMVAIS. Using the unmapped address 0 and ASID 0.
- */
- asm("mcr p15, 0, %0, c8, c3, 1" : : "r" (0));
- dsb();
-}
-#else
-static inline int erratum_a15_798181(void)
-{
- return 0;
-}
+extern void erratum_a15_798181_init(void);
+extern bool (*erratum_a15_798181_handler)(void);
-static inline void dummy_flush_tlb_a15_erratum(void)
+static inline bool erratum_a15_798181(void)
{
+ if (unlikely(IS_ENABLED(CONFIG_ARM_ERRATA_798181) &&
+ erratum_a15_798181_handler))
+ return erratum_a15_798181_handler();
+ return false;
}
-#endif
/*
* flush_pmd_entry
diff --git a/arch/arm/kernel/setup.c b/arch/arm/kernel/setup.c
index afc2489..f3030e3 100644
--- a/arch/arm/kernel/setup.c
+++ b/arch/arm/kernel/setup.c
@@ -599,6 +599,8 @@ static void __init setup_processor(void)
elf_hwcap &= ~(HWCAP_THUMB | HWCAP_IDIVT);
#endif
+ erratum_a15_798181_init();
+
feat_v6_fixup();
cacheid_init();
diff --git a/arch/arm/kernel/smp_tlb.c b/arch/arm/kernel/smp_tlb.c
index c2edfff..1070621 100644
--- a/arch/arm/kernel/smp_tlb.c
+++ b/arch/arm/kernel/smp_tlb.c
@@ -70,6 +70,43 @@ static inline void ipi_flush_bp_all(void *ignored)
local_flush_bp_all();
}
+bool (*erratum_a15_798181_handler)(void);
+
+static bool erratum_a15_798181_partial(void)
+{
+ asm("mcr p15, 0, %0, c8, c3, 1" : : "r" (0));
+ dsb();
+ return false;
+}
+
+static bool erratum_a15_798181_broadcast(void)
+{
+ asm("mcr p15, 0, %0, c8, c3, 1" : : "r" (0));
+ dsb();
+ return true;
+}
+
+bool (*erratum_a15_798181_handler)(void);
+
+void erratum_a15_798181_init(void)
+{
+ unsigned int midr = read_cpuid_id();
+ unsigned int revidr = read_cpuid(CPUID_REVIDR);
+
+ if (!IS_ENABLED(CONFIG_ARM_ERRATA_798181))
+ return;
+
+ /* Cortex-A15 r0p0..r3p2 w/o ECO fix affected */
+ if ((midr & 0xff0ffff0) != 0x410fc0f0 || midr > 0x413fc0f2 ||
+ (revidr & 0x210) == 0x210) {
+ return;
+ }
+ if (revidr & 0x10)
+ erratum_a15_798181_handler = erratum_a15_798181_partial;
+ else
+ erratum_a15_798181_handler = erratum_a15_798181_broadcast;
+}
+
static void ipi_flush_tlb_a15_erratum(void *arg)
{
dmb();
@@ -80,7 +117,6 @@ static void broadcast_tlb_a15_erratum(void)
if (!erratum_a15_798181())
return;
- dummy_flush_tlb_a15_erratum();
smp_call_function(ipi_flush_tlb_a15_erratum, NULL, 1);
}
@@ -92,7 +128,6 @@ static void broadcast_tlb_mm_a15_erratum(struct mm_struct *mm)
if (!erratum_a15_798181())
return;
- dummy_flush_tlb_a15_erratum();
this_cpu = get_cpu();
a15_erratum_get_cpumask(this_cpu, mm, &mask);
smp_call_function_many(&mask, ipi_flush_tlb_a15_erratum, NULL, 1);
diff --git a/arch/arm/mm/context.c b/arch/arm/mm/context.c
index 4a05444..28daa1c 100644
--- a/arch/arm/mm/context.c
+++ b/arch/arm/mm/context.c
@@ -245,8 +245,7 @@ void check_and_switch_context(struct mm_struct *mm, struct task_struct *tsk)
if (cpumask_test_and_clear_cpu(cpu, &tlb_flush_pending)) {
local_flush_bp_all();
local_flush_tlb_all();
- if (erratum_a15_798181())
- dummy_flush_tlb_a15_erratum();
+ erratum_a15_798181();
}
atomic64_set(&per_cpu(active_asids, cpu), asid);
--
1.8.1.2
^ permalink raw reply related [flat|nested] 6+ messages in thread* [PATCH v4] ARM: Add check for Cortex-A15 errata 798181 ECO
2013-08-25 14:25 [PATCH v4] ARM: Add check for Cortex-A15 errata 798181 ECO Rob Herring
@ 2013-08-30 9:11 ` Will Deacon
2013-09-02 13:58 ` Russell King - ARM Linux
1 sibling, 0 replies; 6+ messages in thread
From: Will Deacon @ 2013-08-30 9:11 UTC (permalink / raw)
To: linux-arm-kernel
On Sun, Aug 25, 2013 at 03:25:47PM +0100, Rob Herring wrote:
> From: Rob Herring <rob.herring@calxeda.com>
>
> The work-around for A15 errata 798181 is not needed if appropriate ECO
> fixes have been applied to r3p2 and earlier core revisions. This can be
> checked by reading REVIDR register bits 4 and 9. If only bit 4 is set,
> then the IPI broadcast can be skipped.
>
> Signed-off-by: Rob Herring <rob.herring@calxeda.com>
> ---
> v4:
> - Move code from setup.c back to smp_tlb.c
> - Use IS_ENABLED macro
Reviewed-by: Will Deacon <will.deacon@arm.com>
Note that you might get some trivial conflicts with my barriers series,
which is merged in rmk/devel-stable (and therefore -next).
Will
^ permalink raw reply [flat|nested] 6+ messages in thread
* [PATCH v4] ARM: Add check for Cortex-A15 errata 798181 ECO
2013-08-25 14:25 [PATCH v4] ARM: Add check for Cortex-A15 errata 798181 ECO Rob Herring
2013-08-30 9:11 ` Will Deacon
@ 2013-09-02 13:58 ` Russell King - ARM Linux
2013-09-02 21:31 ` Russell King - ARM Linux
1 sibling, 1 reply; 6+ messages in thread
From: Russell King - ARM Linux @ 2013-09-02 13:58 UTC (permalink / raw)
To: linux-arm-kernel
On Sun, Aug 25, 2013 at 09:25:47AM -0500, Rob Herring wrote:
> From: Rob Herring <rob.herring@calxeda.com>
>
> The work-around for A15 errata 798181 is not needed if appropriate ECO
> fixes have been applied to r3p2 and earlier core revisions. This can be
> checked by reading REVIDR register bits 4 and 9. If only bit 4 is set,
> then the IPI broadcast can be skipped.
>
> Signed-off-by: Rob Herring <rob.herring@calxeda.com>
So, this patch in the patch system claims to be against v3.11-rc2:
$ git checkout v3.11-rc2
...
$ pdb gitapply 7804/2
Patching 7804/2...
git apply --whitespace=fix -p1 --index --check > /tmp/pdb.15757 2>&1 exited with non-zero status: 256
error: patch failed: arch/arm/include/asm/tlbflush.h:443
error: arch/arm/include/asm/tlbflush.h: patch does not apply
error: patch failed: arch/arm/kernel/smp_tlb.c:70
error: arch/arm/kernel/smp_tlb.c: patch does not apply
error: patch failed: arch/arm/mm/context.c:245
error: arch/arm/mm/context.c: patch does not apply
> v3:
> - Rebase to v3.11-rc5 due to commit 1f49856 (ARM: 7789/1: Do not run
> dummy_flush_tlb_a15_erratum() on non-Cortex-A15)
> - Move the revision checking out of line and use function ptrs.
Hmm, so -rc5 not -rc2 that you put into the patch system... Also, the
patch you put into the patch system didn't have Will's ack on it.
^ permalink raw reply [flat|nested] 6+ messages in thread
* [PATCH v4] ARM: Add check for Cortex-A15 errata 798181 ECO
2013-09-02 13:58 ` Russell King - ARM Linux
@ 2013-09-02 21:31 ` Russell King - ARM Linux
2013-09-03 9:13 ` Will Deacon
0 siblings, 1 reply; 6+ messages in thread
From: Russell King - ARM Linux @ 2013-09-02 21:31 UTC (permalink / raw)
To: linux-arm-kernel
On Mon, Sep 02, 2013 at 02:58:42PM +0100, Russell King - ARM Linux wrote:
> On Sun, Aug 25, 2013 at 09:25:47AM -0500, Rob Herring wrote:
> > From: Rob Herring <rob.herring@calxeda.com>
> >
> > The work-around for A15 errata 798181 is not needed if appropriate ECO
> > fixes have been applied to r3p2 and earlier core revisions. This can be
> > checked by reading REVIDR register bits 4 and 9. If only bit 4 is set,
> > then the IPI broadcast can be skipped.
> >
> > Signed-off-by: Rob Herring <rob.herring@calxeda.com>
>
> So, this patch in the patch system claims to be against v3.11-rc2:
>
> $ git checkout v3.11-rc2
> ...
> $ pdb gitapply 7804/2
> Patching 7804/2...
> git apply --whitespace=fix -p1 --index --check > /tmp/pdb.15757 2>&1 exited with non-zero status: 256
> error: patch failed: arch/arm/include/asm/tlbflush.h:443
> error: arch/arm/include/asm/tlbflush.h: patch does not apply
> error: patch failed: arch/arm/kernel/smp_tlb.c:70
> error: arch/arm/kernel/smp_tlb.c: patch does not apply
> error: patch failed: arch/arm/mm/context.c:245
> error: arch/arm/mm/context.c: patch does not apply
>
> > v3:
> > - Rebase to v3.11-rc5 due to commit 1f49856 (ARM: 7789/1: Do not run
> > dummy_flush_tlb_a15_erratum() on non-Cortex-A15)
> > - Move the revision checking out of line and use function ptrs.
>
> Hmm, so -rc5 not -rc2 that you put into the patch system... Also, the
> patch you put into the patch system didn't have Will's ack on it.
And... merging everything together tonight gives me a conflict with Will's
barriers patches, which I've resolved like this - this will need to be
checked:
diff --cc arch/arm/include/asm/tlbflush.h
index decff8d,3896026..0000000
--- a/arch/arm/include/asm/tlbflush.h
+++ b/arch/arm/include/asm/tlbflush.h
@@@ -434,25 -545,51 +545,31 @@@ static inline void local_flush_bp_all(v
const int zero = 0;
const unsigned int __tlb_flag = __cpu_tlb_flags;
+ __local_flush_bp_all();
if (tlb_flag(TLB_V7_UIS_BP))
- asm("mcr p15, 0, %0, c7, c1, 6" : : "r" (zero));
- else if (tlb_flag(TLB_V6_BP))
asm("mcr p15, 0, %0, c7, c5, 6" : : "r" (zero));
+ }
- if (tlb_flag(TLB_BARRIER))
- isb();
+ static inline void __flush_bp_all(void)
+ {
+ const int zero = 0;
+ const unsigned int __tlb_flag = __cpu_tlb_flags;
+
+ __local_flush_bp_all();
+ if (tlb_flag(TLB_V7_UIS_BP))
+ asm("mcr p15, 0, %0, c7, c1, 6" : : "r" (zero));
}
-#include <asm/cputype.h>
-#ifdef CONFIG_ARM_ERRATA_798181
-static inline int erratum_a15_798181(void)
-{
- unsigned int midr = read_cpuid_id();
-
- /* Cortex-A15 r0p0..r3p2 affected */
- if ((midr & 0xff0ffff0) != 0x410fc0f0 || midr > 0x413fc0f2)
- return 0;
- return 1;
-}
-
-static inline void dummy_flush_tlb_a15_erratum(void)
-{
- /*
- * Dummy TLBIMVAIS. Using the unmapped address 0 and ASID 0.
- */
- asm("mcr p15, 0, %0, c8, c3, 1" : : "r" (0));
- dsb(ish);
-}
-#else
-static inline int erratum_a15_798181(void)
-{
- return 0;
-}
+extern void erratum_a15_798181_init(void);
+extern bool (*erratum_a15_798181_handler)(void);
-static inline void dummy_flush_tlb_a15_erratum(void)
+static inline bool erratum_a15_798181(void)
{
+ if (unlikely(IS_ENABLED(CONFIG_ARM_ERRATA_798181) &&
+ erratum_a15_798181_handler))
+ return erratum_a15_798181_handler();
+ return false;
}
-#endif
/*
* flush_pmd_entry
diff --cc arch/arm/mm/context.c
index 28daa1c,84e6f77..0000000
--- a/arch/arm/mm/context.c
+++ b/arch/arm/mm/context.c
diff --git a/arch/arm/kernel/smp_tlb.c b/arch/arm/kernel/smp_tlb.c
index 12ab803..3bb055d 100644
--- a/arch/arm/kernel/smp_tlb.c
+++ b/arch/arm/kernel/smp_tlb.c
@@ -75,14 +75,14 @@ bool (*erratum_a15_798181_handler)(void);
static bool erratum_a15_798181_partial(void)
{
asm("mcr p15, 0, %0, c8, c3, 1" : : "r" (0));
- dsb();
+ dsb(ish);
return false;
}
static bool erratum_a15_798181_broadcast(void)
{
asm("mcr p15, 0, %0, c8, c3, 1" : : "r" (0));
- dsb();
+ dsb(ish);
return true;
}
^ permalink raw reply related [flat|nested] 6+ messages in thread* [PATCH v4] ARM: Add check for Cortex-A15 errata 798181 ECO
2013-09-02 21:31 ` Russell King - ARM Linux
@ 2013-09-03 9:13 ` Will Deacon
2013-09-03 9:20 ` Russell King - ARM Linux
0 siblings, 1 reply; 6+ messages in thread
From: Will Deacon @ 2013-09-03 9:13 UTC (permalink / raw)
To: linux-arm-kernel
On Mon, Sep 02, 2013 at 10:31:25PM +0100, Russell King - ARM Linux wrote:
> On Mon, Sep 02, 2013 at 02:58:42PM +0100, Russell King - ARM Linux wrote:
> > On Sun, Aug 25, 2013 at 09:25:47AM -0500, Rob Herring wrote:
> > > From: Rob Herring <rob.herring@calxeda.com>
> > >
> > > The work-around for A15 errata 798181 is not needed if appropriate ECO
> > > fixes have been applied to r3p2 and earlier core revisions. This can be
> > > checked by reading REVIDR register bits 4 and 9. If only bit 4 is set,
> > > then the IPI broadcast can be skipped.
> > >
> > > Signed-off-by: Rob Herring <rob.herring@calxeda.com>
> >
> > So, this patch in the patch system claims to be against v3.11-rc2:
> >
> > $ git checkout v3.11-rc2
> > ...
> > $ pdb gitapply 7804/2
> > Patching 7804/2...
> > git apply --whitespace=fix -p1 --index --check > /tmp/pdb.15757 2>&1 exited with non-zero status: 256
> > error: patch failed: arch/arm/include/asm/tlbflush.h:443
> > error: arch/arm/include/asm/tlbflush.h: patch does not apply
> > error: patch failed: arch/arm/kernel/smp_tlb.c:70
> > error: arch/arm/kernel/smp_tlb.c: patch does not apply
> > error: patch failed: arch/arm/mm/context.c:245
> > error: arch/arm/mm/context.c: patch does not apply
> >
> > > v3:
> > > - Rebase to v3.11-rc5 due to commit 1f49856 (ARM: 7789/1: Do not run
> > > dummy_flush_tlb_a15_erratum() on non-Cortex-A15)
> > > - Move the revision checking out of line and use function ptrs.
> >
> > Hmm, so -rc5 not -rc2 that you put into the patch system... Also, the
> > patch you put into the patch system didn't have Will's ack on it.
>
> And... merging everything together tonight gives me a conflict with Will's
> barriers patches, which I've resolved like this - this will need to be
> checked:
Thanks Russell; looks ok from my side.
Will
^ permalink raw reply [flat|nested] 6+ messages in thread
* [PATCH v4] ARM: Add check for Cortex-A15 errata 798181 ECO
2013-09-03 9:13 ` Will Deacon
@ 2013-09-03 9:20 ` Russell King - ARM Linux
0 siblings, 0 replies; 6+ messages in thread
From: Russell King - ARM Linux @ 2013-09-03 9:20 UTC (permalink / raw)
To: linux-arm-kernel
On Tue, Sep 03, 2013 at 10:13:47AM +0100, Will Deacon wrote:
> On Mon, Sep 02, 2013 at 10:31:25PM +0100, Russell King - ARM Linux wrote:
> > On Mon, Sep 02, 2013 at 02:58:42PM +0100, Russell King - ARM Linux wrote:
> > > On Sun, Aug 25, 2013 at 09:25:47AM -0500, Rob Herring wrote:
> > > > From: Rob Herring <rob.herring@calxeda.com>
> > > >
> > > > The work-around for A15 errata 798181 is not needed if appropriate ECO
> > > > fixes have been applied to r3p2 and earlier core revisions. This can be
> > > > checked by reading REVIDR register bits 4 and 9. If only bit 4 is set,
> > > > then the IPI broadcast can be skipped.
> > > >
> > > > Signed-off-by: Rob Herring <rob.herring@calxeda.com>
> > >
> > > So, this patch in the patch system claims to be against v3.11-rc2:
> > >
> > > $ git checkout v3.11-rc2
> > > ...
> > > $ pdb gitapply 7804/2
> > > Patching 7804/2...
> > > git apply --whitespace=fix -p1 --index --check > /tmp/pdb.15757 2>&1 exited with non-zero status: 256
> > > error: patch failed: arch/arm/include/asm/tlbflush.h:443
> > > error: arch/arm/include/asm/tlbflush.h: patch does not apply
> > > error: patch failed: arch/arm/kernel/smp_tlb.c:70
> > > error: arch/arm/kernel/smp_tlb.c: patch does not apply
> > > error: patch failed: arch/arm/mm/context.c:245
> > > error: arch/arm/mm/context.c: patch does not apply
> > >
> > > > v3:
> > > > - Rebase to v3.11-rc5 due to commit 1f49856 (ARM: 7789/1: Do not run
> > > > dummy_flush_tlb_a15_erratum() on non-Cortex-A15)
> > > > - Move the revision checking out of line and use function ptrs.
> > >
> > > Hmm, so -rc5 not -rc2 that you put into the patch system... Also, the
> > > patch you put into the patch system didn't have Will's ack on it.
> >
> > And... merging everything together tonight gives me a conflict with Will's
> > barriers patches, which I've resolved like this - this will need to be
> > checked:
>
> Thanks Russell; looks ok from my side.
It turns out that it's not quite okay - sfr reported failures this morning
which are reflected in the nightly build, so I think I'm going to drop
Rob's patch. It looks like the case where the workaround is disabled
hasn't been tested, which means almost everything fails with:
arch/arm/kernel/built-in.o: In function `setup_processor':
io.c:(.init.text+0x72c): undefined reference to `erratum_a15_798181_init'
^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2013-09-03 9:20 UTC | newest]
Thread overview: 6+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2013-08-25 14:25 [PATCH v4] ARM: Add check for Cortex-A15 errata 798181 ECO Rob Herring
2013-08-30 9:11 ` Will Deacon
2013-09-02 13:58 ` Russell King - ARM Linux
2013-09-02 21:31 ` Russell King - ARM Linux
2013-09-03 9:13 ` Will Deacon
2013-09-03 9:20 ` Russell King - ARM Linux
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).