From: linux@arm.linux.org.uk (Russell King - ARM Linux)
To: linux-arm-kernel@lists.infradead.org
Subject: Build error in torvalds kernel 3.11 for omap2plus
Date: Mon, 9 Sep 2013 11:51:15 +0100 [thread overview]
Message-ID: <20130909105115.GL25647@n2100.arm.linux.org.uk> (raw)
In-Reply-To: <522CB0DE.2010102@roeck-us.net>
On Sun, Sep 08, 2013 at 10:16:14AM -0700, Guenter Roeck wrote:
> Since we are at it:
>
> Build reference: v3.11-7887-gb409624
>
> Building arm:defconfig ... passed
> Building arm:allmodconfig ... failed
> --------------
> Error log:
> arch/arm/mach-cns3xxx/pcie.c: In function 'cns3xxx_pcie_hw_init':
> arch/arm/mach-cns3xxx/pcie.c:350:1: warning: the frame size of 1064 bytes is larger than 1024 bytes [-Wframe-larger-than=]
> arch/arm/kernel/return_address.c:63:2: warning: #warning "TODO: return_address should use unwind tables" [-Wcpp]
> arch/arm/kernel/return_address.c:63:2: warning: #warning "TODO: return_address should use unwind tables" [-Wcpp]
> /tmp/cce439dZ.s: Assembler messages:
> /tmp/cce439dZ.s:506: Error: selected processor does not support ARM mode `isb '
> /tmp/cce439dZ.s:512: Error: selected processor does not support ARM mode `isb '
> /tmp/cce439dZ.s:513: Error: selected processor does not support ARM mode `dsb '
> /tmp/cce439dZ.s:583: Error: selected processor does not support ARM mode `isb '
> /tmp/cce439dZ.s:589: Error: selected processor does not support ARM mode `isb '
> /tmp/cce439dZ.s:590: Error: selected processor does not support ARM mode `dsb '
> make[1]: *** [arch/arm/mach-vexpress/dcscb.o] Error 1
> make: *** [arch/arm/mach-vexpress] Error 2
> make: *** Waiting for unfinished jobs....
> --------------
>
> Any solution for this one ? omap2plus passes for me.
>
> gcc version used is "arm-poky-linux-gnueabi-gcc (GCC) 4.7.2" from poky 1.3.
That's due to:
commit e8f9bb1bd6bb93fff773345cc54c42585e0e3ece
Author: Nicolas Pitre <nicolas.pitre@linaro.org>
Date: Tue Jul 16 20:59:53 2013 -0400
ARM: vexpress/dcscb: fix cache disabling sequences
Unlike real A15/A7's, the RTSM simulation doesn't appear to hit the
cache when the CTRL.C bit is cleared. Let's ensure there is no memory
access within the disable and flush cache sequence, including to the
stack.
Signed-off-by: Nicolas Pitre <nico@linaro.org>
which introduces some 'isb' and 'dsb' instructions which are not
available on ARMv6 CPUs - however, their 'mcr' equivalents are.
Either dcscb needs to be built with an -march=armv7 override, or
they need to use the mcr equivalent instructions.
next prev parent reply other threads:[~2013-09-09 10:51 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-09-08 6:04 Build error in torvalds kernel 3.11 for omap2plus Anil Kumar
2013-09-08 9:02 ` Russell King - ARM Linux
2013-09-08 17:16 ` Guenter Roeck
2013-09-09 10:51 ` Russell King - ARM Linux [this message]
2013-09-09 12:00 ` Guenter Roeck
2013-09-09 14:24 ` Nicolas Pitre
2013-09-09 16:03 ` Guenter Roeck
2013-09-09 20:31 ` Russell King - ARM Linux
2013-09-09 21:02 ` Guenter Roeck
2013-09-09 21:16 ` Nicolas Pitre
2013-09-10 15:07 ` Kevin Hilman
2013-09-10 15:09 ` Frederic Weisbecker
2013-09-13 17:03 ` [PATCH] arm: Fix build error with context tracking calls Frederic Weisbecker
2013-09-13 22:50 ` Kevin Hilman
2013-09-14 14:19 ` Frederic Weisbecker
2013-09-16 17:11 ` Kevin Hilman
2013-09-14 14:32 ` Russell King - ARM Linux
2013-09-22 16:59 ` Frederic Weisbecker
2013-09-25 17:38 ` Kevin Hilman
2013-09-27 13:30 ` Frederic Weisbecker
2013-09-09 10:55 ` Build error in torvalds kernel 3.11 for omap2plus Anil Kumar
2013-09-09 11:30 ` Guenter Roeck
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