From mboxrd@z Thu Jan 1 00:00:00 1970 From: maxime.ripard@free-electrons.com (Maxime Ripard) Date: Mon, 30 Sep 2013 19:05:19 +0200 Subject: [PATCH 02/10] clk: sunxi: add gating support to PLL1 In-Reply-To: <1380426579-32458-3-git-send-email-emilio@elopez.com.ar> References: <1380426579-32458-1-git-send-email-emilio@elopez.com.ar> <1380426579-32458-3-git-send-email-emilio@elopez.com.ar> Message-ID: <20130930170519.GD5287@lukather> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org On Sun, Sep 29, 2013 at 12:49:31AM -0300, Emilio L?pez wrote: > This commit adds gating support to PLL1 on the clock driver. This makes > the PLL1 implementation fully compatible with PLL4 as well. > > Signed-off-by: Emilio L?pez Acked-by: Maxime Ripard Thanks! Maxime -- Maxime Ripard, Free Electrons Embedded Linux, Kernel and Android engineering http://free-electrons.com -------------- next part -------------- A non-text attachment was scrubbed... Name: signature.asc Type: application/pgp-signature Size: 836 bytes Desc: Digital signature URL: