From: maxime.ripard@free-electrons.com (Maxime Ripard)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 04/10] clk: sunxi: add PLL5 and PLL6 support
Date: Thu, 3 Oct 2013 12:32:13 +0200 [thread overview]
Message-ID: <20131003103213.GE32149@lukather> (raw)
In-Reply-To: <524A095A.9050306@elopez.com.ar>
On Mon, Sep 30, 2013 at 08:29:30PM -0300, Emilio L?pez wrote:
> El 30/09/13 14:21, Maxime Ripard escribi?:
> >On Sun, Sep 29, 2013 at 12:49:33AM -0300, Emilio L?pez wrote:
> >>+/**
> >>+ * sunxi_divs_clk_setup() - Setup function for leaf divisors on clocks
> >>+ */
> >
> >This comment doesn't seem to be at the right place in your code.
>
> I use these comments as kind of a delimiter too, all the struct
> definitions done below are used on sunxi_divs_clk_setup, which is
> immediately after. Factors, mux, dividers and gates have the comment
> that way too.
Still, it looks odd that you're mostly commenting a function here, while
the function is 20-ish lines below. Maybe you can just add a small
comment here saying something like "Here come drag^Wclock dividers".
> >>+ clks = kzalloc(SUNXI_DIVS_MAX_QTY * sizeof(struct clk *), GFP_KERNEL);
> >>+ if (!clks) {
> >>+ kfree(clk_data);
> >>+ return;
> >>+ }
> >>+ clk_data->clks = clks;
> >>+
> >>+ /* It's not a good idea to have automatic reparenting changing
> >>+ * our RAM clock! */
> >>+ clkflags = !strcmp("pll5", parent) ? 0 : CLK_SET_RATE_PARENT;
> >>+
> >>+ for (i = 0; i < SUNXI_DIVS_MAX_QTY; i++) {
> >>+ if (of_property_read_string_index(node, "clock-output-names",
> >>+ i, &clk_name) != 0)
> >>+ break;
> >>+
> >>+ if (data->div[i].fixed) {
> >>+ clks[i] = clk_register_fixed_factor(NULL, clk_name,
> >>+ parent, clkflags,
> >>+ 1, data->div[i].fixed);
> >>+ } else {
> >>+ flags = data->div[i].pow ? CLK_DIVIDER_POWER_OF_TWO : 0;
> >>+ clks[i] = clk_register_divider_table(NULL, clk_name,
> >>+ parent, clkflags, reg,
> >>+ data->div[i].shift,
> >>+ SUNXI_DIVISOR_WIDTH, flags,
> >>+ data->div[i].table, &clk_lock);
> >>+ }
> >
> >Hmmm, I don't get why you were calling sunxi_clk_factors_setup
> >unconditionally, and now you put a condition on the registration?
>
> The factor clock is the 'parent' part and the condition is there to
> decide which kind of divisor gets registered under it. For example
>
> PLL6 CLOCK
> ________________________
> | ___pll6_sata---|----> to consumer
> osc24M->--| pll6--/___pll6_other--|----> to consumer
> | \_______________|____> to consumer
> |________________________|
>
>
> pll6 is the factor part, pll6_sata is a table divider, and
> pll6_other is a fixed factor
That should definitely go in the comments :)
>
> >(Plus, your indentation here looks a bit odd.)
>
> If I align the parameters with the starting (, I can fit at most 1
> parameter per line and I end up with a pile of mostly unreadable
> parameters which uses a lot of lines (and still some don't fit in
> under 80 cols). I thought using one tab less was a good compromise,
> and preferable to going over 80 chars. If you have any better
> suggestion, I'm all ears :)
Ok, whatever you feel best in that case.
Thanks!
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
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next prev parent reply other threads:[~2013-10-03 10:32 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-09-29 3:49 [PATCH 00/10] clk: sunxi: PLL4/5/6, mod0 and mbus support Emilio López
2013-09-29 3:49 ` [PATCH 01/10] clk: sunxi: register factors clocks behind composite Emilio López
2013-09-30 17:03 ` Maxime Ripard
2013-09-29 3:49 ` [PATCH 02/10] clk: sunxi: add gating support to PLL1 Emilio López
2013-09-30 17:05 ` Maxime Ripard
2013-09-29 3:49 ` [PATCH 03/10] ARM: sunxi: add PLL4 support Emilio López
2013-09-29 3:49 ` [PATCH 04/10] clk: sunxi: add PLL5 and PLL6 support Emilio López
2013-09-30 17:21 ` Maxime Ripard
2013-09-30 23:29 ` Emilio López
2013-10-03 10:32 ` Maxime Ripard [this message]
2013-09-29 3:49 ` [PATCH 05/10] ARM: " Emilio López
2013-09-29 3:49 ` [PATCH 06/10] clk: sunxi: mod0 support Emilio López
2013-09-30 17:35 ` Maxime Ripard
2013-09-30 23:37 ` Emilio López
2013-10-02 14:38 ` Maxime Ripard
2013-09-29 3:49 ` [PATCH 07/10] ARM: sun4i: dt: mod0 clocks Emilio López
2013-09-29 3:49 ` [PATCH 08/10] ARM: sun5i: " Emilio López
2013-09-29 3:49 ` [PATCH 09/10] ARM: sun7i: " Emilio López
2013-09-29 3:49 ` [PATCH 10/10] ARM: sunxi: dt: add nodes for the mbus clock Emilio López
2013-09-30 17:38 ` [PATCH 00/10] clk: sunxi: PLL4/5/6, mod0 and mbus support Maxime Ripard
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