From: linux@arm.linux.org.uk (Russell King - ARM Linux)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v3 6/6] ARM: mm: Change the order of TLB/cache maintenance operations.
Date: Fri, 4 Oct 2013 09:46:43 +0100 [thread overview]
Message-ID: <20131004084643.GJ12758@n2100.arm.linux.org.uk> (raw)
In-Reply-To: <1380835081-12129-7-git-send-email-santosh.shilimkar@ti.com>
On Thu, Oct 03, 2013 at 05:18:00PM -0400, Santosh Shilimkar wrote:
> From: Sricharan R <r.sricharan@ti.com>
>
> As per the arm ARMv7 manual, the sequence of TLB maintenance
> operations after making changes to the translation table is
> to clean the dcache first, then invalidate the TLB. With
> the current sequence we see cache corruption when the
> flush_cache_all is called after tlb_flush_all.
This needs testing on ARMv4 CPUs which don't have a way to flush the
cache except by reading memory - hence they need the new page table
entries to be visible to the MMU before calling flush_cache_all().
next prev parent reply other threads:[~2013-10-04 8:46 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-10-03 21:17 [PATCH v3 0/6] ARM: mm: Extend the runtime patch stub for PAE systems Santosh Shilimkar
2013-10-03 21:17 ` [PATCH v3 1/6] ARM: mm: use phys_addr_t appropriately in p2v and v2p conversions Santosh Shilimkar
2013-10-03 21:17 ` [PATCH v3 2/6] ARM: mm: Introduce virt_to_idmap() with an arch hook Santosh Shilimkar
2013-10-03 21:17 ` [PATCH v3 3/6] ARM: mm: Move the idmap print to appropriate place in the code Santosh Shilimkar
2013-10-03 21:17 ` [PATCH v3 4/6] ARM: mm: Correct virt_to_phys patching for 64 bit physical addresses Santosh Shilimkar
2013-10-04 0:17 ` Nicolas Pitre
2013-10-04 5:37 ` Sricharan R
2013-10-04 13:02 ` Nicolas Pitre
2013-10-07 19:25 ` Santosh Shilimkar
2013-10-07 19:42 ` Nicolas Pitre
2013-10-08 11:43 ` Sricharan R
2013-10-03 21:17 ` [PATCH v3 5/6] ARM: mm: Recreate kernel mappings in early_paging_init() Santosh Shilimkar
2013-10-04 0:23 ` Nicolas Pitre
2013-10-04 15:59 ` Will Deacon
2013-10-04 16:12 ` Santosh Shilimkar
2013-10-07 19:34 ` Santosh Shilimkar
2013-10-08 10:26 ` Will Deacon
2013-10-08 17:45 ` Santosh Shilimkar
2013-10-09 10:06 ` Will Deacon
2013-10-09 18:51 ` Santosh Shilimkar
2013-10-03 21:18 ` [PATCH v3 6/6] ARM: mm: Change the order of TLB/cache maintenance operations Santosh Shilimkar
2013-10-04 0:25 ` Nicolas Pitre
2013-10-04 8:46 ` Russell King - ARM Linux [this message]
2013-10-04 13:14 ` Nicolas Pitre
2013-10-04 13:19 ` Santosh Shilimkar
2013-10-04 15:52 ` Will Deacon
2013-10-04 16:03 ` Santosh Shilimkar
2013-10-09 18:56 ` Santosh Shilimkar
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20131004084643.GJ12758@n2100.arm.linux.org.uk \
--to=linux@arm.linux.org.uk \
--cc=linux-arm-kernel@lists.infradead.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).