From: maxime.ripard@free-electrons.com (Maxime Ripard)
To: linux-arm-kernel@lists.infradead.org
Subject: [linux-sunxi] [PATCH v2 1/4] reset: Add Allwinner A31 Reset Controller Driver
Date: Wed, 16 Oct 2013 10:02:38 +0200 [thread overview]
Message-ID: <20131016080238.GC3041@lukather> (raw)
In-Reply-To: <CAPNxgga7N-RYXDEDoK_J3MhA+YvGf2H9GuHqSURQJV+hDPSAPw@mail.gmail.com>
On Tue, Oct 15, 2013 at 11:12:00PM +0200, Arokux X wrote:
> On Mon, Oct 14, 2013 at 9:23 PM, Maxime Ripard
> <maxime.ripard@free-electrons.com> wrote:
> > The Allwinner A31 has an IP maintaining a few other IPs in the SoC in
> > reset by default. Among these IPs are the High Speed Timers, hence why
> > we can't use the regular driver construct, and need to call the
> > registering function directly during machine initialisation.
>
> Maybe it is better to have a more generic commit message here, since
> this driver will be used for all the sunxi.
Right. I'll change it.
Thanks!
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
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next prev parent reply other threads:[~2013-10-16 8:02 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-10-14 19:23 [PATCH v2 0/4] Add support for the Allwinner A31 Reset Controllers Maxime Ripard
2013-10-14 19:23 ` [PATCH v2 1/4] reset: Add Allwinner A31 Reset Controller Driver Maxime Ripard
2013-10-15 21:12 ` [linux-sunxi] " Arokux X
2013-10-16 8:02 ` Maxime Ripard [this message]
2013-10-14 19:23 ` [PATCH v2 2/4] ARM: sunxi: Select ARCH_HAS_RESET_CONTROLLER Maxime Ripard
2013-10-14 19:23 ` [PATCH v2 3/4] ARM: sunxi: Register the A31 reset IP in init_time Maxime Ripard
2013-10-14 19:23 ` [PATCH v2 4/4] ARM: sun6i: Add the reset controller to the DTSI Maxime Ripard
2013-10-15 21:10 ` [linux-sunxi] [PATCH v2 0/4] Add support for the Allwinner A31 Reset Controllers Arokux X
2013-10-16 7:53 ` Maxime Ripard
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