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From: will.deacon@arm.com (Will Deacon)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v4 2/7] arm64: introduce interfaces to hotpatch kernel and module code
Date: Fri, 18 Oct 2013 09:56:38 +0100	[thread overview]
Message-ID: <20131018085638.GA2858@mudshark.cambridge.arm.com> (raw)
In-Reply-To: <1382023441.19506.66.camel@linaro1.home>

Hi Tixy,

On Thu, Oct 17, 2013 at 04:24:01PM +0100, Jon Medhurst (Tixy) wrote:
> On Thu, 2013-10-17 at 12:38 +0100, Will Deacon wrote:
> > On Thu, Oct 17, 2013 at 07:19:35AM +0100, Jiang Liu wrote:
> > > +	/*
> > > +	 * Execute __aarch64_insn_patch_text() on every online CPU,
> > > +	 * which ensure serialization among all online CPUs.
> > > +	 */
> > > +	return stop_machine(aarch64_insn_patch_text_cb, &patch, NULL);
> > > +}
> > 
> > Whoa, whoa, whoa! The comment here is wrong -- we only run the patching on
> > *one* CPU, which is the right thing to do. However, the arch/arm/ call to
> > stop_machine in kprobes does actually run the patching code on *all* the
> > online cores (including the cache flushing!). I think this is to work around
> > cores without hardware cache maintenance broadcasting, but that could easily
> > be called out specially (like we do in patch.c) and the flushing could be
> > separated from the patching too.
> [...]
> 
> For code modifications done in 32bit ARM kprobes (and ftrace) I'm not
> sure we ever actually resolved the possible cache flushing issues. If
> there was specific reasons for flushing on all cores I can't remember
> them, sorry. I have a suspicion that doing so was a case of sticking
> with what the code was already doing, and flushing on all cores seemed
> safest to guard against problems we hadn't thought about.

[...]

> Sorry, I don't think I've added much light on things here have I?

I think you missed the bit I was confused about :) Flushing the cache on
each core is necessary if cache_ops_need_broadcast, so I can understand why
you'd have code to do that. The bit I don't understand is that you actually
patch the instruction on each core too!

Will

  parent reply	other threads:[~2013-10-18  8:56 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-10-17  6:19 [PATCH v4 0/7] Optimize jump label implementation for ARM64 Jiang Liu
2013-10-17  6:19 ` [PATCH v4 1/7] arm64: introduce basic aarch64 instruction decoding helpers Jiang Liu
2013-10-17 10:47   ` Will Deacon
2013-10-17 15:14     ` Jiang Liu
2013-10-17  6:19 ` [PATCH v4 2/7] arm64: introduce interfaces to hotpatch kernel and module code Jiang Liu
2013-10-17 11:38   ` Will Deacon
2013-10-17 15:24     ` Jon Medhurst (Tixy)
2013-10-17 15:59       ` Jiang Liu
2013-10-18  8:56       ` Will Deacon [this message]
2013-10-18 13:44         ` Jon Medhurst (Tixy)
2013-10-18 15:08           ` Jiang Liu
2013-10-17 15:38     ` Jiang Liu
2013-10-17  6:19 ` [PATCH v4 3/7] arm64: move encode_insn_immediate() from module.c to insn.c Jiang Liu
2013-10-17 12:11   ` Will Deacon
2013-10-17  6:19 ` [PATCH v4 4/7] arm64: introduce aarch64_insn_gen_{nop|branch_imm}() helper functions Jiang Liu
2013-10-17  6:19 ` [PATCH v4 5/7] arm64, jump label: detect %c support for ARM64 Jiang Liu
2013-10-17  6:19 ` [PATCH v4 6/7] arm64, jump label: optimize jump label implementation Jiang Liu
2013-10-17  6:19 ` [PATCH v4 7/7] jump_label: use defined macros instead of hard-coding for better readability Jiang Liu

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