* [PATCH 3/5] ARM: ux500: fix clock for GPIO blocks 6 and 7 @ 2013-10-18 9:05 Linus Walleij 2013-10-18 11:05 ` Lee Jones 0 siblings, 1 reply; 3+ messages in thread From: Linus Walleij @ 2013-10-18 9:05 UTC (permalink / raw) To: linux-arm-kernel The clock assignment in the device tree for GPIO blocks 6 and 7 was incorrect, indicating this was managed by bit 1 on PRCC 2 while it was in fact bit 11 on PRCC 2. Cc: Lee Jones <lee.jones@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> --- arch/arm/boot/dts/ste-dbx5x0.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/ste-dbx5x0.dtsi b/arch/arm/boot/dts/ste-dbx5x0.dtsi index 55abf12..5112f4c 100644 --- a/arch/arm/boot/dts/ste-dbx5x0.dtsi +++ b/arch/arm/boot/dts/ste-dbx5x0.dtsi @@ -197,7 +197,7 @@ #gpio-cells = <2>; gpio-bank = <6>; - clocks = <&prcc_pclk 2 1>; + clocks = <&prcc_pclk 2 11>; }; gpio7: gpio at 8011e080 { @@ -212,7 +212,7 @@ #gpio-cells = <2>; gpio-bank = <7>; - clocks = <&prcc_pclk 2 1>; + clocks = <&prcc_pclk 2 11>; }; gpio8: gpio at a03fe000 { -- 1.8.3.1 ^ permalink raw reply related [flat|nested] 3+ messages in thread
* [PATCH 3/5] ARM: ux500: fix clock for GPIO blocks 6 and 7 2013-10-18 9:05 [PATCH 3/5] ARM: ux500: fix clock for GPIO blocks 6 and 7 Linus Walleij @ 2013-10-18 11:05 ` Lee Jones 2013-10-18 11:07 ` Lee Jones 0 siblings, 1 reply; 3+ messages in thread From: Lee Jones @ 2013-10-18 11:05 UTC (permalink / raw) To: linux-arm-kernel On Fri, 18 Oct 2013, Linus Walleij wrote: > The clock assignment in the device tree for GPIO blocks 6 > and 7 was incorrect, indicating this was managed by bit 1 on > PRCC 2 while it was in fact bit 11 on PRCC 2. Nice catch. It's also wrong in the driver: clk = clk_reg_prcc_pclk("p2_pclk10", "per2clk", clkrst2_base, BIT(10), 0); clk_register_clkdev(clk, "hsit_hclk", "ste_hsi.0"); PRCC_PCLK_STORE(clk, 2, 10); clk = clk_reg_prcc_pclk("p2_pclk11", "per2clk", clkrst2_base, BIT(11), 0); clk_register_clkdev(clk, NULL, "gpio.6"); clk_register_clkdev(clk, NULL, "gpio.7"); clk_register_clkdev(clk, NULL, "gpioblock1"); PRCC_PCLK_STORE(clk, 2, 1); clk = clk_reg_prcc_pclk("p2_pclk12", "per2clk", clkrst2_base, BIT(12), 0); PRCC_PCLK_STORE(clk, 2, 12); -- Lee Jones Linaro STMicroelectronics Landing Team Lead Linaro.org ? Open source software for ARM SoCs Follow Linaro: Facebook | Twitter | Blog ^ permalink raw reply [flat|nested] 3+ messages in thread
* [PATCH 3/5] ARM: ux500: fix clock for GPIO blocks 6 and 7 2013-10-18 11:05 ` Lee Jones @ 2013-10-18 11:07 ` Lee Jones 0 siblings, 0 replies; 3+ messages in thread From: Lee Jones @ 2013-10-18 11:07 UTC (permalink / raw) To: linux-arm-kernel On Fri, 18 Oct 2013, Lee Jones wrote: > On Fri, 18 Oct 2013, Linus Walleij wrote: > > > The clock assignment in the device tree for GPIO blocks 6 > > and 7 was incorrect, indicating this was managed by bit 1 on > > PRCC 2 while it was in fact bit 11 on PRCC 2. > > Nice catch. > > It's also wrong in the driver: Sorry, forgot this: Acked-by: Lee Jones <lee.jones@linaro.org> -- Lee Jones Linaro STMicroelectronics Landing Team Lead Linaro.org ? Open source software for ARM SoCs Follow Linaro: Facebook | Twitter | Blog ^ permalink raw reply [flat|nested] 3+ messages in thread
end of thread, other threads:[~2013-10-18 11:07 UTC | newest] Thread overview: 3+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2013-10-18 9:05 [PATCH 3/5] ARM: ux500: fix clock for GPIO blocks 6 and 7 Linus Walleij 2013-10-18 11:05 ` Lee Jones 2013-10-18 11:07 ` Lee Jones
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