[PATCH v2] ARM: at91: sama5d3: reduce TWI internal clock frequency

[wsa@the-dreams.de (Wolfram Sang)]

On Fri, Nov 22, 2013 at 05:08:43PM +0100, ludovic.desroches at atmel.com wrote:
> From: Ludovic Desroches <ludovic.desroches@atmel.com>
> 
> With some devices, transfer hangs during I2C frame transmission. This issue
> disappears when reducing the internal frequency of the TWI IP. Even if it is
> indicated that internal clock max frequency is 66MHz, it seems we have
> oversampling on I2C signals making TWI believe that a transfer in progress
> is done.
> 
> This fix has no impact on the I2C bus frequency.
> 
> Cc: <stable@vger.kernel.org> #3.10+
> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
> Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com>

Acked-by: Wolfram Sang <wsa@the-dreams.de>

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