From: mturquette@linaro.org (Mike Turquette)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v2 02/11] clk: sunxi: add gating support to PLL1
Date: Tue, 17 Dec 2013 18:57:22 -0800 [thread overview]
Message-ID: <20131218025722.23538.49745@quantum> (raw)
In-Reply-To: <1387327503-15651-3-git-send-email-emilio@elopez.com.ar>
Quoting Emilio L?pez (2013-12-17 16:44:54)
> This commit adds gating support to PLL1 on the clock driver. This makes
> the PLL1 implementation fully compatible with PLL4 as well.
>
> Signed-off-by: Emilio L?pez <emilio@elopez.com.ar>
> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Mike Turquette <mturquette@linaro.org>
> ---
> Documentation/devicetree/bindings/clock/sunxi.txt | 2 +-
> drivers/clk/sunxi/clk-sunxi.c | 2 ++
> 2 files changed, 3 insertions(+), 1 deletion(-)
>
> diff --git a/Documentation/devicetree/bindings/clock/sunxi.txt b/Documentation/devicetree/bindings/clock/sunxi.txt
> index 91a748f..b8c6cc4 100644
> --- a/Documentation/devicetree/bindings/clock/sunxi.txt
> +++ b/Documentation/devicetree/bindings/clock/sunxi.txt
> @@ -7,7 +7,7 @@ This binding uses the common clock binding[1].
> Required properties:
> - compatible : shall be one of the following:
> "allwinner,sun4i-osc-clk" - for a gatable oscillator
> - "allwinner,sun4i-pll1-clk" - for the main PLL clock
> + "allwinner,sun4i-pll1-clk" - for the main PLL clock and PLL4
> "allwinner,sun6i-a31-pll1-clk" - for the main PLL clock on A31
> "allwinner,sun4i-cpu-clk" - for the CPU multiplexer clock
> "allwinner,sun4i-axi-clk" - for the AXI clock
> diff --git a/drivers/clk/sunxi/clk-sunxi.c b/drivers/clk/sunxi/clk-sunxi.c
> index 6f756f4..5b86234 100644
> --- a/drivers/clk/sunxi/clk-sunxi.c
> +++ b/drivers/clk/sunxi/clk-sunxi.c
> @@ -292,11 +292,13 @@ static struct clk_factors_config sun4i_apb1_config = {
> };
>
> static const struct factors_data sun4i_pll1_data __initconst = {
> + .enable = 31,
> .table = &sun4i_pll1_config,
> .getter = sun4i_get_pll1_factors,
> };
>
> static const struct factors_data sun6i_a31_pll1_data __initconst = {
> + .enable = 31,
> .table = &sun6i_a31_pll1_config,
> .getter = sun6i_a31_get_pll1_factors,
> };
> --
> 1.8.5.1
>
next prev parent reply other threads:[~2013-12-18 2:57 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-12-18 0:44 [PATCH v2 00/11] clk: sunxi: PLL4/5/6, mod0 and mbus support Emilio López
2013-12-18 0:44 ` [PATCH v2 01/11] clk: sunxi: register factors clocks behind composite Emilio López
2013-12-18 2:55 ` Mike Turquette
2013-12-18 11:27 ` Emilio López
2013-12-18 0:44 ` [PATCH v2 02/11] clk: sunxi: add gating support to PLL1 Emilio López
2013-12-18 2:57 ` Mike Turquette [this message]
2013-12-18 0:44 ` [PATCH v2 03/11] ARM: sunxi: add PLL4 support Emilio López
2013-12-18 0:44 ` [PATCH v2 04/11] clk: sunxi: make factors_clk_setup return the clock it registers Emilio López
2013-12-18 3:01 ` Mike Turquette
2013-12-18 11:34 ` Emilio López
2013-12-18 0:44 ` [PATCH v2 05/11] clk: sunxi: add PLL5 and PLL6 support Emilio López
2013-12-19 4:59 ` Mike Turquette
2013-12-21 2:26 ` Emilio López
2013-12-18 0:44 ` [PATCH v2 06/11] ARM: " Emilio López
2013-12-18 0:44 ` [PATCH v2 07/11] clk: sunxi: mod0 support Emilio López
2013-12-19 4:59 ` Mike Turquette
2013-12-18 0:45 ` [PATCH v2 08/11] ARM: sun4i: dt: mod0 clocks Emilio López
2013-12-18 9:48 ` Maxime Ripard
2013-12-18 11:40 ` Emilio López
2013-12-18 0:45 ` [PATCH v2 09/11] ARM: sun5i: " Emilio López
2013-12-18 0:45 ` [PATCH v2 10/11] ARM: sun7i: " Emilio López
2013-12-18 0:45 ` [PATCH v2 11/11] ARM: sunxi: dt: add nodes for the mbus clock Emilio López
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