[PATCH 0/2] Fix i2c bus hang on A0 version of the Armada XP SoCs

[PATCH 0/2] Fix i2c bus hang on A0 version of the Armada XP SoCs

[Gregory CLEMENT]

Hi,

This series is a better approach to fix the i2c bus hang on A0 version
of the Armada XP SoCs. It occurred on the early release of the
OpenBlocks AX3-4 boards. Indeed the first variants of Armada XP SoCs
(A0 stepping) have issues related to the i2c controller which prevent
to use the offload mechanism and lead to a kernel hang during boot.

The first patch add a mean to detect the SoCs version at run-time and
the second one use this feature in the driver.

These 2 patches should be applied on 3.13-rc and on stable kernel 3.12
as it fixes a regression introduce by the commit 930ab3d403ae "i2c:
mv64xxx: Add I2C Transaction Generator support".

The first patch could be latter be extend to also be used with dove,
kirkwood, orion5x and mv78x00 when there will be merged in mvebu.

Thanks,

Gregory CLEMENT (2):
  ARM: mvebu: Add support to get the ID and the revision of a SoC
  i2c: mv64xxx: Fix bus hang on A0 version of the Armada XP SoCs

 arch/arm/mach-mvebu/Makefile       |   2 +-
 arch/arm/mach-mvebu/mvebu-soc-id.c | 111 +++++++++++++++++++++++++++++++++++++
 drivers/i2c/busses/i2c-mv64xxx.c   |  11 +++-
 include/linux/mvebu-soc-id.h       |  32 +++++++++++
 4 files changed, 154 insertions(+), 2 deletions(-)
 create mode 100644 arch/arm/mach-mvebu/mvebu-soc-id.c
 create mode 100644 include/linux/mvebu-soc-id.h

-- 
1.8.1.2

[PATCH 1/2] ARM: mvebu: Add support to get the ID and the revision of a SoC

[Gregory CLEMENT]

All the mvebu SoCs have information related to their variant and
revision that can be read from the PCI control register.

This patch adds support for Armada XP and Armada 370. This reading of
the revision and the ID are done before the PCI initialization to
avoid any conflicts. Once these data are retrieved, the resources are
freed to let the PCI subsystem use it.

Cc: stable at vger.kernel.org
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
---
 arch/arm/mach-mvebu/Makefile       |   2 +-
 arch/arm/mach-mvebu/mvebu-soc-id.c | 111 +++++++++++++++++++++++++++++++++++++
 include/linux/mvebu-soc-id.h       |  32 +++++++++++
 3 files changed, 144 insertions(+), 1 deletion(-)
 create mode 100644 arch/arm/mach-mvebu/mvebu-soc-id.c
 create mode 100644 include/linux/mvebu-soc-id.h

diff --git a/arch/arm/mach-mvebu/Makefile b/arch/arm/mach-mvebu/Makefile
index 2d04f0e21870..878aebe98dcc 100644
--- a/arch/arm/mach-mvebu/Makefile
+++ b/arch/arm/mach-mvebu/Makefile
@@ -3,7 +3,7 @@ ccflags-$(CONFIG_ARCH_MULTIPLATFORM) := -I$(srctree)/$(src)/include \
 
 AFLAGS_coherency_ll.o		:= -Wa,-march=armv7-a
 
-obj-y				 += system-controller.o
+obj-y				 += system-controller.o mvebu-soc-id.o
 obj-$(CONFIG_MACH_ARMADA_370_XP) += armada-370-xp.o
 obj-$(CONFIG_ARCH_MVEBU)	 += coherency.o coherency_ll.o pmsu.o
 obj-$(CONFIG_SMP)                += platsmp.o headsmp.o
diff --git a/arch/arm/mach-mvebu/mvebu-soc-id.c b/arch/arm/mach-mvebu/mvebu-soc-id.c
new file mode 100644
index 000000000000..86c901be284c
--- /dev/null
+++ b/arch/arm/mach-mvebu/mvebu-soc-id.c
@@ -0,0 +1,111 @@
+/*
+ * Variant and revision information for mvebu SoCs
+ *
+ * Copyright (C) 2014 Marvell
+ *
+ * Gregory CLEMENT <gregory.clement@free-electrons.com>
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2.  This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ *
+ * All the mvebu SoCs have information related to their variant and
+ * revision that can be read from the PCI control register. This is
+ * done before the PCI initialization to avoid any conflict. Once the
+ * ID and revision are retrieved, the mapping is freed.
+ */
+
+#include <linux/clk.h>
+#include <linux/init.h>
+#include <linux/io.h>
+#include <linux/kernel.h>
+#include <linux/mvebu-soc-id.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+
+#define PCIE_DEV_ID_OFF		0x0
+#define PCIE_DEV_REV_OFF	0x8
+
+#define SOC_ID_MASK	    0xFFFF0000
+#define SOC_REV_MASK	    0xFF
+
+static u32 soc_dev_id;
+static u32 soc_rev;
+static bool is_id_valid;
+
+static const struct of_device_id mvebu_pcie_of_match_table[] = {
+	{ .compatible = "marvell,armada-xp-pcie", },
+	{ .compatible = "marvell,armada-370-pcie", },
+	{},
+};
+
+int mvebu_get_soc_id(u32 *dev, u32 *rev)
+{
+	if (is_id_valid) {
+		*dev = soc_dev_id;
+		*rev = soc_rev;
+		return 0;
+	} else
+		return -1;
+}
+
+EXPORT_SYMBOL(mvebu_get_soc_id);
+
+static int __init mvebu_soc_id_init(void)
+{
+	struct device_node *np;
+	int ret = 0;
+
+	np = of_find_matching_node(NULL, mvebu_pcie_of_match_table);
+	if (np) {
+		void __iomem *pci_base;
+		struct clk *clk;
+		/*
+		 * ID and revision are available from any port, so we
+		 * just pick the first one
+		 */
+		struct device_node *child = of_get_next_child(np, NULL);
+
+		clk = of_clk_get_by_name(child, NULL);
+		if (IS_ERR(clk)) {
+			pr_err("%s: cannot get clock\n", __func__);
+			ret = -ENOMEM;
+			goto clk_err;
+		}
+
+		ret = clk_prepare_enable(clk);
+		if (ret) {
+			pr_err("%s: cannot enable clock\n", __func__);
+			goto clk_err;
+		}
+
+		pci_base = of_iomap(child, 0);
+		if (IS_ERR(pci_base)) {
+			pr_err("%s: cannot map registers\n",  __func__);
+			ret = -ENOMEM;
+			goto res_ioremap;
+		}
+
+		/* SoC ID */
+		soc_dev_id = __raw_readl(pci_base + PCIE_DEV_ID_OFF) >> 16;
+
+		/* SoC revision */
+		soc_rev = __raw_readl(pci_base + PCIE_DEV_REV_OFF)
+			& SOC_REV_MASK;
+
+		is_id_valid = true;
+
+		iounmap(pci_base);
+
+res_ioremap:
+		clk_disable_unprepare(clk);
+
+clk_err:
+		of_node_put(child);
+		of_node_put(np);
+	}
+
+	return ret;
+}
+arch_initcall(mvebu_soc_id_init);
+
diff --git a/include/linux/mvebu-soc-id.h b/include/linux/mvebu-soc-id.h
new file mode 100644
index 000000000000..602ce1c50d1d
--- /dev/null
+++ b/include/linux/mvebu-soc-id.h
@@ -0,0 +1,32 @@
+/*
+ * Marvell EBU SoC ID and revision definitions.
+ *
+ * Copyright (C) 2014 Marvell Semiconductor
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2.  This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+#ifndef __LINUX_MVEBU_SOC_ID_H
+#define __LINUX_MVEBU_SOC_ID_H
+
+/* Armada XP ID */
+#define MV78230_DEV_ID	    0x7823
+#define MV78260_DEV_ID	    0x7826
+#define MV78460_DEV_ID	    0x7846
+
+/* Armada XP Revision */
+#define MV78XX0_A0_REV	    0x1
+#define MV78XX0_B0_REV	    0x2
+
+#ifdef CONFIG_ARCH_MVEBU
+int mvebu_get_soc_id(u32 *dev, u32 *rev);
+#else
+int mvebu_get_soc_id(u32 *dev, u32 *rev)
+{
+	return -1;
+}
+#endif
+
+#endif /* __LINUX_MVEBU_SOC_ID_H */
-- 
1.8.1.2

[PATCH 2/2] i2c: mv64xxx: Fix bus hang on A0 version of the Armada XP SoCs

[Gregory CLEMENT]

The first variants of Armada XP SoCs (A0 stepping) have issues related
to the i2c controller which prevent to use the offload mechanism and
lead to a kernel hang during boot.

The driver now check the revision of the SoC. If the revision is not
more recent than the A0 or if the driver can't get the SoC revision
then it disables the offload mechanism.

Cc: stable at vger.kernel.org
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
---
 drivers/i2c/busses/i2c-mv64xxx.c | 11 ++++++++++-
 1 file changed, 10 insertions(+), 1 deletion(-)

diff --git a/drivers/i2c/busses/i2c-mv64xxx.c b/drivers/i2c/busses/i2c-mv64xxx.c
index 8be7e42aa4de..089a3663ad86 100644
--- a/drivers/i2c/busses/i2c-mv64xxx.c
+++ b/drivers/i2c/busses/i2c-mv64xxx.c
@@ -24,6 +24,7 @@
 #include <linux/clk.h>
 #include <linux/err.h>
 #include <linux/delay.h>
+#include <linux/mvebu-soc-id.h>
 
 #define MV64XXX_I2C_ADDR_ADDR(val)			((val & 0x7f) << 1)
 #define MV64XXX_I2C_BAUD_DIV_N(val)			(val & 0x7)
@@ -779,8 +780,16 @@ mv64xxx_of_config(struct mv64xxx_i2c_data *drv_data,
 	 * Transaction Generator support and the errata fix.
 	 */
 	if (of_device_is_compatible(np, "marvell,mv78230-i2c")) {
-		drv_data->offload_enabled = true;
+		u32 dev, rev;
+
 		drv_data->errata_delay = true;
+		/*
+		 * Only revison more recent than A0 support offload
+		 * mechanism. In case we can't get the SoC revision
+		 * weplay safe and we don't enable it
+		 */
+		if (!mvebu_get_soc_id(&rev, &dev) && (dev > MV78XX0_A0_REV))
+			drv_data->offload_enabled = true;
 	}
 
 out:
-- 
1.8.1.2

[PATCH 2/2] i2c: mv64xxx: Fix bus hang on A0 version of the Armada XP SoCs

[Jason Cooper]

Wolfram,

On Thu, Jan 02, 2014 at 05:01:16PM +0100, Gregory CLEMENT wrote:
> The first variants of Armada XP SoCs (A0 stepping) have issues related
> to the i2c controller which prevent to use the offload mechanism and
> lead to a kernel hang during boot.
> 
> The driver now check the revision of the SoC. If the revision is not
> more recent than the A0 or if the driver can't get the SoC revision
> then it disables the offload mechanism.
> 
> Cc: stable at vger.kernel.org
> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
> ---
>  drivers/i2c/busses/i2c-mv64xxx.c | 11 ++++++++++-
>  1 file changed, 10 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/i2c/busses/i2c-mv64xxx.c b/drivers/i2c/busses/i2c-mv64xxx.c
> index 8be7e42aa4de..089a3663ad86 100644
> --- a/drivers/i2c/busses/i2c-mv64xxx.c
> +++ b/drivers/i2c/busses/i2c-mv64xxx.c
> @@ -24,6 +24,7 @@
>  #include <linux/clk.h>
>  #include <linux/err.h>
>  #include <linux/delay.h>
> +#include <linux/mvebu-soc-id.h>
>  
>  #define MV64XXX_I2C_ADDR_ADDR(val)			((val & 0x7f) << 1)
>  #define MV64XXX_I2C_BAUD_DIV_N(val)			(val & 0x7)
> @@ -779,8 +780,16 @@ mv64xxx_of_config(struct mv64xxx_i2c_data *drv_data,
>  	 * Transaction Generator support and the errata fix.
>  	 */
>  	if (of_device_is_compatible(np, "marvell,mv78230-i2c")) {
> -		drv_data->offload_enabled = true;
> +		u32 dev, rev;
> +
>  		drv_data->errata_delay = true;
> +		/*
> +		 * Only revison more recent than A0 support offload
> +		 * mechanism. In case we can't get the SoC revision
> +		 * weplay safe and we don't enable it
> +		 */
> +		if (!mvebu_get_soc_id(&rev, &dev) && (dev > MV78XX0_A0_REV))
> +			drv_data->offload_enabled = true;

Since this depends on arch-specific code in the previous patch, I'd like
to keep the two of them together in a topic branch.  Would you prefer to
take both with my Ack, or vice-versa?  I'm fine either way.

thx,

Jason.

[PATCH 2/2] i2c: mv64xxx: Fix bus hang on A0 version of the Armada XP SoCs

[Wolfram Sang]

On Thu, Jan 02, 2014 at 01:28:22PM -0500, Jason Cooper wrote:
> Wolfram,
> 
> On Thu, Jan 02, 2014 at 05:01:16PM +0100, Gregory CLEMENT wrote:
> > The first variants of Armada XP SoCs (A0 stepping) have issues related
> > to the i2c controller which prevent to use the offload mechanism and
> > lead to a kernel hang during boot.
> > 
> > The driver now check the revision of the SoC. If the revision is not
> > more recent than the A0 or if the driver can't get the SoC revision
> > then it disables the offload mechanism.
> > 
> > Cc: stable at vger.kernel.org
> > Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
> > ---
> >  drivers/i2c/busses/i2c-mv64xxx.c | 11 ++++++++++-
> >  1 file changed, 10 insertions(+), 1 deletion(-)
> > 
> > diff --git a/drivers/i2c/busses/i2c-mv64xxx.c b/drivers/i2c/busses/i2c-mv64xxx.c
> > index 8be7e42aa4de..089a3663ad86 100644
> > --- a/drivers/i2c/busses/i2c-mv64xxx.c
> > +++ b/drivers/i2c/busses/i2c-mv64xxx.c
> > @@ -24,6 +24,7 @@
> >  #include <linux/clk.h>
> >  #include <linux/err.h>
> >  #include <linux/delay.h>
> > +#include <linux/mvebu-soc-id.h>
> >  
> >  #define MV64XXX_I2C_ADDR_ADDR(val)			((val & 0x7f) << 1)
> >  #define MV64XXX_I2C_BAUD_DIV_N(val)			(val & 0x7)
> > @@ -779,8 +780,16 @@ mv64xxx_of_config(struct mv64xxx_i2c_data *drv_data,
> >  	 * Transaction Generator support and the errata fix.
> >  	 */
> >  	if (of_device_is_compatible(np, "marvell,mv78230-i2c")) {
> > -		drv_data->offload_enabled = true;
> > +		u32 dev, rev;
> > +
> >  		drv_data->errata_delay = true;
> > +		/*
> > +		 * Only revison more recent than A0 support offload
> > +		 * mechanism. In case we can't get the SoC revision
> > +		 * weplay safe and we don't enable it
> > +		 */
> > +		if (!mvebu_get_soc_id(&rev, &dev) && (dev > MV78XX0_A0_REV))

Very minor nits:

I'd prefer (mvebu_get_soc_id == 0) here, since !mvebu_get_soc_id can
easily be read as "if not get soc id" which leads to the assumption the
function failed. And the parantheses around the second comparison are
superfluous.

> > +			drv_data->offload_enabled = true;
> 
> Since this depends on arch-specific code in the previous patch, I'd like
> to keep the two of them together in a topic branch.  Would you prefer to
> take both with my Ack, or vice-versa?  I'm fine either way.

I'd think you better take it:

Acked-by: Wolfram Sang <wsa@the-dreams.de>

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[PATCH 2/2] i2c: mv64xxx: Fix bus hang on A0 version of the Armada XP SoCs

[Gregory CLEMENT]

On 02/01/2014 19:41, Wolfram Sang wrote:
> On Thu, Jan 02, 2014 at 01:28:22PM -0500, Jason Cooper wrote:
>> Wolfram,
>>
>> On Thu, Jan 02, 2014 at 05:01:16PM +0100, Gregory CLEMENT wrote:
>>> The first variants of Armada XP SoCs (A0 stepping) have issues related
>>> to the i2c controller which prevent to use the offload mechanism and
>>> lead to a kernel hang during boot.
>>>
>>> The driver now check the revision of the SoC. If the revision is not
>>> more recent than the A0 or if the driver can't get the SoC revision
>>> then it disables the offload mechanism.
>>>
>>> Cc: stable at vger.kernel.org
>>> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
>>> ---
>>>  drivers/i2c/busses/i2c-mv64xxx.c | 11 ++++++++++-
>>>  1 file changed, 10 insertions(+), 1 deletion(-)
>>>
>>> diff --git a/drivers/i2c/busses/i2c-mv64xxx.c b/drivers/i2c/busses/i2c-mv64xxx.c
>>> index 8be7e42aa4de..089a3663ad86 100644
>>> --- a/drivers/i2c/busses/i2c-mv64xxx.c
>>> +++ b/drivers/i2c/busses/i2c-mv64xxx.c
>>> @@ -24,6 +24,7 @@
>>>  #include <linux/clk.h>
>>>  #include <linux/err.h>
>>>  #include <linux/delay.h>
>>> +#include <linux/mvebu-soc-id.h>
>>>  
>>>  #define MV64XXX_I2C_ADDR_ADDR(val)			((val & 0x7f) << 1)
>>>  #define MV64XXX_I2C_BAUD_DIV_N(val)			(val & 0x7)
>>> @@ -779,8 +780,16 @@ mv64xxx_of_config(struct mv64xxx_i2c_data *drv_data,
>>>  	 * Transaction Generator support and the errata fix.
>>>  	 */
>>>  	if (of_device_is_compatible(np, "marvell,mv78230-i2c")) {
>>> -		drv_data->offload_enabled = true;
>>> +		u32 dev, rev;
>>> +
>>>  		drv_data->errata_delay = true;
>>> +		/*
>>> +		 * Only revison more recent than A0 support offload
>>> +		 * mechanism. In case we can't get the SoC revision
>>> +		 * weplay safe and we don't enable it
>>> +		 */
>>> +		if (!mvebu_get_soc_id(&rev, &dev) && (dev > MV78XX0_A0_REV))
> 
> Very minor nits:
> 
> I'd prefer (mvebu_get_soc_id == 0) here, since !mvebu_get_soc_id can
> easily be read as "if not get soc id" which leads to the assumption the
> function failed. 

yes fair enough

>And the parantheses around the second comparison are
> superfluous.
> 

I know but I found it clearer with parenthesis but I can remove them.

>>> +			drv_data->offload_enabled = true;
>>
>> Since this depends on arch-specific code in the previous patch, I'd like
>> to keep the two of them together in a topic branch.  Would you prefer to
>> take both with my Ack, or vice-versa?  I'm fine either way.
> 
> I'd think you better take it:
> 
> Acked-by: Wolfram Sang <wsa@the-dreams.de>
> 

I am going to resubmit a series with the change you asked and your acked-by

-- 
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com

[PATCH 1/2] ARM: mvebu: Add support to get the ID and the revision of a SoC

[Ben Hutchings]

On Thu, 2014-01-02 at 17:01 +0100, Gregory CLEMENT wrote:
> All the mvebu SoCs have information related to their variant and
> revision that can be read from the PCI control register.
> 
> This patch adds support for Armada XP and Armada 370. This reading of
> the revision and the ID are done before the PCI initialization to
> avoid any conflicts. Once these data are retrieved, the resources are
> freed to let the PCI subsystem use it.
[...]
> --- /dev/null
> +++ b/include/linux/mvebu-soc-id.h
> @@ -0,0 +1,32 @@
> +/*
> + * Marvell EBU SoC ID and revision definitions.
> + *
> + * Copyright (C) 2014 Marvell Semiconductor
> + *
> + * This file is licensed under the terms of the GNU General Public
> + * License version 2.  This program is licensed "as is" without any
> + * warranty of any kind, whether express or implied.
> + */
> +
> +#ifndef __LINUX_MVEBU_SOC_ID_H
> +#define __LINUX_MVEBU_SOC_ID_H
> +
> +/* Armada XP ID */
> +#define MV78230_DEV_ID	    0x7823
> +#define MV78260_DEV_ID	    0x7826
> +#define MV78460_DEV_ID	    0x7846
> +
> +/* Armada XP Revision */
> +#define MV78XX0_A0_REV	    0x1
> +#define MV78XX0_B0_REV	    0x2
> +
> +#ifdef CONFIG_ARCH_MVEBU
> +int mvebu_get_soc_id(u32 *dev, u32 *rev);
> +#else
> +int mvebu_get_soc_id(u32 *dev, u32 *rev)

This definition needs to be static inline, assuming anything will
actually include this header when !defined(CONFIG_ARCH_MVEBU).

Ben.

> +{
> +	return -1;
> +}
> +#endif
> +
> +#endif /* __LINUX_MVEBU_SOC_ID_H */

-- 
Ben Hutchings
Quantity is no substitute for quality, but it's the only one we've got.
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[PATCH 1/2] ARM: mvebu: Add support to get the ID and the revision of a SoC

[Gregory CLEMENT]

Hi Ben,

On 12/01/2014 04:57, Ben Hutchings wrote:
> On Thu, 2014-01-02 at 17:01 +0100, Gregory CLEMENT wrote:
>> All the mvebu SoCs have information related to their variant and
>> revision that can be read from the PCI control register.
>>
>> This patch adds support for Armada XP and Armada 370. This reading of
>> the revision and the ID are done before the PCI initialization to
>> avoid any conflicts. Once these data are retrieved, the resources are
>> freed to let the PCI subsystem use it.
> [...]
>> --- /dev/null
>> +++ b/include/linux/mvebu-soc-id.h
>> @@ -0,0 +1,32 @@
>> +/*
>> + * Marvell EBU SoC ID and revision definitions.
>> + *
>> + * Copyright (C) 2014 Marvell Semiconductor
>> + *
>> + * This file is licensed under the terms of the GNU General Public
>> + * License version 2.  This program is licensed "as is" without any
>> + * warranty of any kind, whether express or implied.
>> + */
>> +
>> +#ifndef __LINUX_MVEBU_SOC_ID_H
>> +#define __LINUX_MVEBU_SOC_ID_H
>> +
>> +/* Armada XP ID */
>> +#define MV78230_DEV_ID	    0x7823
>> +#define MV78260_DEV_ID	    0x7826
>> +#define MV78460_DEV_ID	    0x7846
>> +
>> +/* Armada XP Revision */
>> +#define MV78XX0_A0_REV	    0x1
>> +#define MV78XX0_B0_REV	    0x2
>> +
>> +#ifdef CONFIG_ARCH_MVEBU
>> +int mvebu_get_soc_id(u32 *dev, u32 *rev);
>> +#else
>> +int mvebu_get_soc_id(u32 *dev, u32 *rev)
> 
> This definition needs to be static inline, assuming anything will
> actually include this header when !defined(CONFIG_ARCH_MVEBU).
> 

Your review is appreciate, however there was 4 more version sent
since this one. And this issue was already pointed and then fixed
in the 3rd version.


Thanks,

Gregory



> Ben.
> 
>> +{
>> +	return -1;
>> +}
>> +#endif
>> +
>> +#endif /* __LINUX_MVEBU_SOC_ID_H */
> 


-- 
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com

[PATCH 1/2] ARM: mvebu: Add support to get the ID and the revision of a SoC

[Ben Hutchings]

On Sun, 2014-01-12 at 18:45 +0100, Gregory CLEMENT wrote:
[...]
> Your review is appreciate, however there was 4 more version sent
> since this one. And this issue was already pointed and then fixed
> in the 3rd version.

Yes, sorry about that - I'm some way behind on reading the stable list.

Ben.

-- 
Ben Hutchings
Quantity is no substitute for quality, but it's the only one we've got.
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