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From: catalin.marinas@arm.com (Catalin Marinas)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 1/4] arm64: topology: Implement basic CPU topology support
Date: Wed, 12 Feb 2014 10:27:16 +0000	[thread overview]
Message-ID: <20140212102716.GE29702@arm.com> (raw)
In-Reply-To: <CAKfTPtATfnjP7R4ABSu_GDEYkVe3W6N2HU-ZkrQmT=nF31U4GA@mail.gmail.com>

On Wed, Feb 12, 2014 at 08:04:54AM +0000, Vincent Guittot wrote:
> On 11 February 2014 15:07, Catalin Marinas <catalin.marinas@arm.com> wrote:
> > On Tue, Feb 11, 2014 at 01:18:56PM +0000, Vincent Guittot wrote:
> >> On 11 February 2014 11:34, Will Deacon <will.deacon@arm.com> wrote:
> >> > On Tue, Feb 11, 2014 at 08:15:19AM +0000, Vincent Guittot wrote:
> >> >> On 10 February 2014 17:46, Mark Brown <broonie@kernel.org> wrote:
> >> >> > On Mon, Feb 10, 2014 at 04:22:31PM +0000, Catalin Marinas wrote:
> >> >> >> On Mon, Feb 10, 2014 at 01:02:01PM +0000, Mark Brown wrote:
> >> >> >
> >> >> >> > +           if (cpu != cpuid)
> >> >> >> > +                   cpumask_set_cpu(cpu, &cpuid_topo->thread_sibling);
> >> >> >> > +   }
> >> >> >> > +   smp_wmb();
> >> >> >
> >> >> >> I now noticed there are a couple of smp_wmb() calls in this patch. What
> >> >> >> are they for?
> >> >> >
> >> >> > To be honest I mostly cargo culted them from the ARM implementation; I
> >> >> > did look a bit but didn't fully dig into it - it seemed they were
> >> >> > required to ensure that the updates for the new CPU are visible over all
> >> >> > CPUs.  Vincent?
> >> >>
> >> >> Yes that's it. we must ensure that updates are made visible to other CPUs
> >> >
> >> > In relation to what? The smp_* barriers ensure ordering of observability
> >> > between a number of independent accesses, so you must be ensuring
> >> > ordering against something else. Also, you need to guarantee ordering on the
> >> > read-side too -- how is this achieved? I can't see any smp_rmb calls from a
> >> > quick grep, so I assume you're making use of address dependencies?
> >>
> >> The boot sequence ensures the rmb
> >
> > As Will said, smp_*mb() do not ensure absolute visibility, only relative
> > to subsequent memory accesses on the same processor. So just placing a
> 
> It's my time to be a bit confused, if smp_*mb() do not ensure absolute
> visibility on other CPUs, how can we ensure that ?

smb_wmb()/smb_rmb() do not provide any waiting, they are not
synchronisation primitives. You have to use spinlocks or some other
polling (and of course, barriers for relative ordering of memory
reads/writes).

> > barrier at the end of a function does not mean much, it only shows half
> > of the problem it is trying to solve.
> >
> > How are the secondary CPUs using this information? AFAICT, secondaries
> > call smp_store_cpu_info() which also go through each CPU in
> > update_siblings_mask(). Is there any race here that smp_wmb() is trying
> > to solve?
> 
> The fields will be used to construct topology so we must ensure their
> visibility

I wonder whether you need spinlocks around the topology updating code.

-- 
Catalin

  reply	other threads:[~2014-02-12 10:27 UTC|newest]

Thread overview: 50+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-02-10 13:02 [PATCH 1/4] arm64: topology: Implement basic CPU topology support Mark Brown
2014-02-10 13:02 ` [PATCH 2/4] arm64: topology: Add support for topology DT bindings Mark Brown
2014-02-10 13:02 ` [PATCH 3/4] arm64: topology: Tell the scheduler about the relative power of cores Mark Brown
2014-02-10 13:02 ` [PATCH 4/4] arm64: topology: Provide relative power numbers for cores Mark Brown
2014-02-10 16:22 ` [PATCH 1/4] arm64: topology: Implement basic CPU topology support Catalin Marinas
2014-02-10 16:46   ` Mark Brown
2014-02-11  8:15     ` Vincent Guittot
2014-02-11 10:34       ` Will Deacon
2014-02-11 13:18         ` Vincent Guittot
2014-02-11 14:07           ` Catalin Marinas
2014-02-11 14:46             ` Vincent Guittot
2014-02-11 22:04               ` Mark Brown
2014-02-12  8:04             ` Vincent Guittot
2014-02-12 10:27               ` Catalin Marinas [this message]
2014-02-12 12:34                 ` Mark Brown
2014-02-21 15:01 ` Lorenzo Pieralisi
2014-02-22  2:06   ` Mark Brown
2014-02-22 12:26     ` Lorenzo Pieralisi
2014-02-23  2:09       ` Mark Brown
  -- strict thread matches above, loose matches on Subject: below --
2014-02-26  0:48 [PATCH 0/4] arm64: Topology Mark Brown
2014-02-26  0:48 ` [PATCH 1/4] arm64: topology: Implement basic CPU topology support Mark Brown
2014-02-25  4:25 [PATCH 0/4] arm64: topology: " Mark Brown
2014-02-25  4:25 ` [PATCH 1/4] arm64: topology: Implement basic " Mark Brown
2014-02-25 16:54   ` Lorenzo Pieralisi
2014-02-26  0:50     ` Mark Brown
2014-02-26 12:32       ` Lorenzo Pieralisi
2014-02-26 14:46         ` Mark Brown
2014-02-26 15:48           ` Catalin Marinas
2014-02-26 17:50             ` Lorenzo Pieralisi
2014-02-27  4:30               ` Mark Brown
2014-02-27  4:20             ` Mark Brown
2014-02-11 22:06 Mark Brown
2014-01-15 11:38 [PATCH v12 0/4] arm64 topology Mark Brown
2014-01-15 11:38 ` [PATCH 1/4] arm64: topology: Implement basic CPU topology support Mark Brown
2014-01-12 19:20 [PATCH v11 0/4] ARMv8 cpu topology Mark Brown
2014-01-12 19:20 ` [PATCH 1/4] arm64: topology: Implement basic CPU topology support Mark Brown
2014-01-13 16:10   ` Lorenzo Pieralisi
2014-01-13 16:30     ` Mark Brown
2014-01-13 17:44       ` Lorenzo Pieralisi
2014-01-14  8:17         ` Vincent Guittot
2014-01-13 16:44     ` Vincent Guittot
2014-01-13 17:33       ` Lorenzo Pieralisi
2014-01-08 19:12 Mark Brown
2014-01-09 11:48 ` Catalin Marinas
2014-01-08 17:10 Mark Brown
2014-01-08 18:30 ` Lorenzo Pieralisi
2014-01-08 18:40   ` Mark Brown
2014-01-09 12:40     ` Lorenzo Pieralisi
2013-12-19 20:06 [PATCH 0/4] arm64 " Mark Brown
2013-12-19 20:06 ` [PATCH 1/4] arm64: topology: Implement basic CPU " Mark Brown
2013-12-16 16:49 Mark Brown
2013-12-17 17:06 ` Lorenzo Pieralisi
2013-12-17 19:55   ` Mark Brown
2013-12-18 17:39     ` Lorenzo Pieralisi
2013-12-18 18:00       ` Mark Brown

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