* [PATCH v3 1/3] ARM: dts: berlin2q: add the Marvell Armada 1500 pro
2014-03-17 15:06 [PATCH v3 0/3] ARM: add initial support for the Marvell BG2-Q DMP Antoine Ténart
@ 2014-03-17 15:06 ` Antoine Ténart
2014-03-17 15:28 ` Sebastian Hesselbarth
2014-03-18 2:24 ` Jisheng Zhang
2014-03-17 15:06 ` [PATCH v3 2/3] ARM: berlin2q: add the Marvell Armada 1500 pro in the documentation Antoine Ténart
2014-03-17 15:06 ` [PATCH v3 3/3] ARM: dts: berlin2q: add the Marvell BG2-Q DMP device tree Antoine Ténart
2 siblings, 2 replies; 7+ messages in thread
From: Antoine Ténart @ 2014-03-17 15:06 UTC (permalink / raw)
To: linux-arm-kernel
Adds initial support for the Marvell Armada 1500 pro (BG2Q) SoC (Berlin family).
The SoC has nodes for cpu, l2 cache controller, interrupt controllers, local
timer, apb timers and uarts for now.
Signed-off-by: Antoine T?nart <antoine.tenart@free-electrons.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
---
arch/arm/boot/dts/berlin2q.dtsi | 210 ++++++++++++++++++++++++++++++++++++++++
1 file changed, 210 insertions(+)
create mode 100644 arch/arm/boot/dts/berlin2q.dtsi
diff --git a/arch/arm/boot/dts/berlin2q.dtsi b/arch/arm/boot/dts/berlin2q.dtsi
new file mode 100644
index 000000000000..7a50267b1044
--- /dev/null
+++ b/arch/arm/boot/dts/berlin2q.dtsi
@@ -0,0 +1,210 @@
+/*
+ * Copyright (C) 2014 Antoine T?nart <antoine.tenart@free-electrons.com>
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2. This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+
+#include "skeleton.dtsi"
+
+/ {
+ model = "Marvell Armada 1500 pro (BG2-Q) SoC";
+ compatible = "marvell,berlin2q", "marvell,berlin";
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ cpu at 0 {
+ compatible = "arm,cortex-a9";
+ device_type = "cpu";
+ next-level-cache = <&l2>;
+ reg = <0>;
+ };
+
+ cpu at 1 {
+ compatible = "arm,cortex-a9";
+ device_type = "cpu";
+ next-level-cache = <&l2>;
+ reg = <1>;
+ };
+
+ cpu at 2 {
+ compatible = "arm,cortex-a9";
+ device_type = "cpu";
+ next-level-cache = <&l2>;
+ reg = <2>;
+ };
+
+ cpu at 3 {
+ compatible = "arm,cortex-a9";
+ device_type = "cpu";
+ next-level-cache = <&l2>;
+ reg = <3>;
+ };
+ };
+
+ smclk: sysmgr-clock {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <25000000>;
+ };
+
+ cpuclk: cpu-clock {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <1200000000>;
+ };
+
+ sysclk: system-clock {
+ compatible = "fixed-factor-clock";
+ #clock-cells = <0>;
+ clocks = <&cpuclk>;
+ clock-multi = <1>;
+ clock-div = <3>;
+ };
+
+ soc {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ ranges = <0 0xf7000000 0x1000000>;
+ interrupt-parent = <&gic>;
+
+ l2: l2-cache-controller at ac0000 {
+ compatible = "arm,pl310-cache";
+ reg = <0xac0000 0x1000>;
+ cache-level = <2>;
+ };
+
+ local-timer at ad0600 {
+ compatible = "arm,cortex-a9-twd-timer";
+ reg = <0xad0600 0x20>;
+ clocks = <&sysclk>;
+ interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_HIGH>;
+ };
+
+ gic: interrupt-controller at ad1000 {
+ compatible = "arm,cortex-a9-gic";
+ reg = <0xad1000 0x1000>, <0xad0100 0x100>;
+ interrupt-controller;
+ #interrupt-cells = <3>;
+ };
+
+ apb at e80000 {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ ranges = <0 0xe80000 0x10000>;
+ interrupt-parent = <&aic>;
+
+ timer0: timer at 2c00 {
+ compatible = "snps,dw-apb-timer";
+ reg = <0x2c00 0x14>;
+ interrupts = <8>;
+ clock-freq = <100000000>;
+ };
+
+ timer1: timer at 2c14 {
+ compatible = "snps,dw-apb-timer";
+ reg = <0x2c14 0x14>;
+ clock-freq = <100000000>;
+ status = "disabled";
+ };
+
+ timer2: timer at 2c28 {
+ compatible = "snps,dw-apb-timer";
+ reg = <0x2c28 0x14>;
+ clock-freq = <100000000>;
+ status = "disabled";
+ };
+
+ timer3: timer at 2c3c {
+ compatible = "snps,dw-apb-timer";
+ reg = <0x2c3c 0x14>;
+ clock-freq = <100000000>;
+ status = "disabled";
+ };
+
+ timer4: timer at 2c50 {
+ compatible = "snps,dw-apb-timer";
+ reg = <0x2c50 0x14>;
+ clock-freq = <100000000>;
+ status = "disabled";
+ };
+
+ timer5: timer at 2c64 {
+ compatible = "snps,dw-apb-timer";
+ reg = <0x2c64 0x14>;
+ clock-freq = <100000000>;
+ status = "disabled";
+ };
+
+ timer6: timer at 2c78 {
+ compatible = "snps,dw-apb-timer";
+ reg = <0x2c78 0x14>;
+ clock-freq = <100000000>;
+ status = "disabled";
+ };
+
+ timer7: timer at 2c8c {
+ compatible = "snps,dw-apb-timer";
+ reg = <0x2c8c 0x14>;
+ clock-freq = <100000000>;
+ status = "disabled";
+ };
+
+ aic: interrupt-controller at 3800 {
+ compatible = "snps,dw-apb-ictl";
+ reg = <0x3800 0x30>;
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ interrupt-parent = <&gic>;
+ interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
+ };
+ };
+
+ apb at fc0000 {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ ranges = <0 0xfc0000 0x10000>;
+ interrupt-parent = <&sic>;
+
+ uart0: uart at 9000 {
+ compatible = "snps,dw-apb-uart";
+ reg = <0x9000 0x100>;
+ interrupt-parent = <&sic>;
+ interrupts = <8>;
+ clock-frequency = <25000000>;
+ reg-shift = <2>;
+ status = "disabled";
+ };
+
+ uart1: uart at a000 {
+ compatible = "snps,dw-apb-uart";
+ reg = <0xa000 0x100>;
+ interrupt-parent = <&sic>;
+ interrupts = <9>;
+ clock-frequency = <25000000>;
+ reg-shift = <2>;
+ status = "disabled";
+ };
+
+ sic: interrupt-controller at e000 {
+ compatible = "snps,dw-apb-ictl";
+ reg = <0xe000 0x30>;
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ interrupt-parent = <&gic>;
+ interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
+ };
+ };
+ };
+};
--
1.8.3.2
^ permalink raw reply related [flat|nested] 7+ messages in thread* [PATCH v3 1/3] ARM: dts: berlin2q: add the Marvell Armada 1500 pro
2014-03-17 15:06 ` [PATCH v3 1/3] ARM: dts: berlin2q: add the Marvell Armada 1500 pro Antoine Ténart
@ 2014-03-17 15:28 ` Sebastian Hesselbarth
2014-03-18 2:24 ` Jisheng Zhang
1 sibling, 0 replies; 7+ messages in thread
From: Sebastian Hesselbarth @ 2014-03-17 15:28 UTC (permalink / raw)
To: linux-arm-kernel
On 03/17/2014 04:06 PM, Antoine T?nart wrote:
> Adds initial support for the Marvell Armada 1500 pro (BG2Q) SoC (Berlin family).
> The SoC has nodes for cpu, l2 cache controller, interrupt controllers, local
> timer, apb timers and uarts for now.
>
> Signed-off-by: Antoine T?nart <antoine.tenart@free-electrons.com>
> Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
> ---
> arch/arm/boot/dts/berlin2q.dtsi | 210 ++++++++++++++++++++++++++++++++++++++++
> 1 file changed, 210 insertions(+)
> create mode 100644 arch/arm/boot/dts/berlin2q.dtsi
>
> diff --git a/arch/arm/boot/dts/berlin2q.dtsi b/arch/arm/boot/dts/berlin2q.dtsi
> new file mode 100644
> index 000000000000..7a50267b1044
> --- /dev/null
> +++ b/arch/arm/boot/dts/berlin2q.dtsi
[...]
> +
> + smclk: sysmgr-clock {
> + compatible = "fixed-clock";
> + #clock-cells = <0>;
> + clock-frequency = <25000000>;
> + };
> +
Antoine,
sorry I missed it the first time. Please add:
+ cfgclk: config-clock {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <100000000>;
+ };
+
> + cpuclk: cpu-clock {
> + compatible = "fixed-clock";
> + #clock-cells = <0>;
> + clock-frequency = <1200000000>;
> + };
> +
> + sysclk: system-clock {
> + compatible = "fixed-factor-clock";
> + #clock-cells = <0>;
> + clocks = <&cpuclk>;
> + clock-multi = <1>;
> + clock-div = <3>;
> + };
> +
> + soc {
> + compatible = "simple-bus";
> + #address-cells = <1>;
> + #size-cells = <1>;
> +
> + ranges = <0 0xf7000000 0x1000000>;
> + interrupt-parent = <&gic>;
> +
> + l2: l2-cache-controller at ac0000 {
> + compatible = "arm,pl310-cache";
> + reg = <0xac0000 0x1000>;
> + cache-level = <2>;
> + };
> +
> + local-timer at ad0600 {
> + compatible = "arm,cortex-a9-twd-timer";
> + reg = <0xad0600 0x20>;
> + clocks = <&sysclk>;
> + interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_HIGH>;
> + };
> +
> + gic: interrupt-controller at ad1000 {
> + compatible = "arm,cortex-a9-gic";
> + reg = <0xad1000 0x1000>, <0xad0100 0x100>;
> + interrupt-controller;
> + #interrupt-cells = <3>;
> + };
> +
> + apb at e80000 {
> + compatible = "simple-bus";
> + #address-cells = <1>;
> + #size-cells = <1>;
> +
> + ranges = <0 0xe80000 0x10000>;
> + interrupt-parent = <&aic>;
> +
> + timer0: timer at 2c00 {
> + compatible = "snps,dw-apb-timer";
> + reg = <0x2c00 0x14>;
> + interrupts = <8>;
> + clock-freq = <100000000>;
replace this and all below with:
clocks = <&cfgclk>;
> + };
> +
> + timer1: timer at 2c14 {
> + compatible = "snps,dw-apb-timer";
> + reg = <0x2c14 0x14>;
> + clock-freq = <100000000>;
> + status = "disabled";
> + };
> +
> + timer2: timer at 2c28 {
> + compatible = "snps,dw-apb-timer";
> + reg = <0x2c28 0x14>;
> + clock-freq = <100000000>;
> + status = "disabled";
> + };
> +
> + timer3: timer at 2c3c {
> + compatible = "snps,dw-apb-timer";
> + reg = <0x2c3c 0x14>;
> + clock-freq = <100000000>;
> + status = "disabled";
> + };
> +
> + timer4: timer at 2c50 {
> + compatible = "snps,dw-apb-timer";
> + reg = <0x2c50 0x14>;
> + clock-freq = <100000000>;
> + status = "disabled";
> + };
> +
> + timer5: timer at 2c64 {
> + compatible = "snps,dw-apb-timer";
> + reg = <0x2c64 0x14>;
> + clock-freq = <100000000>;
> + status = "disabled";
> + };
> +
> + timer6: timer at 2c78 {
> + compatible = "snps,dw-apb-timer";
> + reg = <0x2c78 0x14>;
> + clock-freq = <100000000>;
> + status = "disabled";
> + };
> +
> + timer7: timer at 2c8c {
> + compatible = "snps,dw-apb-timer";
> + reg = <0x2c8c 0x14>;
> + clock-freq = <100000000>;
> + status = "disabled";
> + };
> +
[...]
> +
> + uart0: uart at 9000 {
> + compatible = "snps,dw-apb-uart";
> + reg = <0x9000 0x100>;
> + interrupt-parent = <&sic>;
> + interrupts = <8>;
> + clock-frequency = <25000000>;
and clocks = <&smclk> here and below.
> + reg-shift = <2>;
> + status = "disabled";
> + };
> +
> + uart1: uart at a000 {
> + compatible = "snps,dw-apb-uart";
> + reg = <0xa000 0x100>;
> + interrupt-parent = <&sic>;
> + interrupts = <9>;
> + clock-frequency = <25000000>;
> + reg-shift = <2>;
> + status = "disabled";
> + };
Apart from it, this really looks good and I'll pick it up
as soon as I have setup git branches.
Sebastian
^ permalink raw reply [flat|nested] 7+ messages in thread* [PATCH v3 1/3] ARM: dts: berlin2q: add the Marvell Armada 1500 pro
2014-03-17 15:06 ` [PATCH v3 1/3] ARM: dts: berlin2q: add the Marvell Armada 1500 pro Antoine Ténart
2014-03-17 15:28 ` Sebastian Hesselbarth
@ 2014-03-18 2:24 ` Jisheng Zhang
2014-03-18 8:43 ` Antoine Ténart
1 sibling, 1 reply; 7+ messages in thread
From: Jisheng Zhang @ 2014-03-18 2:24 UTC (permalink / raw)
To: linux-arm-kernel
Hi Antoine,
On Mon, 17 Mar 2014 08:06:26 -0700
Antoine T?nart <antoine.tenart@free-electrons.com> wrote:
> Adds initial support for the Marvell Armada 1500 pro (BG2Q) SoC (Berlin
> family). The SoC has nodes for cpu, l2 cache controller, interrupt
> controllers, local timer, apb timers and uarts for now.
>
> Signed-off-by: Antoine T?nart <antoine.tenart@free-electrons.com>
> Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
> ---
> arch/arm/boot/dts/berlin2q.dtsi | 210
> ++++++++++++++++++++++++++++++++++++++++ 1 file changed, 210 insertions(+)
> create mode 100644 arch/arm/boot/dts/berlin2q.dtsi
>
> diff --git a/arch/arm/boot/dts/berlin2q.dtsi
> b/arch/arm/boot/dts/berlin2q.dtsi new file mode 100644
> index 000000000000..7a50267b1044
> --- /dev/null
> +++ b/arch/arm/boot/dts/berlin2q.dtsi
> @@ -0,0 +1,210 @@
> +/*
> + * Copyright (C) 2014 Antoine T?nart <antoine.tenart@free-electrons.com>
> + *
> + * This file is licensed under the terms of the GNU General Public
> + * License version 2. This program is licensed "as is" without any
> + * warranty of any kind, whether express or implied.
> + */
> +
> +#include <dt-bindings/interrupt-controller/arm-gic.h>
> +
> +#include "skeleton.dtsi"
> +
> +/ {
> + model = "Marvell Armada 1500 pro (BG2-Q) SoC";
> + compatible = "marvell,berlin2q", "marvell,berlin";
> +
> + cpus {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + cpu at 0 {
> + compatible = "arm,cortex-a9";
> + device_type = "cpu";
> + next-level-cache = <&l2>;
> + reg = <0>;
> + };
> +
> + cpu at 1 {
> + compatible = "arm,cortex-a9";
> + device_type = "cpu";
> + next-level-cache = <&l2>;
> + reg = <1>;
> + };
> +
> + cpu at 2 {
> + compatible = "arm,cortex-a9";
> + device_type = "cpu";
> + next-level-cache = <&l2>;
> + reg = <2>;
> + };
> +
> + cpu at 3 {
> + compatible = "arm,cortex-a9";
> + device_type = "cpu";
> + next-level-cache = <&l2>;
> + reg = <3>;
> + };
> + };
> +
> + smclk: sysmgr-clock {
> + compatible = "fixed-clock";
> + #clock-cells = <0>;
> + clock-frequency = <25000000>;
> + };
> +
> + cpuclk: cpu-clock {
> + compatible = "fixed-clock";
> + #clock-cells = <0>;
> + clock-frequency = <1200000000>;
> + };
> +
> + sysclk: system-clock {
> + compatible = "fixed-factor-clock";
> + #clock-cells = <0>;
> + clocks = <&cpuclk>;
> + clock-multi = <1>;
> + clock-div = <3>;
> + };
Can you please name it as twdclk to avoid confusion? On Berlin, sysclk is another
clk rather than the clk for twd.
^ permalink raw reply [flat|nested] 7+ messages in thread* [PATCH v3 1/3] ARM: dts: berlin2q: add the Marvell Armada 1500 pro
2014-03-18 2:24 ` Jisheng Zhang
@ 2014-03-18 8:43 ` Antoine Ténart
0 siblings, 0 replies; 7+ messages in thread
From: Antoine Ténart @ 2014-03-18 8:43 UTC (permalink / raw)
To: linux-arm-kernel
Hi Jisheng,
On 18/03/2014 03:24, Jisheng Zhang wrote:
>> + sysclk: system-clock {
>> + compatible = "fixed-factor-clock";
>> + #clock-cells = <0>;
>> + clocks = <&cpuclk>;
>> + clock-multi = <1>;
>> + clock-div = <3>;
>> + };
>
> Can you please name it as twdclk to avoid confusion? On Berlin, sysclk is another
> clk rather than the clk for twd.
Sure, I'll change the name and send a v4.
Antoine
--
Antoine T?nart, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
^ permalink raw reply [flat|nested] 7+ messages in thread
* [PATCH v3 2/3] ARM: berlin2q: add the Marvell Armada 1500 pro in the documentation
2014-03-17 15:06 [PATCH v3 0/3] ARM: add initial support for the Marvell BG2-Q DMP Antoine Ténart
2014-03-17 15:06 ` [PATCH v3 1/3] ARM: dts: berlin2q: add the Marvell Armada 1500 pro Antoine Ténart
@ 2014-03-17 15:06 ` Antoine Ténart
2014-03-17 15:06 ` [PATCH v3 3/3] ARM: dts: berlin2q: add the Marvell BG2-Q DMP device tree Antoine Ténart
2 siblings, 0 replies; 7+ messages in thread
From: Antoine Ténart @ 2014-03-17 15:06 UTC (permalink / raw)
To: linux-arm-kernel
Signed-off-by: Antoine T?nart <antoine.tenart@free-electrons.com>
---
Documentation/arm/Marvell/README | 5 +++++
Documentation/devicetree/bindings/arm/marvell,berlin.txt | 1 +
2 files changed, 6 insertions(+)
diff --git a/Documentation/arm/Marvell/README b/Documentation/arm/Marvell/README
index 5a930c1528ad..eb6f212625f9 100644
--- a/Documentation/arm/Marvell/README
+++ b/Documentation/arm/Marvell/README
@@ -224,6 +224,11 @@ Berlin family (Digital Entertainment)
Core: Marvell PJ4B (ARMv7), Tauros3 L2CC
Homepage: http://www.marvell.com/digital-entertainment/armada-1500/
Product Brief: http://www.marvell.com/digital-entertainment/armada-1500/assets/Marvell-ARMADA-1500-Product-Brief.pdf
+ 88DE3114, Armada 1500 Pro
+ Design name: BG2-Q
+ Core: Quad Core ARM Cortex-A9, PL310 L2CC
+ Homepage: http://www.marvell.com/digital-entertainment/armada-1500-pro/
+ Product Brief: http://www.marvell.com/digital-entertainment/armada-1500-pro/assets/Marvell_ARMADA_1500_PRO-01_product_brief.pdf
88DE????
Design name: BG3
Core: ARM Cortex-A15, CA15 integrated L2CC
diff --git a/Documentation/devicetree/bindings/arm/marvell,berlin.txt b/Documentation/devicetree/bindings/arm/marvell,berlin.txt
index 737afa5f8148..86b7f60c74fc 100644
--- a/Documentation/devicetree/bindings/arm/marvell,berlin.txt
+++ b/Documentation/devicetree/bindings/arm/marvell,berlin.txt
@@ -11,6 +11,7 @@ In addition, the above compatible shall be extended with the specific
SoC and board used. Currently known SoC compatibles are:
"marvell,berlin2" for Marvell Armada 1500 (BG2, 88DE3100),
"marvell,berlin2cd" for Marvell Armada 1500-mini (BG2CD, 88DE3005)
+ "marvell,berlin2q" for Marvell Armada 1500-pro (BG2Q, 88DE3114)
"marvell,berlin2ct" for Marvell Armada ? (BG2CT, 88DE????)
"marvell,berlin3" for Marvell Armada ? (BG3, 88DE????)
--
1.8.3.2
^ permalink raw reply related [flat|nested] 7+ messages in thread* [PATCH v3 3/3] ARM: dts: berlin2q: add the Marvell BG2-Q DMP device tree
2014-03-17 15:06 [PATCH v3 0/3] ARM: add initial support for the Marvell BG2-Q DMP Antoine Ténart
2014-03-17 15:06 ` [PATCH v3 1/3] ARM: dts: berlin2q: add the Marvell Armada 1500 pro Antoine Ténart
2014-03-17 15:06 ` [PATCH v3 2/3] ARM: berlin2q: add the Marvell Armada 1500 pro in the documentation Antoine Ténart
@ 2014-03-17 15:06 ` Antoine Ténart
2 siblings, 0 replies; 7+ messages in thread
From: Antoine Ténart @ 2014-03-17 15:06 UTC (permalink / raw)
To: linux-arm-kernel
Adds initial support for the Marvell BG2-Q DMP. The board has 2GB of
memory, an uart activated and what's initially supported by the Marvell
Armada 1500 pro dtsi.
Signed-off-by: Antoine T?nart <antoine.tenart@free-electrons.com>
---
arch/arm/boot/dts/Makefile | 3 ++-
arch/arm/boot/dts/berlin2q-marvell-dmp.dts | 28 ++++++++++++++++++++++++++++
2 files changed, 30 insertions(+), 1 deletion(-)
create mode 100644 arch/arm/boot/dts/berlin2q-marvell-dmp.dts
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 032030361bef..4a1c0cf01b93 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -52,7 +52,8 @@ dtb-$(CONFIG_ARCH_BCM_MOBILE) += bcm11351-brt.dtb \
dtb-$(CONFIG_ARCH_BCM2835) += bcm2835-rpi-b.dtb
dtb-$(CONFIG_ARCH_BERLIN) += \
berlin2-sony-nsz-gs7.dtb \
- berlin2cd-google-chromecast.dtb
+ berlin2cd-google-chromecast.dtb \
+ berlin2q-marvell-dmp.dtb
dtb-$(CONFIG_ARCH_DAVINCI) += da850-enbw-cmc.dtb \
da850-evm.dtb
dtb-$(CONFIG_ARCH_DOVE) += dove-cm-a510.dtb \
diff --git a/arch/arm/boot/dts/berlin2q-marvell-dmp.dts b/arch/arm/boot/dts/berlin2q-marvell-dmp.dts
new file mode 100644
index 000000000000..2da9c41e29d8
--- /dev/null
+++ b/arch/arm/boot/dts/berlin2q-marvell-dmp.dts
@@ -0,0 +1,28 @@
+/*
+ * Copyright (C) 2014 Antoine T?nart <antoine.tenart@free-electrons.com>
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2. This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+/dts-v1/;
+#include "berlin2q.dtsi"
+
+/ {
+ model = "Marvell BG2-Q DMP";
+ compatible = "marvell,berlin2q-dmp", "marvell,berlin2q", "marvell,berlin";
+
+ memory {
+ device_type = "memory";
+ reg = <0x00000000 0x80000000>;
+ };
+
+ choosen {
+ bootargs = "console=ttyS0,115200 earlyprintk";
+ };
+};
+
+&uart0 {
+ status = "okay";
+};
--
1.8.3.2
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