From: maxime.ripard@free-electrons.com (Maxime Ripard)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v6 0/3] ARM: sun7i/sun6i: irqchip: Irqchip driver for NMI controller
Date: Wed, 19 Mar 2014 13:32:41 +0100 [thread overview]
Message-ID: <20140319123241.GI27873@lukather> (raw)
In-Reply-To: <alpine.DEB.2.02.1403191213240.18573@ionos.tec.linutronix.de>
On Wed, Mar 19, 2014 at 12:13:56PM +0100, Thomas Gleixner wrote:
> On Sat, 15 Mar 2014, Carlo Caione wrote:
>
> > Allwinner A20/A31 SoCs have a special interrupt controller for managing NMI.
> > Three register are present to (un)mask, control and acknowledge NMI.
> > These two patches add a new irqchip driver in cascade with GIC.
>
> If I get an ack for the DT parts, I'll pick it up.
I had some comments on it, so Carlo will probably resubmit it.
--
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
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next prev parent reply other threads:[~2014-03-19 12:32 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-03-15 13:40 [PATCH v6 0/3] ARM: sun7i/sun6i: irqchip: Irqchip driver for NMI controller Carlo Caione
2014-03-15 13:40 ` [PATCH v6 1/3] ARM: sun7i/sun6i: irqchip: Add irqchip " Carlo Caione
2014-03-15 13:41 ` [PATCH v6 2/3] ARM: sun7i/sun6i: dts: Add NMI irqchip support Carlo Caione
2014-03-17 13:30 ` Maxime Ripard
2014-03-17 14:13 ` [linux-sunxi] " Carlo Caione
2014-03-15 13:41 ` [PATCH v6 3/3] ARM: sun7i/sun6i: irqchip: Update the documentation Carlo Caione
2014-03-19 11:13 ` [PATCH v6 0/3] ARM: sun7i/sun6i: irqchip: Irqchip driver for NMI controller Thomas Gleixner
2014-03-19 12:32 ` Maxime Ripard [this message]
2014-03-19 12:41 ` Thomas Gleixner
2014-03-19 12:49 ` Carlo Caione
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