[PATCH 07/15] ARM: sunxi: dt: define A31's APB0 clk gates node

Boris BREZILLON
2014-04-09T14:43:40Z

On 09/04/2014 16:06, Emilio L?pez wrote:
> Hi Boris,
>
> El 09/04/14 10:51, Boris BREZILLON escribi?:
>> Define the APB0 clk gates controlled by the PRCM (Power/Reset/Clock
>> Management) block.
>>
>> Signed-off-by: Boris BREZILLON <boris.brezillon@free-electrons.com>
>> ---
>> arch/arm/boot/dts/sun6i-a31.dtsi | 10 ++++++++++
>> 1 file changed, 10 insertions(+)
>>
>> diff --git a/arch/arm/boot/dts/sun6i-a31.dtsi
>> b/arch/arm/boot/dts/sun6i-a31.dtsi
>> index 3858424..61e8b34 100644
>> --- a/arch/arm/boot/dts/sun6i-a31.dtsi
>> +++ b/arch/arm/boot/dts/sun6i-a31.dtsi
>> @@ -141,6 +141,16 @@
>> "ahb1_drc0", "ahb1_drc1";
>> };
>>
>> + apb0_gates: apb0_gates at 01f01428 {
>
> Looks like this node is out of place, judging by the address. Try to
> keep them in order.

Sure, I'll fix it for the next version.

>
>> + #clock-cells = <1>;
>> + compatible = "allwinner,sun6i-a31-apb0-gates-clk";
>> + reg = <0x01f01428 0x4>;
>> + clock-output-names = "apb0_pio", "apb0_ir",
>> + "apb0_timer01", "apb0_p2wi",
>> + "apb0_uart", "apb0_1wire",
>> + "apb0_i2c";
>> + };
>> +
>> apb1: apb1 at 01c20054 {
>> #clock-cells = <0>;
>> compatible = "allwinner,sun4i-apb0-clk";
>>
>
> Cheers,
>
> Emilio

--
Boris Brezillon, Free Electrons
Embedded Linux and Kernel engineering